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H8

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Hitachi H8/323 1Hitachi H8/323 1


  1. Image by ZyMOS, February 28, 2009, H8 Family from Wikipedia↩︎

H8,
a family of 8-bit microcontrollers, since the early 1990s developed and made by Hitachi, in April 2003 transferred to Renesas Technology. The chip consists of a CPU, various read only and random access memory variations, including parallel and serial I/O-ports, AD-converter, and timer. The controller was used in several dedicated chess computers of the early 90s.

Contents
  1. Architecture
  2. H8 Chess Programs
  3. Manuals
  4. External Links
  5. References

Architecture

The basic architecture of the H8 was influenced by the DEC PDP-11, with sixteen 8-bit registers (R0H, R0L, ..., R7H, R7L), with some instructons also accessible as eight 16-bit registers (R0 - R7), where R7 is the stack pointer, 16-bit program counter, 8-bit condition code register (CCR) and a variety of addressing modes. Opposed to the PDP-11, H8 is a big-endian machine, since the upper 8 bits of a 16-bit word are stored at the even word address, the lower 8 bits at the odd address. The H8/300 has a concise set of 57 RISC-like instructions, 2 or 4 bytes long 1. Arithmetic, logic, shift and bit manipulation instructions are performed as register-to-register operations, or with immediate data.

H8 Chess Programs

Manuals

References

Up one Level


  1. H8/300 Programming Manual (pdf)↩︎

What links here

Contributors: GerdIsenberg.