Continued scaling in semiconductor manufacturing increasingly relies on atomic-scale control of etching for complex 3D material stacks, making patterning precision a growing industrial bottleneck. Atomic layer etching (ALE) has emerged as a key enabler, with plasma-driven anisotropy and surface-chemistry control allowing improved selectivity and profile fidelity for advanced logic and memory…
Intel Foundry has demonstrated concrete momentum in de-risking 2D field-effect transistors as a future scaling path beyond silicon, through long-term collaboration with Imec . Results presented at IEDM show a world-first, 300 mm fab-compatible integration of key 2DFET modules, including source/drain contacts and gate stacks, using transition-metal dichalcogenide channels (WS₂ and MoS₂ for n-type,…
Nanexa and Moderna have entered into a license and option agreement covering the development of up to five undisclosed drug compounds using Nanexa’s PharmaShell® drug delivery platform. The agreement includes an upfront payment of USD 3 million to Nanexa, with the potential for up to USD 500 million in development and commercial milestone payments, as well as tiered single-digit royalties on…
Researchers led by Junmo Lee from Georgia Institute of Technology in collaboration with Taiwan Semiconductor Manufacturing Company (TSMC) have demonstrated a new type of capacitive memory integrated directly on a CMOS chip. The work uses atomic layer deposition (ALD) and a dual-gated device architecture, pointing toward higher-density, low-power memory that can be integrated into advanced logic…
The ASD Workshop was initiated in 2016 to provide a scientific communication channel to learn and exchange about selective deposition techniques. It has since offered a forum for open discussions between researchers from academia and industry. The meeting will include one day of Tutorials followed by the Workshop at ETEC Building (University at Albany). The last day of the workshop will highlight…
Researchers at the Samsung Advanced Institute of Technology (SAIT) have unveiled a breakthrough in interconnect materials at IEDM 2025 with their paper “Grain-Orientation-Engineering of Atomic Layer Deposited Ruthenium Interconnect Technology.” As semiconductor scaling pushes below 10 nm, conventional copper wiring faces mounting resistance and reliability challenges. The SAIT team demonstrated…
The IEDM 2025 T3 tutorial session titled “Atomic-layer-deposited atomically thin In₂O₃ transistors for BEOL logic and memory applications” will focus on recent progress in oxide semiconductor thin-film transistor (TFT) technologies designed for back-end-of-line (BEOL) 3D integration. The work is closely associated with Professor Peide (Peter) Ye’s group at Purdue University, which has been leading…
Applied Materials announced it has acquired a 9% stake in BE Semiconductor Industries (Besi) to strengthen their ongoing collaboration on hybrid bonding technology for advanced semiconductor packaging. Building on a partnership that began in 2020, the two companies recently extended their agreement to co-develop the industry’s first fully integrated die-based hybrid bonding system—combining…
Researchers from POSTECH and UNIST in Korea have unveiled a new atomic-layer process using plasma-based deposition (PDP) to significantly improve DRAM capacitors. This innovation addresses a critical challenge in semiconductor manufacturing: enhancing the performance of high-k dielectric materials without introducing defects that cause electrical leakage. The PDP process refines the deposition of…
AlixLabs is pleased to announce that Dr. Dmitry Suyatin, CIPO and Co-Founder, has presented the company’s latest advances in APS™ (Atomic Layer Etching Pitch Splitting) at the 248th Electrochemical Society (ECS) Meeting held in Chicago, October 12–16, 2025. During the session, Dr. Suyatin highlighted new experimental results demonstrating high-aspect-ratio (HAR), narrow-fin patterning on bulk…
