llvm::SelectionDAG Class Reference

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representation suitable for instruction selection. More...

#include "llvm/CodeGen/SelectionDAG.h"

Classes
struct	DAGNodeDeletedListener
struct	DAGNodeInsertedListener
struct	DAGUpdateListener
	Clients of various APIs that cause global effects on the DAG can optionally implement this interface. More...
class	FlagInserter
	Help to insert SDNodeFlags automatically in transforming. More...

Public Types
enum	OverflowKind { OFK_Never , OFK_Sometime , OFK_Always }
	Used to represent the possible overflow behavior of an operation. More...
using	allnodes_const_iterator = ilist<SDNode>::const_iterator
using	allnodes_iterator = ilist<SDNode>::iterator

Public Member Functions
LLVM_ABI	SelectionDAG (const TargetMachine &TM, CodeGenOptLevel)
	SelectionDAG (const SelectionDAG &)=delete
SelectionDAG &	operator= (const SelectionDAG &)=delete
LLVM_ABI	~SelectionDAG ()
LLVM_ABI void	init (MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE, Pass *PassPtr, const TargetLibraryInfo *LibraryInfo, const LibcallLoweringInfo *LibcallsInfo, UniformityInfo *UA, ProfileSummaryInfo *PSIin, BlockFrequencyInfo *BFIin, MachineModuleInfo &MMI, FunctionVarLocs const *FnVarLocs)
	Prepare this SelectionDAG to process code in the given MachineFunction.
void	init (MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE, MachineFunctionAnalysisManager &AM, const TargetLibraryInfo *LibraryInfo, const LibcallLoweringInfo *LibcallsInfo, UniformityInfo *UA, ProfileSummaryInfo *PSIin, BlockFrequencyInfo *BFIin, MachineModuleInfo &MMI, FunctionVarLocs const *FnVarLocs)
void	setFunctionLoweringInfo (FunctionLoweringInfo *FuncInfo)
LLVM_ABI void	clear ()
	Clear state and free memory necessary to make this SelectionDAG ready to process a new block.
MachineFunction &	getMachineFunction () const
const Pass *	getPass () const
MachineFunctionAnalysisManager *	getMFAM ()
bool	hasSwiftErrorArg () const
CodeGenOptLevel	getOptLevel () const
const DataLayout &	getDataLayout () const
const TargetMachine &	getTarget () const
const TargetSubtargetInfo &	getSubtarget () const
template<typename STC>
const STC &	getSubtarget () const
const TargetLowering &	getTargetLoweringInfo () const
const TargetLibraryInfo &	getLibInfo () const
const LibcallLoweringInfo &	getLibcalls () const
const RTLIB::RuntimeLibcallsInfo &	getRuntimeLibcallInfo () const
const SelectionDAGTargetInfo &	getSelectionDAGInfo () const
const UniformityInfo *	getUniformityInfo () const
const FunctionVarLocs *	getFunctionVarLocs () const
	Returns the result of the AssignmentTrackingAnalysis pass if it's available, otherwise return nullptr.
LLVMContext *	getContext () const
OptimizationRemarkEmitter &	getORE () const
ProfileSummaryInfo *	getPSI () const
BlockFrequencyInfo *	getBFI () const
MachineModuleInfo *	getMMI () const
FlagInserter *	getFlagInserter ()
void	setFlagInserter (FlagInserter *FI)
LLVM_DUMP_METHOD void	dumpDotGraph (const Twine &FileName, const Twine &Title)
	Just dump dot graph to a user-provided path and title.
LLVM_ABI void	viewGraph (const std::string &Title)
	Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
LLVM_ABI void	viewGraph ()
LLVM_ABI void	clearGraphAttrs ()
	Clear all previously defined node graph attributes.
LLVM_ABI void	setGraphAttrs (const SDNode *N, const char *Attrs)
	Set graph attributes for a node. (eg. "color=red".)
LLVM_ABI std::string	getGraphAttrs (const SDNode *N) const
	Get graph attributes for a node.
LLVM_ABI void	setGraphColor (const SDNode *N, const char *Color)
	Convenience for setting node color attribute.
LLVM_ABI void	setSubgraphColor (SDNode *N, const char *Color)
	Convenience for setting subgraph color attribute.
allnodes_const_iterator	allnodes_begin () const
allnodes_const_iterator	allnodes_end () const
allnodes_iterator	allnodes_begin ()
allnodes_iterator	allnodes_end ()
ilist< SDNode >::size_type	allnodes_size () const
iterator_range< allnodes_iterator >	allnodes ()
iterator_range< allnodes_const_iterator >	allnodes () const
const SDValue &	getRoot () const
	Return the root tag of the SelectionDAG.
SDValue	getEntryNode () const
	Return the token chain corresponding to the entry of the function.
const SDValue &	setRoot (SDValue N)
	Set the current root tag of the SelectionDAG.
LLVM_ABI void	Combine (CombineLevel Level, BatchAAResults *BatchAA, CodeGenOptLevel OptLevel)
	This iterates over the nodes in the SelectionDAG, folding certain types of nodes together, or eliminating superfluous nodes.
LLVM_ABI bool	LegalizeTypes ()
	This transforms the SelectionDAG into a SelectionDAG that only uses types natively supported by the target.
LLVM_ABI void	Legalize ()
	This transforms the SelectionDAG into a SelectionDAG that is compatible with the target instruction selector, as indicated by the TargetLowering object.
LLVM_ABI bool	LegalizeOp (SDNode *N, SmallSetVector< SDNode *, 16 > &UpdatedNodes)
	Transforms a SelectionDAG node and any operands to it into a node that is compatible with the target instruction selector, as indicated by the TargetLowering object.
LLVM_ABI bool	LegalizeVectors ()
	This transforms the SelectionDAG into a SelectionDAG that only uses vector math operations supported by the target.
LLVM_ABI void	RemoveDeadNodes ()
	This method deletes all unreachable nodes in the SelectionDAG.
LLVM_ABI void	DeleteNode (SDNode *N)
	Remove the specified node from the system.
LLVM_ABI SDVTList	getVTList (EVT VT)
	Return an SDVTList that represents the list of values specified.
LLVM_ABI SDVTList	getVTList (EVT VT1, EVT VT2)
LLVM_ABI SDVTList	getVTList (EVT VT1, EVT VT2, EVT VT3)
LLVM_ABI SDVTList	getVTList (EVT VT1, EVT VT2, EVT VT3, EVT VT4)
LLVM_ABI SDVTList	getVTList (ArrayRef< EVT > VTs)
LLVM_ABI SDValue	getGlobalAddress (const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, bool isTargetGA=false, unsigned TargetFlags=0)
SDValue	getTargetGlobalAddress (const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, unsigned TargetFlags=0)
LLVM_ABI SDValue	getDeactivationSymbol (const GlobalValue *GV)
LLVM_ABI SDValue	getFrameIndex (int FI, EVT VT, bool isTarget=false)
SDValue	getTargetFrameIndex (int FI, EVT VT)
LLVM_ABI SDValue	getJumpTable (int JTI, EVT VT, bool isTarget=false, unsigned TargetFlags=0)
SDValue	getTargetJumpTable (int JTI, EVT VT, unsigned TargetFlags=0)
LLVM_ABI SDValue	getJumpTableDebugInfo (int JTI, SDValue Chain, const SDLoc &DL)
LLVM_ABI SDValue	getConstantPool (const Constant *C, EVT VT, MaybeAlign Align=std::nullopt, int Offs=0, bool isT=false, unsigned TargetFlags=0)
SDValue	getTargetConstantPool (const Constant *C, EVT VT, MaybeAlign Align=std::nullopt, int Offset=0, unsigned TargetFlags=0)
LLVM_ABI SDValue	getConstantPool (MachineConstantPoolValue *C, EVT VT, MaybeAlign Align=std::nullopt, int Offs=0, bool isT=false, unsigned TargetFlags=0)
SDValue	getTargetConstantPool (MachineConstantPoolValue *C, EVT VT, MaybeAlign Align=std::nullopt, int Offset=0, unsigned TargetFlags=0)
LLVM_ABI SDValue	getBasicBlock (MachineBasicBlock *MBB)
LLVM_ABI SDValue	getExternalSymbol (const char *Sym, EVT VT)
LLVM_ABI SDValue	getExternalSymbol (RTLIB::LibcallImpl LCImpl, EVT VT)
LLVM_ABI SDValue	getTargetExternalSymbol (const char *Sym, EVT VT, unsigned TargetFlags=0)
LLVM_ABI SDValue	getTargetExternalSymbol (RTLIB::LibcallImpl LCImpl, EVT VT, unsigned TargetFlags=0)
LLVM_ABI SDValue	getMCSymbol (MCSymbol *Sym, EVT VT)
LLVM_ABI SDValue	getValueType (EVT)
LLVM_ABI SDValue	getRegister (Register Reg, EVT VT)
LLVM_ABI SDValue	getRegisterMask (const uint32_t *RegMask)
LLVM_ABI SDValue	getEHLabel (const SDLoc &dl, SDValue Root, MCSymbol *Label)
LLVM_ABI SDValue	getLabelNode (unsigned Opcode, const SDLoc &dl, SDValue Root, MCSymbol *Label)
LLVM_ABI SDValue	getBlockAddress (const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned TargetFlags=0)
SDValue	getTargetBlockAddress (const BlockAddress *BA, EVT VT, int64_t Offset=0, unsigned TargetFlags=0)
SDValue	getCopyToReg (SDValue Chain, const SDLoc &dl, Register Reg, SDValue N)
SDValue	getCopyToReg (SDValue Chain, const SDLoc &dl, Register Reg, SDValue N, SDValue Glue)
SDValue	getCopyToReg (SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N, SDValue Glue)
SDValue	getCopyFromReg (SDValue Chain, const SDLoc &dl, Register Reg, EVT VT)
SDValue	getCopyFromReg (SDValue Chain, const SDLoc &dl, Register Reg, EVT VT, SDValue Glue)
LLVM_ABI SDValue	getCondCode (ISD::CondCode Cond)
LLVM_ABI SDValue	getVectorShuffle (EVT VT, const SDLoc &dl, SDValue N1, SDValue N2, ArrayRef< int > Mask)
	Return an ISD::VECTOR_SHUFFLE node.
SDValue	getBuildVector (EVT VT, const SDLoc &DL, ArrayRef< SDValue > Ops)
	Return an ISD::BUILD_VECTOR node.
SDValue	getBuildVector (EVT VT, const SDLoc &DL, ArrayRef< SDUse > Ops)
	Return an ISD::BUILD_VECTOR node.
SDValue	getSplatBuildVector (EVT VT, const SDLoc &DL, SDValue Op)
	Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements.
SDValue	getSplatVector (EVT VT, const SDLoc &DL, SDValue Op)
SDValue	getSplat (EVT VT, const SDLoc &DL, SDValue Op)
	Returns a node representing a splat of one value into all lanes of the provided vector type.
LLVM_ABI SDValue	getStepVector (const SDLoc &DL, EVT ResVT, const APInt &StepVal)
	Returns a vector of type ResVT whose elements contain the linear sequence <0, Step, Step * 2, Step * 3, ...>
LLVM_ABI SDValue	getStepVector (const SDLoc &DL, EVT ResVT)
	Returns a vector of type ResVT whose elements contain the linear sequence <0, 1, 2, 3, ...>
LLVM_ABI SDValue	getCommutedVectorShuffle (const ShuffleVectorSDNode &SV)
	Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swapped operands.
SDValue	getExtractVectorElt (const SDLoc &DL, EVT VT, SDValue Vec, unsigned Idx)
	Extract element at Idx from Vec.
SDValue	getInsertVectorElt (const SDLoc &DL, SDValue Vec, SDValue Elt, unsigned Idx)
	Insert Elt into Vec at offset Idx.
SDValue	getInsertSubvector (const SDLoc &DL, SDValue Vec, SDValue SubVec, unsigned Idx)
	Insert SubVec at the Idx element of Vec.
SDValue	getExtractSubvector (const SDLoc &DL, EVT VT, SDValue Vec, unsigned Idx)
	Return the VT typed sub-vector of Vec at Idx.
LLVM_ABI SDValue	getFPExtendOrRound (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of float type, to the float type VT, by either extending or rounding (by truncation).
LLVM_ABI std::pair< SDValue, SDValue >	getStrictFPExtendOrRound (SDValue Op, SDValue Chain, const SDLoc &DL, EVT VT)
	Convert Op, which must be a STRICT operation of float type, to the float type VT, by either extending or rounding (by truncation).
LLVM_ABI SDValue	getAnyExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncating it.
LLVM_ABI SDValue	getSExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or truncating it.
LLVM_ABI SDValue	getZExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or truncating it.
SDValue	getExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT, unsigned Opcode)
	Convert Op, which must be of integer type, to the integer type VT, by either any/sign/zero-extending (depending on IsAny / IsSigned) or truncating it.
SDValue	getExtOrTrunc (bool IsSigned, SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by either sign/zero-extending (depending on IsSigned) or truncating it.
LLVM_ABI SDValue	getBitcastedAnyExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by first bitcasting (from potential vector) to corresponding scalar type then either any-extending or truncating it.
LLVM_ABI SDValue	getBitcastedSExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by first bitcasting (from potential vector) to corresponding scalar type then either sign-extending or truncating it.
LLVM_ABI SDValue	getBitcastedZExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by first bitcasting (from potential vector) to corresponding scalar type then either zero-extending or truncating it.
LLVM_ABI SDValue	getZeroExtendInReg (SDValue Op, const SDLoc &DL, EVT VT)
	Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
LLVM_ABI SDValue	getPtrExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT)
	Convert Op, which must be of integer type, to the integer type VT, by either truncating it or performing either zero or sign extension as appropriate extension for the pointer's semantics.
LLVM_ABI SDValue	getPtrExtendInReg (SDValue Op, const SDLoc &DL, EVT VT)
	Return the expression required to extend the Op as a pointer value assuming it was the smaller SrcTy value.
LLVM_ABI SDValue	getBoolExtOrTrunc (SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT)
	Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate for the target's BooleanContent for type OpVT or truncating it.
LLVM_ABI SDValue	getNegative (SDValue Val, const SDLoc &DL, EVT VT)
	Create negative operation as (SUB 0, Val).
LLVM_ABI SDValue	getNOT (const SDLoc &DL, SDValue Val, EVT VT)
	Create a bitwise NOT operation as (XOR Val, -1).
LLVM_ABI SDValue	getLogicalNOT (const SDLoc &DL, SDValue Val, EVT VT)
	Create a logical NOT operation as (XOR Val, BooleanOne).
LLVM_ABI SDValue	getMemBasePlusOffset (SDValue Base, TypeSize Offset, const SDLoc &DL, const SDNodeFlags Flags=SDNodeFlags())
	Returns sum of the base pointer and offset.
LLVM_ABI SDValue	getMemBasePlusOffset (SDValue Base, SDValue Offset, const SDLoc &DL, const SDNodeFlags Flags=SDNodeFlags())
SDValue	getObjectPtrOffset (const SDLoc &SL, SDValue Ptr, TypeSize Offset)
	Create an add instruction with appropriate flags when used for addressing some offset of an object.
SDValue	getObjectPtrOffset (const SDLoc &SL, SDValue Ptr, SDValue Offset)
SDValue	getCALLSEQ_START (SDValue Chain, uint64_t InSize, uint64_t OutSize, const SDLoc &DL)
	Return a new CALLSEQ_START node, that starts new call frame, in which InSize bytes are set up inside CALLSEQ_START..CALLSEQ_END sequence and OutSize specifies part of the frame set up prior to the sequence.
SDValue	getCALLSEQ_END (SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, const SDLoc &DL)
	Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd).
SDValue	getCALLSEQ_END (SDValue Chain, uint64_t Size1, uint64_t Size2, SDValue Glue, const SDLoc &DL)
LLVM_ABI bool	isUndef (unsigned Opcode, ArrayRef< SDValue > Ops)
	Return true if the result of this operation is always undefined.
SDValue	getUNDEF (EVT VT)
	Return an UNDEF node. UNDEF does not have a useful SDLoc.
SDValue	getPOISON (EVT VT)
	Return a POISON node. POISON does not have a useful SDLoc.
LLVM_ABI SDValue	getVScale (const SDLoc &DL, EVT VT, APInt MulImm)
	Return a node that represents the runtime scaling 'MulImm * RuntimeVL'.
LLVM_ABI SDValue	getElementCount (const SDLoc &DL, EVT VT, ElementCount EC)
LLVM_ABI SDValue	getTypeSize (const SDLoc &DL, EVT VT, TypeSize TS)
LLVM_ABI SDValue	getMaskFromElementCount (const SDLoc &DL, EVT VT, ElementCount Len)
	Return a vector with the first 'Len' lanes set to true and remaining lanes set to false.
SDValue	getGLOBAL_OFFSET_TABLE (EVT VT)
	Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc.
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
	Gets or creates the specified node.
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, ArrayRef< SDValue > Ops, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, ArrayRef< SDValue > Ops)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT)
	Gets or creates the specified node.
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5, const SDNodeFlags Flags)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, SDValue N2)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4)
LLVM_ABI SDValue	getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5)
LLVM_ABI SDValue	getStackArgumentTokenFactor (SDValue Chain)
	Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.
LLVM_ABI std::pair< SDValue, SDValue >	getMemccpy (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue C, SDValue Size, const CallInst *CI)
	Lower a memccpy operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.
LLVM_ABI std::pair< SDValue, SDValue >	getMemcmp (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, const CallInst *CI)
	Lower a memcmp operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.
LLVM_ABI std::pair< SDValue, SDValue >	getStrcmp (SDValue Chain, const SDLoc &dl, SDValue S0, SDValue S1, const CallInst *CI)
	Lower a strcmp operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.
LLVM_ABI std::pair< SDValue, SDValue >	getStrcpy (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, const CallInst *CI)
	Lower a strcpy operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.
LLVM_ABI std::pair< SDValue, SDValue >	getStrlen (SDValue Chain, const SDLoc &dl, SDValue Src, const CallInst *CI)
	Lower a strlen operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.
LLVM_ABI std::pair< SDValue, SDValue >	getStrstr (SDValue Chain, const SDLoc &dl, SDValue S0, SDValue S1, const CallInst *CI)
	Lower a strstr operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.
LLVM_ABI SDValue	getMemcpy (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, Align DstAlign, Align SrcAlign, bool isVol, bool AlwaysInline, const CallInst *CI, std::optional< bool > OverrideTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo, const AAMDNodes &AAInfo=AAMDNodes(), BatchAAResults *BatchAA=nullptr)
LLVM_ABI SDValue	getMemmove (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, Align DstAlign, Align SrcAlign, bool isVol, const CallInst *CI, std::optional< bool > OverrideTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo, const AAMDNodes &AAInfo=AAMDNodes(), BatchAAResults *BatchAA=nullptr)
LLVM_ABI SDValue	getMemset (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, Align Alignment, bool isVol, bool AlwaysInline, const CallInst *CI, MachinePointerInfo DstPtrInfo, const AAMDNodes &AAInfo=AAMDNodes())
LLVM_ABI SDValue	getAtomicMemcpy (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, Type *SizeTy, unsigned ElemSz, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
LLVM_ABI SDValue	getAtomicMemmove (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, Type *SizeTy, unsigned ElemSz, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
LLVM_ABI SDValue	getAtomicMemset (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Value, SDValue Size, Type *SizeTy, unsigned ElemSz, bool isTailCall, MachinePointerInfo DstPtrInfo)
SDValue	getSetCC (const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond, SDValue Chain=SDValue(), bool IsSignaling=false, SDNodeFlags Flags={})
	Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue.
SDValue	getSelect (const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS, SDNodeFlags Flags=SDNodeFlags())
	Helper function to make it easier to build Select's if you just have operands and don't want to check for vector.
SDValue	getSelectCC (const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond, SDNodeFlags Flags=SDNodeFlags())
	Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an SDValue.
LLVM_ABI SDValue	simplifySelect (SDValue Cond, SDValue TVal, SDValue FVal)
	Try to simplify a select/vselect into 1 of its operands or a constant.
LLVM_ABI SDValue	simplifyShift (SDValue X, SDValue Y)
	Try to simplify a shift into 1 of its operands or a constant.
LLVM_ABI SDValue	simplifyFPBinop (unsigned Opcode, SDValue X, SDValue Y, SDNodeFlags Flags)
	Try to simplify a floating-point binary operation into 1 of its operands or a constant.
LLVM_ABI SDValue	getVAArg (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
	VAArg produces a result and token chain, and takes a pointer and a source value as input.
LLVM_ABI SDValue	getAtomicCmpSwap (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachineMemOperand *MMO)
	Gets a node for an atomic cmpxchg op.
LLVM_ABI SDValue	getAtomic (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO)
	Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands.
LLVM_ABI SDValue	getAtomic (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTList, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, ISD::LoadExtType ExtType=ISD::NON_EXTLOAD)
	Gets a node for an atomic op, produces result and chain and takes N operands.
LLVM_ABI SDValue	getAtomicLoad (ISD::LoadExtType ExtType, const SDLoc &dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO)
LLVM_ABI SDValue	getMemIntrinsicNode (unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags Flags=MachineMemOperand::MOLoad|MachineMemOperand::MOStore, LocationSize Size=LocationSize::precise(0), const AAMDNodes &AAInfo=AAMDNodes())
	Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
SDValue	getMemIntrinsicNode (unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, MaybeAlign Alignment=std::nullopt, MachineMemOperand::Flags Flags=MachineMemOperand::MOLoad|MachineMemOperand::MOStore, LocationSize Size=LocationSize::precise(0), const AAMDNodes &AAInfo=AAMDNodes())
LLVM_ABI SDValue	getMemIntrinsicNode (unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachineMemOperand *MMO)
LLVM_ABI SDValue	getMemIntrinsicNode (unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, ArrayRef< MachineMemOperand * > MMOs)
	getMemIntrinsicNode - Creates a MemIntrinsicNode with multiple MMOs.
LLVM_ABI SDValue	getLifetimeNode (bool IsStart, const SDLoc &dl, SDValue Chain, int FrameIndex)
	Creates a LifetimeSDNode that starts (IsStart==true) or ends (IsStart==false) the lifetime of the FrameIndex.
LLVM_ABI SDValue	getPseudoProbeNode (const SDLoc &Dl, SDValue Chain, uint64_t Guid, uint64_t Index, uint32_t Attr)
	Creates a PseudoProbeSDNode with function GUID Guid and the index of the block Index it is probing, as well as the attributes attr of the probe.
LLVM_ABI SDValue	getMergeValues (ArrayRef< SDValue > Ops, const SDLoc &dl)
	Create a MERGE_VALUES node from the given operands.
LLVM_ABI SDValue	getErrorMergeValues (ArrayRef< EVT > ResultTypes, SDValue Chain, const SDLoc &dl)
	Return poison values for each of ResultTypes, substituting Chain for any result of type MVT::Other, merged into a single MERGE_VALUES node.
LLVM_ABI SDValue	getLoad (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
	Loads are not normal binary operators: their result type is not determined by their operands, and they produce a value AND a token chain.
LLVM_ABI SDValue	getLoad (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO)
LLVM_ABI SDValue	getExtLoad (ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
LLVM_ABI SDValue	getExtLoad (ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO)
LLVM_ABI SDValue	getIndexedLoad (SDValue OrigLoad, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
LLVM_ABI SDValue	getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
SDValue	getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
LLVM_ABI SDValue	getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO)
LLVM_ABI SDValue	getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
	Helper function to build ISD::STORE nodes.
SDValue	getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
LLVM_ABI SDValue	getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachineMemOperand *MMO)
LLVM_ABI SDValue	getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Offset, MachineMemOperand *MMO)
LLVM_ABI SDValue	getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
LLVM_ABI SDValue	getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
LLVM_ABI SDValue	getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Offset, EVT SVT, MachineMemOperand *MMO)
SDValue	getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT SVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const MMOMetadata &Metadata=MMOMetadata())
LLVM_ABI SDValue	getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, EVT SVT, MachineMemOperand *MMO)
LLVM_ABI SDValue	getIndexedStore (SDValue OrigStore, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
LLVM_ABI SDValue	getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Offset, EVT SVT, MachineMemOperand *MMO, ISD::MemIndexedMode AM, bool IsTruncating=false)
LLVM_ABI SDValue	getLoadVP (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT, Align Alignment, MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo, const MDNode *Ranges=nullptr, bool IsExpanding=false)
SDValue	getLoadVP (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment=MaybeAlign(), MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, bool IsExpanding=false)
LLVM_ABI SDValue	getLoadVP (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, SDValue Mask, SDValue EVL, EVT MemVT, MachineMemOperand *MMO, bool IsExpanding=false)
LLVM_ABI SDValue	getLoadVP (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo, const MDNode *Ranges=nullptr, bool IsExpanding=false)
LLVM_ABI SDValue	getLoadVP (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, MachineMemOperand *MMO, bool IsExpanding=false)
LLVM_ABI SDValue	getExtLoadVP (ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo, bool IsExpanding=false)
LLVM_ABI SDValue	getExtLoadVP (ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, EVT MemVT, MachineMemOperand *MMO, bool IsExpanding=false)
LLVM_ABI SDValue	getIndexedLoadVP (SDValue OrigLoad, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
LLVM_ABI SDValue	getStoreVP (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Offset, SDValue Mask, SDValue EVL, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexedMode AM, bool IsTruncating=false, bool IsCompressing=false)
LLVM_ABI SDValue	getTruncStoreVP (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT SVT, Align Alignment, MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo, bool IsCompressing=false)
LLVM_ABI SDValue	getTruncStoreVP (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Mask, SDValue EVL, EVT SVT, MachineMemOperand *MMO, bool IsCompressing=false)
LLVM_ABI SDValue	getIndexedStoreVP (SDValue OrigStore, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
LLVM_ABI SDValue	getStridedLoadVP (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr, SDValue Offset, SDValue Stride, SDValue Mask, SDValue EVL, EVT MemVT, MachineMemOperand *MMO, bool IsExpanding=false)
LLVM_ABI SDValue	getStridedLoadVP (EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr, SDValue Stride, SDValue Mask, SDValue EVL, MachineMemOperand *MMO, bool IsExpanding=false)
LLVM_ABI SDValue	getExtStridedLoadVP (ISD::LoadExtType ExtType, const SDLoc &DL, EVT VT, SDValue Chain, SDValue Ptr, SDValue Stride, SDValue Mask, SDValue EVL, EVT MemVT, MachineMemOperand *MMO, bool IsExpanding=false)
LLVM_ABI SDValue	getStridedStoreVP (SDValue Chain, const SDLoc &DL, SDValue Val, SDValue Ptr, SDValue Offset, SDValue Stride, SDValue Mask, SDValue EVL, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexedMode AM, bool IsTruncating=false, bool IsCompressing=false)
LLVM_ABI SDValue	getTruncStridedStoreVP (SDValue Chain, const SDLoc &DL, SDValue Val, SDValue Ptr, SDValue Stride, SDValue Mask, SDValue EVL, EVT SVT, MachineMemOperand *MMO, bool IsCompressing=false)
LLVM_ABI SDValue	getGatherVP (SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, ISD::MemIndexType IndexType)
LLVM_ABI SDValue	getScatterVP (SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, ISD::MemIndexType IndexType)
LLVM_ABI SDValue	getMaskedLoad (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Base, SDValue Offset, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexedMode AM, ISD::LoadExtType, bool IsExpanding=false)
LLVM_ABI SDValue	getIndexedMaskedLoad (SDValue OrigLoad, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
LLVM_ABI SDValue	getMaskedStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Base, SDValue Offset, SDValue Mask, EVT MemVT, MachineMemOperand *MMO, ISD::MemIndexedMode AM, bool IsTruncating=false, bool IsCompressing=false)
LLVM_ABI SDValue	getIndexedMaskedStore (SDValue OrigStore, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
LLVM_ABI SDValue	getMaskedGather (SDVTList VTs, EVT MemVT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, ISD::MemIndexType IndexType, ISD::LoadExtType ExtTy)
LLVM_ABI SDValue	getMaskedScatter (SDVTList VTs, EVT MemVT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, ISD::MemIndexType IndexType, bool IsTruncating=false)
LLVM_ABI SDValue	getMaskedHistogram (SDVTList VTs, EVT MemVT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, ISD::MemIndexType IndexType)
LLVM_ABI SDValue	getLoadFFVP (EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL, MachineMemOperand *MMO)
LLVM_ABI SDValue	getGetFPEnv (SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO)
LLVM_ABI SDValue	getSetFPEnv (SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO)
LLVM_ABI SDValue	getSrcValue (const Value *v)
	Construct a node to track a Value* through the backend.
LLVM_ABI SDValue	getMDNode (const MDNode *MD)
	Return an MDNodeSDNode which holds an MDNode.
LLVM_ABI SDValue	getBitcast (EVT VT, SDValue V)
	Return a bitcast using the SDLoc of the value operand, and casting to the provided type.
LLVM_ABI SDValue	getAddrSpaceCast (const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS)
	Return an AddrSpaceCastSDNode.
LLVM_ABI SDValue	getFreeze (SDValue V)
	Return a freeze using the SDLoc of the value operand.
LLVM_ABI SDValue	getFreeze (SDValue V, const APInt &DemandedElts, UndefPoisonKind Kind=UndefPoisonKind::UndefOrPoison)
	Return a freeze of V if any of the demanded elts may be undef or poison.
LLVM_ABI SDValue	getAssertAlign (const SDLoc &DL, SDValue V, Align A)
	Return an AssertAlignSDNode.
LLVM_ABI void	canonicalizeCommutativeBinop (unsigned Opcode, SDValue &N1, SDValue &N2) const
	Swap N1 and N2 if Opcode is a commutative binary opcode and the canonical form expects the opposite order.
LLVM_ABI SDValue	getShiftAmountOperand (EVT LHSTy, SDValue Op)
	Return the specified value casted to the target's desired shift amount type.
LLVM_ABI SDValue	expandVAArg (SDNode *Node)
	Expand the specified ISD::VAARG node as the Legalize pass would.
LLVM_ABI SDValue	expandVACopy (SDNode *Node)
	Expand the specified ISD::VACOPY node as the Legalize pass would.
LLVM_ABI SDValue	getSymbolFunctionGlobalAddress (SDValue Op, Function **TargetFunction=nullptr)
	Return a GlobalAddress of the function from the current module with name matching the given ExternalSymbol.
LLVM_ABI SDNode *	UpdateNodeOperands (SDNode *N, SDValue Op)
	Mutate the specified node in-place to have the specified operands.
LLVM_ABI SDNode *	UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2)
LLVM_ABI SDNode *	UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3)
LLVM_ABI SDNode *	UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4)
LLVM_ABI SDNode *	UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4, SDValue Op5)
LLVM_ABI SDNode *	UpdateNodeOperands (SDNode *N, ArrayRef< SDValue > Ops)
LLVM_ABI SDValue	getTokenFactor (const SDLoc &DL, SmallVectorImpl< SDValue > &Vals)
	Creates a new TokenFactor containing Vals.
LLVM_ABI void	setNodeMemRefs (MachineSDNode *N, ArrayRef< MachineMemOperand * > NewMemRefs)
	Mutate the specified machine node's memory references to the provided list.
LLVM_ABI bool	calculateDivergence (SDNode *N)
LLVM_ABI void	updateDivergence (SDNode *N)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT)
	These are used for target selectors to mutate the specified node to have the specified return type, Target opcode, and operands.
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT, ArrayRef< SDValue > Ops)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, ArrayRef< SDValue > Ops)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, ArrayRef< SDValue > Ops)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2)
LLVM_ABI SDNode *	SelectNodeTo (SDNode *N, unsigned MachineOpc, SDVTList VTs, ArrayRef< SDValue > Ops)
LLVM_ABI SDNode *	MorphNodeTo (SDNode *N, unsigned Opc, SDVTList VTs, ArrayRef< SDValue > Ops)
	This mutates the specified node to have the specified return type, opcode, and operands.
LLVM_ABI SDNode *	mutateStrictFPToFP (SDNode *Node)
	Mutate the specified strict FP node to its non-strict equivalent, unlinking the node from its chain and dropping the metadata arguments.
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT)
	These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, SDValue Op1)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, SDValue Op1, SDValue Op2)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, ArrayRef< SDValue > Ops)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, ArrayRef< SDValue > Ops)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, EVT VT3, ArrayRef< SDValue > Ops)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops)
LLVM_ABI MachineSDNode *	getMachineNode (unsigned Opcode, const SDLoc &dl, SDVTList VTs, ArrayRef< SDValue > Ops)
LLVM_ABI SDValue	getTargetExtractSubreg (int SRIdx, const SDLoc &DL, EVT VT, SDValue Operand)
	A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
LLVM_ABI SDValue	getTargetInsertSubreg (int SRIdx, const SDLoc &DL, EVT VT, SDValue Operand, SDValue Subreg)
	A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
LLVM_ABI SDNode *	getNodeIfExists (unsigned Opcode, SDVTList VTList, ArrayRef< SDValue > Ops, const SDNodeFlags Flags, bool AllowCommute=false)
	Get the specified node if it's already available, or else return NULL.
LLVM_ABI SDNode *	getNodeIfExists (unsigned Opcode, SDVTList VTList, ArrayRef< SDValue > Ops, bool AllowCommute=false)
	getNodeIfExists - Get the specified node if it's already available, or else return NULL.
LLVM_ABI bool	doesNodeExist (unsigned Opcode, SDVTList VTList, ArrayRef< SDValue > Ops)
	Check if a node exists without modifying its flags.
LLVM_ABI SDDbgValue *	getDbgValue (DIVariable *Var, DIExpression *Expr, SDNode *N, unsigned R, bool IsIndirect, const DebugLoc &DL, unsigned O)
	Creates a SDDbgValue node.
LLVM_ABI SDDbgValue *	getConstantDbgValue (DIVariable *Var, DIExpression *Expr, const Value *C, const DebugLoc &DL, unsigned O)
	Creates a constant SDDbgValue node.
LLVM_ABI SDDbgValue *	getFrameIndexDbgValue (DIVariable *Var, DIExpression *Expr, unsigned FI, bool IsIndirect, const DebugLoc &DL, unsigned O)
	Creates a FrameIndex SDDbgValue node.
LLVM_ABI SDDbgValue *	getFrameIndexDbgValue (DIVariable *Var, DIExpression *Expr, unsigned FI, ArrayRef< SDNode * > Dependencies, bool IsIndirect, const DebugLoc &DL, unsigned O)
	Creates a FrameIndex SDDbgValue node.
LLVM_ABI SDDbgValue *	getVRegDbgValue (DIVariable *Var, DIExpression *Expr, Register VReg, bool IsIndirect, const DebugLoc &DL, unsigned O)
	Creates a VReg SDDbgValue node.
LLVM_ABI SDDbgValue *	getDbgValueList (DIVariable *Var, DIExpression *Expr, ArrayRef< SDDbgOperand > Locs, ArrayRef< SDNode * > Dependencies, bool IsIndirect, const DebugLoc &DL, unsigned O, bool IsVariadic)
	Creates a SDDbgValue node from a list of locations.
LLVM_ABI SDDbgLabel *	getDbgLabel (DILabel *Label, const DebugLoc &DL, unsigned O)
	Creates a SDDbgLabel node.
LLVM_ABI void	transferDbgValues (SDValue From, SDValue To, unsigned OffsetInBits=0, unsigned SizeInBits=0, bool InvalidateDbg=true)
	Transfer debug values from one node to another, while optionally generating fragment expressions for split-up values.
LLVM_ABI void	RemoveDeadNode (SDNode *N)
	Remove the specified node from the system.
LLVM_ABI void	RemoveDeadNodes (SmallVectorImpl< SDNode * > &DeadNodes)
	This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result.
LLVM_ABI void	ReplaceAllUsesWith (SDValue From, SDValue To)
	Modify anything using 'From' to use 'To' instead.
LLVM_ABI void	ReplaceAllUsesWith (SDNode *From, SDNode *To)
	ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
LLVM_ABI void	ReplaceAllUsesWith (SDNode *From, const SDValue *To)
	ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
LLVM_ABI void	ReplaceAllUsesOfValueWith (SDValue From, SDValue To)
	Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
LLVM_ABI void	ReplaceAllUsesOfValuesWith (const SDValue *From, const SDValue *To, unsigned Num)
	Like ReplaceAllUsesOfValueWith, but for multiple values at once.
LLVM_ABI SDValue	makeEquivalentMemoryOrdering (SDValue OldChain, SDValue NewMemOpChain)
	If an existing load has uses of its chain, create a token factor node with that chain and the new memory node's chain and update users of the old chain to the token factor.
LLVM_ABI SDValue	makeEquivalentMemoryOrdering (LoadSDNode *OldLoad, SDValue NewMemOp)
	If an existing load has uses of its chain, create a token factor node with that chain and the new memory node's chain and update users of the old chain to the token factor.
LLVM_ABI void	getTopologicallyOrderedNodes (SmallVectorImpl< const SDNode * > &SortedNodes) const
	Get all the nodes in their topological order without modifying any states.
LLVM_ABI unsigned	AssignTopologicalOrder ()
	Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on their topological order.
void	RepositionNode (allnodes_iterator Position, SDNode *N)
	Move node N in the AllNodes list to be immediately before the given iterator Position.
LLVM_ABI void	AddDbgValue (SDDbgValue *DB, bool isParameter)
	Add a dbg_value SDNode.
LLVM_ABI void	AddDbgLabel (SDDbgLabel *DB)
	Add a dbg_label SDNode.
ArrayRef< SDDbgValue * >	GetDbgValues (const SDNode *SD) const
	Get the debug values which reference the given SDNode.
bool	hasDebugValues () const
	Return true if there are any SDDbgValue nodes associated with this SelectionDAG.
SDDbgInfo::DbgIterator	DbgBegin () const
SDDbgInfo::DbgIterator	DbgEnd () const
SDDbgInfo::DbgIterator	ByvalParmDbgBegin () const
SDDbgInfo::DbgIterator	ByvalParmDbgEnd () const
SDDbgInfo::DbgLabelIterator	DbgLabelBegin () const
SDDbgInfo::DbgLabelIterator	DbgLabelEnd () const
LLVM_ABI void	salvageDebugInfo (SDNode &N)
	To be invoked on an SDNode that is slated to be erased.
LLVM_ABI void	dump () const
	Dump the textual format of this DAG.
LLVM_ABI void	dump (bool Sorted) const
	Dump the textual format of this DAG.
LLVM_ABI Align	getReducedAlign (EVT VT, bool UseABI)
	In most cases this function returns the ABI alignment for a given type, except for illegal vector types where the alignment exceeds that of the stack.
LLVM_ABI SDValue	CreateStackTemporary (TypeSize Bytes, Align Alignment)
	Create a stack temporary based on the size in bytes and the alignment.
LLVM_ABI SDValue	CreateStackTemporary (EVT VT, unsigned minAlign=1)
	Create a stack temporary, suitable for holding the specified value type.
LLVM_ABI SDValue	CreateStackTemporary (EVT VT1, EVT VT2)
	Create a stack temporary suitable for holding either of the specified value types.
LLVM_ABI SDValue	FoldSymbolOffset (unsigned Opcode, EVT VT, const GlobalAddressSDNode *GA, const SDNode *N2)
LLVM_ABI SDValue	FoldConstantArithmetic (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops, SDNodeFlags Flags=SDNodeFlags())
LLVM_ABI SDValue	foldConstantFPMath (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops)
	Fold floating-point operations when all operands are constants and/or undefined.
LLVM_ABI SDValue	FoldConstantBuildVector (BuildVectorSDNode *BV, const SDLoc &DL, EVT DstEltVT)
	Fold BUILD_VECTOR of constants/undefs to the destination type BUILD_VECTOR of constants/undefs elements.
LLVM_ABI SDValue	FoldSetCC (EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, const SDLoc &dl, SDNodeFlags Flags={})
	Constant fold a setcc to true or false.
LLVM_ABI bool	SignBitIsZero (SDValue Op, unsigned Depth=0) const
	Return true if the sign bit of Op is known to be zero.
LLVM_ABI bool	SignBitIsZeroFP (SDValue Op, unsigned Depth=0) const
	Return true if the sign bit of Op is known to be zero, for a floating-point value.
LLVM_ABI bool	MaskedValueIsZero (SDValue Op, const APInt &Mask, unsigned Depth=0) const
	Return true if 'Op & Mask' is known to be zero.
LLVM_ABI bool	MaskedValueIsZero (SDValue Op, const APInt &Mask, const APInt &DemandedElts, unsigned Depth=0) const
	Return true if 'Op & Mask' is known to be zero in DemandedElts.
LLVM_ABI bool	MaskedVectorIsZero (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Return true if 'Op' is known to be zero in DemandedElts.
LLVM_ABI bool	MaskedValueIsAllOnes (SDValue Op, const APInt &Mask, unsigned Depth=0) const
	Return true if '(Op & Mask) == Mask'.
LLVM_ABI APInt	computeVectorKnownZeroElements (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	For each demanded element of a vector, see if it is known to be zero.
LLVM_ABI KnownBits	computeKnownBits (SDValue Op, unsigned Depth=0) const
	Determine which bits of Op are known to be either zero or one and return them in Known.
LLVM_ABI KnownBits	computeKnownBits (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Determine which bits of Op are known to be either zero or one and return them in Known.
LLVM_ABI ConstantRange	computeConstantRange (SDValue Op, bool ForSigned, unsigned Depth=0) const
	Determine the possible constant range of an integer or vector of integers.
LLVM_ABI ConstantRange	computeConstantRange (SDValue Op, const APInt &DemandedElts, bool ForSigned, unsigned Depth=0) const
	Determine the possible constant range of an integer or vector of integers.
LLVM_ABI ConstantRange	computeConstantRangeIncludingKnownBits (SDValue Op, bool ForSigned, unsigned Depth=0) const
	Combine constant ranges from computeConstantRange() and computeKnownBits().
LLVM_ABI ConstantRange	computeConstantRangeIncludingKnownBits (SDValue Op, const APInt &DemandedElts, bool ForSigned, unsigned Depth=0) const
	Combine constant ranges from computeConstantRange() and computeKnownBits().
LLVM_ABI OverflowKind	computeOverflowForSignedAdd (SDValue N0, SDValue N1) const
	Determine if the result of the signed addition of 2 nodes can overflow.
LLVM_ABI OverflowKind	computeOverflowForUnsignedAdd (SDValue N0, SDValue N1) const
	Determine if the result of the unsigned addition of 2 nodes can overflow.
OverflowKind	computeOverflowForAdd (bool IsSigned, SDValue N0, SDValue N1) const
	Determine if the result of the addition of 2 nodes can overflow.
bool	willNotOverflowAdd (bool IsSigned, SDValue N0, SDValue N1) const
	Determine if the result of the addition of 2 nodes can never overflow.
LLVM_ABI OverflowKind	computeOverflowForSignedSub (SDValue N0, SDValue N1) const
	Determine if the result of the signed sub of 2 nodes can overflow.
LLVM_ABI OverflowKind	computeOverflowForUnsignedSub (SDValue N0, SDValue N1) const
	Determine if the result of the unsigned sub of 2 nodes can overflow.
OverflowKind	computeOverflowForSub (bool IsSigned, SDValue N0, SDValue N1) const
	Determine if the result of the sub of 2 nodes can overflow.
bool	willNotOverflowSub (bool IsSigned, SDValue N0, SDValue N1) const
	Determine if the result of the sub of 2 nodes can never overflow.
LLVM_ABI OverflowKind	computeOverflowForSignedMul (SDValue N0, SDValue N1) const
	Determine if the result of the signed mul of 2 nodes can overflow.
LLVM_ABI OverflowKind	computeOverflowForUnsignedMul (SDValue N0, SDValue N1) const
	Determine if the result of the unsigned mul of 2 nodes can overflow.
OverflowKind	computeOverflowForMul (bool IsSigned, SDValue N0, SDValue N1) const
	Determine if the result of the mul of 2 nodes can overflow.
bool	willNotOverflowMul (bool IsSigned, SDValue N0, SDValue N1) const
	Determine if the result of the mul of 2 nodes can never overflow.
LLVM_ABI bool	isIdentityElement (unsigned Opc, SDNodeFlags Flags, SDValue V, unsigned OperandNo, unsigned Depth=0) const
	Returns true if V is an identity element of Opc with Flags.
LLVM_ABI bool	isIdentityElement (unsigned Opc, SDNodeFlags Flags, SDValue V, const APInt &DemandedElts, unsigned OperandNo, unsigned Depth=0) const
	Returns true if the demanded vector elements of V is an identity element of Opc with Flags.
LLVM_ABI bool	isKnownToBeAPowerOfTwo (SDValue Val, bool OrZero=false, unsigned Depth=0) const
	Test if the given value is known to have exactly one bit set.
LLVM_ABI bool	isKnownToBeAPowerOfTwo (SDValue Val, const APInt &DemandedElts, bool OrZero=false, unsigned Depth=0) const
	Test if the given value is known to have exactly one bit set.
LLVM_ABI bool	isKnownToBeAPowerOfTwoFP (SDValue Val, unsigned Depth=0) const
	Test if the given fp value is known to be an integer power-of-2, either positive or negative.
LLVM_ABI unsigned	ComputeNumSignBits (SDValue Op, unsigned Depth=0) const
	Return the number of times the sign bit of the register is replicated into the other bits.
LLVM_ABI unsigned	ComputeNumSignBits (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Return the number of times the sign bit of the register is replicated into the other bits.
LLVM_ABI unsigned	ComputeMaxSignificantBits (SDValue Op, unsigned Depth=0) const
	Get the upper bound on bit size for this Value Op as a signed integer.
LLVM_ABI unsigned	ComputeMaxSignificantBits (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Get the upper bound on bit size for this Value Op as a signed integer.
LLVM_ABI bool	isGuaranteedNotToBeUndefOrPoison (SDValue Op, UndefPoisonKind Kind=UndefPoisonKind::UndefOrPoison, unsigned Depth=0) const
	Return true if this function can prove that Op is never poison and, Kind can be used to track poison and/or undef bits.
LLVM_ABI bool	isGuaranteedNotToBeUndefOrPoison (SDValue Op, const APInt &DemandedElts, UndefPoisonKind Kind=UndefPoisonKind::UndefOrPoison, unsigned Depth=0) const
	Return true if this function can prove that Op is never poison and, Kind can be used to track poison and/or undef bits.
bool	isGuaranteedNotToBePoison (SDValue Op, unsigned Depth=0) const
	Return true if this function can prove that Op is never poison.
bool	isGuaranteedNotToBePoison (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Return true if this function can prove that Op is never poison.
LLVM_ABI bool	canCreateUndefOrPoison (SDValue Op, const APInt &DemandedElts, UndefPoisonKind Kind=UndefPoisonKind::UndefOrPoison, bool ConsiderFlags=true, unsigned Depth=0) const
	Return true if Op can create undef or poison from non-undef & non-poison operands.
LLVM_ABI bool	canCreateUndefOrPoison (SDValue Op, UndefPoisonKind Kind=UndefPoisonKind::UndefOrPoison, bool ConsiderFlags=true, unsigned Depth=0) const
	Return true if Op can create undef or poison from non-undef & non-poison operands.
LLVM_ABI bool	isADDLike (SDValue Op, bool NoWrap=false) const
	Return true if the specified operand is an ISD::OR or ISD::XOR node that can be treated as an ISD::ADD node.
LLVM_ABI bool	isBaseWithConstantOffset (SDValue Op) const
	Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that is guaranteed to have the same semantics as an ADD.
LLVM_ABI KnownFPClass	computeKnownFPClass (SDValue Op, FPClassTest InterestedClasses, unsigned Depth=0) const
	Determine floating-point class information about Op.
LLVM_ABI KnownFPClass	computeKnownFPClass (SDValue Op, const APInt &DemandedElts, FPClassTest InterestedClasses, unsigned Depth=0) const
	Determine floating-point class information about Op.
LLVM_ABI bool	isKnownNeverNaN (SDValue Op, const APInt &DemandedElts, bool SNaN=false, unsigned Depth=0) const
	Test whether the given SDValue (or all elements of it, if it is a vector) is known to never be NaN in DemandedElts.
LLVM_ABI bool	isKnownNeverNaN (SDValue Op, bool SNaN=false, unsigned Depth=0) const
	Test whether the given SDValue (or all elements of it, if it is a vector) is known to never be NaN.
bool	isKnownNeverSNaN (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
bool	isKnownNeverSNaN (SDValue Op, unsigned Depth=0) const
LLVM_ABI bool	isKnownNeverLogicalZero (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Test whether the given floating point SDValue (or all elements of it, if it is a vector) is known to never be interpretable as zero in DemandedElts.
LLVM_ABI bool	isKnownNeverLogicalZero (SDValue Op, unsigned Depth=0) const
	Test whether the given floating point SDValue (or all elements of it, if it is a vector) is known to never be interpretable as zero.
LLVM_ABI bool	isKnownNeverZero (SDValue Op, unsigned Depth=0) const
	Test whether the given SDValue is known to contain non-zero value(s).
LLVM_ABI bool	isKnownNeverZero (SDValue Op, const APInt &DemandedElts, unsigned Depth=0) const
	Test whether the given SDValue is known to contain non-zero value(s).
LLVM_ABI bool	cannotBeOrderedNegativeFP (SDValue Op) const
	Test whether the given float value is known to be positive.
LLVM_ABI bool	canIgnoreSignBitOfZero (const SDUse &Use) const
	Check if a use of a float value is insensitive to signed zeros.
LLVM_ABI bool	canIgnoreSignBitOfZero (SDValue Op) const
	Check if Op has no-signed-zeros, or all users (limited to checking two for compile-time performance) are insensitive to signed zeros.
LLVM_ABI bool	isEqualTo (SDValue A, SDValue B) const
	Test whether two SDValues are known to compare equal.
LLVM_ABI bool	haveNoCommonBitsSet (SDValue A, SDValue B) const
	Return true if A and B have no common bits set.
LLVM_ABI bool	isSplatValue (SDValue V, const APInt &DemandedElts, APInt &UndefElts, unsigned Depth=0) const
	Test whether V has a splatted value for all the demanded elements.
LLVM_ABI bool	isSplatValue (SDValue V, bool AllowUndefs=false) const
	Test whether V has a splatted value.
LLVM_ABI SDValue	getSplatSourceVector (SDValue V, int &SplatIndex)
	If V is a splatted value, return the source vector and its splat index.
LLVM_ABI SDValue	getSplatValue (SDValue V, bool LegalTypes=false)
	If V is a splat vector, return its scalar source operand by extracting that element from the source vector.
LLVM_ABI std::optional< ConstantRange >	getValidShiftAmountRange (SDValue V, const APInt &DemandedElts, unsigned Depth) const
	If a SHL/SRA/SRL node V has shift amounts that are all less than the element bit-width of the shift node, return the valid constant range.
LLVM_ABI std::optional< unsigned >	getValidShiftAmount (SDValue V, const APInt &DemandedElts, unsigned Depth=0) const
	If a SHL/SRA/SRL node V has a uniform shift amount that is less than the element bit-width of the shift node, return it.
LLVM_ABI std::optional< unsigned >	getValidShiftAmount (SDValue V, unsigned Depth=0) const
	If a SHL/SRA/SRL node V has a uniform shift amount that is less than the element bit-width of the shift node, return it.
LLVM_ABI std::optional< unsigned >	getValidMinimumShiftAmount (SDValue V, const APInt &DemandedElts, unsigned Depth=0) const
	If a SHL/SRA/SRL node V has shift amounts that are all less than the element bit-width of the shift node, return the minimum possible value.
LLVM_ABI std::optional< unsigned >	getValidMinimumShiftAmount (SDValue V, unsigned Depth=0) const
	If a SHL/SRA/SRL node V has shift amounts that are all less than the element bit-width of the shift node, return the minimum possible value.
LLVM_ABI std::optional< unsigned >	getValidMaximumShiftAmount (SDValue V, const APInt &DemandedElts, unsigned Depth=0) const
	If a SHL/SRA/SRL node V has shift amounts that are all less than the element bit-width of the shift node, return the maximum possible value.
LLVM_ABI std::optional< unsigned >	getValidMaximumShiftAmount (SDValue V, unsigned Depth=0) const
	If a SHL/SRA/SRL node V has shift amounts that are all less than the element bit-width of the shift node, return the maximum possible value.
LLVM_ABI SDValue	matchBinOpReduction (SDNode *Extract, ISD::NodeType &BinOp, ArrayRef< ISD::NodeType > CandidateBinOps, bool AllowPartials=false)
	Match a binop + shuffle pyramid that represents a horizontal reduction over the elements of a vector starting from the EXTRACT_VECTOR_ELT node /p Extract.
LLVM_ABI SDValue	UnrollVectorOp (SDNode *N, unsigned ResNE=0)
	Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the scalars and operating on each element individually.
LLVM_ABI std::pair< SDValue, SDValue >	UnrollVectorOverflowOp (SDNode *N, unsigned ResNE=0)
	Like UnrollVectorOp(), but for the [US](ADD|SUB|MUL)O family of opcodes.
LLVM_ABI bool	areNonVolatileConsecutiveLoads (LoadSDNode *LD, LoadSDNode *Base, unsigned Bytes, int Dist) const
	Return true if loads are next to each other and can be merged.
LLVM_ABI MaybeAlign	InferPtrAlign (SDValue Ptr) const
	Infer alignment of a load / store address.
LLVM_ABI std::pair< SDValue, SDValue >	SplitScalar (const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
	Split the scalar node with EXTRACT_ELEMENT using the provided VTs and return the low/high part.
LLVM_ABI std::pair< EVT, EVT >	GetSplitDestVTs (const EVT &VT) const
	Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.
LLVM_ABI std::pair< EVT, EVT >	GetDependentSplitDestVTs (const EVT &VT, const EVT &EnvVT, bool *HiIsEmpty) const
	Compute the VTs needed for the low/hi parts of a type, dependent on an enveloping VT that has been split into two identical pieces.
LLVM_ABI std::pair< SDValue, SDValue >	SplitVector (const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
	Split the vector with EXTRACT_SUBVECTOR using the provided VTs and return the low/high part.
std::pair< SDValue, SDValue >	SplitVector (const SDValue &N, const SDLoc &DL)
	Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
LLVM_ABI std::pair< SDValue, SDValue >	SplitEVL (SDValue N, EVT VecVT, const SDLoc &DL)
	Split the explicit vector length parameter of a VP operation.
std::pair< SDValue, SDValue >	SplitVectorOperand (const SDNode *N, unsigned OpNo)
	Split the node's operand with EXTRACT_SUBVECTOR and return the low/high part.
LLVM_ABI SDValue	WidenVector (const SDValue &N, const SDLoc &DL)
	Widen the vector up to the next power of two using INSERT_SUBVECTOR.
LLVM_ABI void	ExtractVectorElements (SDValue Op, SmallVectorImpl< SDValue > &Args, unsigned Start=0, unsigned Count=0, EVT EltVT=EVT())
	Append the extracted elements from Start to Count out of the vector Op in Args.
LLVM_ABI Align	getEVTAlign (EVT MemoryVT) const
	Compute the default alignment value for the given type.
LLVM_ABI bool	isConstantIntBuildVectorOrConstantInt (SDValue N, bool AllowOpaques=true) const
	Test whether the given value is a constant int or similar node.
LLVM_ABI bool	isConstantFPBuildVectorOrConstantFP (SDValue N) const
	Test whether the given value is a constant FP or similar node.
bool	isConstantValueOfAnyType (SDValue N) const
LLVM_ABI std::optional< bool >	isBoolConstant (SDValue N) const
	Check if a value \op N is a constant using the target's BooleanContent for its type.
void	addCallSiteInfo (const SDNode *Node, CallSiteInfo &&CallInfo)
	Set CallSiteInfo to be associated with Node.
CallSiteInfo	getCallSiteInfo (const SDNode *Node)
	Return CallSiteInfo associated with Node, or a default if none exists.
void	addHeapAllocSite (const SDNode *Node, MDNode *MD)
	Set HeapAllocSite to be associated with Node.
MDNode *	getHeapAllocSite (const SDNode *Node) const
	Return HeapAllocSite associated with Node, or nullptr if none exists.
void	addPCSections (const SDNode *Node, MDNode *MD)
	Set PCSections to be associated with Node.
void	addMMRAMetadata (const SDNode *Node, MDNode *MMRA)
	Set MMRAMetadata to be associated with Node.
MDNode *	getPCSections (const SDNode *Node) const
	Return PCSections associated with Node, or nullptr if none exists.
MDNode *	getMMRAMetadata (const SDNode *Node) const
	Return the MMRA MDNode associated with Node, or nullptr if none exists.
void	addCalledGlobal (const SDNode *Node, const GlobalValue *GV, unsigned OpFlags)
	Set CalledGlobal to be associated with Node.
std::optional< CalledGlobalInfo >	getCalledGlobal (const SDNode *Node)
	Return CalledGlobal associated with Node, or a nullopt if none exists.
void	addNoMergeSiteInfo (const SDNode *Node, bool NoMerge)
	Set NoMergeSiteInfo to be associated with Node if NoMerge is true.
bool	getNoMergeSiteInfo (const SDNode *Node) const
	Return NoMerge info associated with Node.
LLVM_ABI void	copyExtraInfo (SDNode *From, SDNode *To)
	Copy extra info associated with one node to another.
DenormalMode	getDenormalMode (EVT VT) const
	Return the current function's default denormal handling kind for the given floating point type.
LLVM_ABI bool	shouldOptForSize () const
LLVM_ABI SDValue	getIdentityElement (unsigned Opcode, const SDLoc &DL, EVT VT, SDNodeFlags Flags)
	Get the (commutative) identity element for the given opcode, if it exists.
LLVM_ABI SDValue	getPartialReduceMLS (unsigned Opc, const SDLoc &DL, SDValue Acc, SDValue LHS, SDValue RHS)
	Get an expression that implements a partial multiply-subtract reduction.
bool	isSafeToSpeculativelyExecute (unsigned Opcode) const
	Some opcodes may create immediate undefined behavior when used with some values (integer division-by-zero for example).
bool	isSafeToSpeculativelyExecuteNode (const SDNode *N) const
	Check if the provided node is save to speculatively executed given its current arguments.
LLVM_ABI SDValue	makeStateFunctionCall (unsigned LibFunc, SDValue Ptr, SDValue InChain, const SDLoc &DLoc)
	Helper used to make a call to a library function that has one argument of pointer type.
LLVM_ABI SDValue	getConstant (uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
	Create a ConstantSDNode wrapping a constant value.
LLVM_ABI SDValue	getConstant (const APInt &Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
LLVM_ABI SDValue	getSignedConstant (int64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
LLVM_ABI SDValue	getAllOnesConstant (const SDLoc &DL, EVT VT, bool IsTarget=false, bool IsOpaque=false)
LLVM_ABI SDValue	getConstant (const ConstantInt &Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
LLVM_ABI SDValue	getIntPtrConstant (uint64_t Val, const SDLoc &DL, bool isTarget=false)
LLVM_ABI SDValue	getShiftAmountConstant (uint64_t Val, EVT VT, const SDLoc &DL)
LLVM_ABI SDValue	getShiftAmountConstant (const APInt &Val, EVT VT, const SDLoc &DL)
LLVM_ABI SDValue	getVectorIdxConstant (uint64_t Val, const SDLoc &DL, bool isTarget=false)
SDValue	getTargetConstant (uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
SDValue	getTargetConstant (const APInt &Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
SDValue	getTargetConstant (const ConstantInt &Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
SDValue	getSignedTargetConstant (int64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
LLVM_ABI SDValue	getBoolConstant (bool V, const SDLoc &DL, EVT VT, EVT OpVT)
	Create a true or false constant of type VT using the target's BooleanContent for type OpVT.
LLVM_ABI SDValue	getConstantFP (double Val, const SDLoc &DL, EVT VT, bool isTarget=false)
	Create a ConstantFPSDNode wrapping a constant value.
LLVM_ABI SDValue	getConstantFP (const APFloat &Val, const SDLoc &DL, EVT VT, bool isTarget=false)
LLVM_ABI SDValue	getConstantFP (const ConstantFP &V, const SDLoc &DL, EVT VT, bool isTarget=false)
SDValue	getTargetConstantFP (double Val, const SDLoc &DL, EVT VT)
SDValue	getTargetConstantFP (const APFloat &Val, const SDLoc &DL, EVT VT)
SDValue	getTargetConstantFP (const ConstantFP &Val, const SDLoc &DL, EVT VT)

Static Public Member Functions
static LLVM_ABI unsigned	getHasPredecessorMaxSteps ()
static unsigned	getOpcode_EXTEND (unsigned Opcode)
	Convert *_EXTEND_VECTOR_INREG to *_EXTEND opcode.
static unsigned	getOpcode_EXTEND_VECTOR_INREG (unsigned Opcode)
	Convert *_EXTEND to *_EXTEND_VECTOR_INREG opcode.

Public Attributes
bool	NewNodesMustHaveLegalTypes = false
	When true, additional steps are taken to ensure that getConstant() and similar functions return DAG nodes that have legal types.

Static Public Attributes
static constexpr unsigned	MaxRecursionDepth = 6

Friends
struct	DAGUpdateListener
	DAGUpdateListener is a friend so it can manipulate the listener stack.

Detailed Description

This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representation suitable for instruction selection.

This DAG is constructed as the first step of instruction selection in order to allow implementation of machine specific optimizations and code simplifications.

The representation used by the SelectionDAG is a target-independent representation, which has some similarities to the GCC RTL representation, but is significantly more simple, powerful, and is a graph form instead of a linear form.

Definition at line 185 of file SelectionDAG.h.

Member Typedef Documentation

allnodes_const_iterator

using llvm::SelectionDAG::allnodes_const_iterator = ilist<SDNode>::const_iterator

Definition at line 548 of file SelectionDAG.h.

allnodes_iterator

using llvm::SelectionDAG::allnodes_iterator = ilist<SDNode>::iterator

Definition at line 553 of file SelectionDAG.h.

Member Enumeration Documentation

OverflowKind

enum llvm::SelectionDAG::OverflowKind

Used to represent the possible overflow behavior of an operation.

Never: the operation cannot overflow. Always: the operation will always overflow. Sometime: the operation may or may not overflow.

Enumerator
OFK_Never
OFK_Sometime
OFK_Always

Definition at line 2165 of file SelectionDAG.h.

Constructor & Destructor Documentation

SelectionDAG() [1/2]

SelectionDAG::SelectionDAG ( const TargetMachine & TM, CodeGenOptLevel OL )

explicit

Definition at line 1440 of file SelectionDAG.cpp.

References getEntryNode(), getVTList(), and llvm::Other.

Referenced by llvm::SelectionDAG::DAGNodeDeletedListener::DAGNodeDeletedListener(), llvm::SelectionDAG::DAGNodeInsertedListener::DAGNodeInsertedListener(), llvm::SelectionDAG::DAGUpdateListener::DAGUpdateListener(), llvm::SelectionDAG::FlagInserter::FlagInserter(), llvm::SelectionDAG::FlagInserter::FlagInserter(), operator=(), and SelectionDAG().

SelectionDAG() [2/2]

llvm::SelectionDAG::SelectionDAG ( const SelectionDAG & )

delete

References SelectionDAG().

~SelectionDAG()

SelectionDAG::~SelectionDAG

(

)

Definition at line 1470 of file SelectionDAG.cpp.

References assert().

Member Function Documentation

addCalledGlobal()

void llvm::SelectionDAG::addCalledGlobal ( const SDNode * Node, const GlobalValue * GV, unsigned OpFlags )

inline

Set CalledGlobal to be associated with Node.

Definition at line 2662 of file SelectionDAG.h.

addCallSiteInfo()

void llvm::SelectionDAG::addCallSiteInfo ( const SDNode * Node, CallSiteInfo && CallInfo )

inline

Set CallSiteInfo to be associated with Node.

Definition at line 2625 of file SelectionDAG.h.

Referenced by llvm::RISCVTargetLowering::LowerCall().

AddDbgLabel()

void SelectionDAG::AddDbgLabel

(

SDDbgLabel *

DB

)

Add a dbg_label SDNode.

Definition at line 13703 of file SelectionDAG.cpp.

AddDbgValue()

void SelectionDAG::AddDbgValue	(	SDDbgValue *	DB,
		bool	isParameter )

Add a dbg_value SDNode.

AddDbgValue - Add a dbg_value SDNode.

If SD is non-null that means the value is produced by SD.

Definition at line 13693 of file SelectionDAG.cpp.

References assert().

Referenced by handleDanglingVariadicDebugInfo(), salvageDebugInfo(), transferDbgValues(), and tryToFoldExtOfLoad().

addHeapAllocSite()

void llvm::SelectionDAG::addHeapAllocSite ( const SDNode * Node, MDNode * MD )

inline

Set HeapAllocSite to be associated with Node.

Definition at line 2634 of file SelectionDAG.h.

addMMRAMetadata()

void llvm::SelectionDAG::addMMRAMetadata ( const SDNode * Node, MDNode * MMRA )

inline

Set MMRAMetadata to be associated with Node.

Definition at line 2647 of file SelectionDAG.h.

addNoMergeSiteInfo()

void llvm::SelectionDAG::addNoMergeSiteInfo ( const SDNode * Node, bool NoMerge )

inline

Set NoMergeSiteInfo to be associated with Node if NoMerge is true.

Definition at line 2674 of file SelectionDAG.h.

Referenced by llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), and llvm::SystemZTargetLowering::LowerCall().

addPCSections()

void llvm::SelectionDAG::addPCSections ( const SDNode * Node, MDNode * MD )

inline

Set PCSections to be associated with Node.

Definition at line 2643 of file SelectionDAG.h.

allnodes() [1/2]

iterator_range< allnodes_iterator > llvm::SelectionDAG::allnodes ( )

inline

Definition at line 562 of file SelectionDAG.h.

References allnodes_begin(), allnodes_end(), and llvm::make_range().

Referenced by AssignTopologicalOrder(), dump(), getTopologicallyOrderedNodes(), and RemoveDeadNodes().

allnodes() [2/2]

iterator_range< allnodes_const_iterator > llvm::SelectionDAG::allnodes ( ) const

inline

Definition at line 565 of file SelectionDAG.h.

References allnodes_begin(), allnodes_end(), and llvm::make_range().

allnodes_begin() [1/2]

allnodes_iterator llvm::SelectionDAG::allnodes_begin ( )

inline

Definition at line 555 of file SelectionDAG.h.

allnodes_begin() [2/2]

allnodes_const_iterator llvm::SelectionDAG::allnodes_begin ( ) const

inline

Definition at line 550 of file SelectionDAG.h.

Referenced by allnodes(), allnodes(), AssignTopologicalOrder(), and Legalize().

allnodes_end() [1/2]

allnodes_iterator llvm::SelectionDAG::allnodes_end ( )

inline

Definition at line 556 of file SelectionDAG.h.

allnodes_end() [2/2]

allnodes_const_iterator llvm::SelectionDAG::allnodes_end ( ) const

inline

Definition at line 551 of file SelectionDAG.h.

Referenced by allnodes(), allnodes(), and Legalize().

allnodes_size()

ilist< SDNode >::size_type llvm::SelectionDAG::allnodes_size ( ) const

inline

Definition at line 558 of file SelectionDAG.h.

Referenced by AssignTopologicalOrder().

areNonVolatileConsecutiveLoads()

bool SelectionDAG::areNonVolatileConsecutiveLoads	(	LoadSDNode *	LD,
		LoadSDNode *	Base,
		unsigned	Bytes,
		int	Dist ) const

Return true if loads are next to each other and can be merged.

Check that both are nonvolatile and if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from.

Definition at line 14481 of file SelectionDAG.cpp.

References llvm::sampleprof::Base, llvm::EVT::getSizeInBits(), llvm::BaseIndexOffset::match(), and llvm::Offset.

Referenced by areLoadedOffsetButOtherwiseSame(), combineBVOfConsecutiveLoads(), combineConcatVectorOfShuffles(), combineINSERT_SUBVECTOR(), and EltsFromConsecutiveLoads().

AssignTopologicalOrder()

unsigned SelectionDAG::AssignTopologicalOrder

(

)

Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on their topological order.

AssignTopologicalOrder - Assign a unique node id for each node in the DAG based on their topological order.

Returns the number of nodes.

It returns the maximum id and a vector of the SDNodes* in assigned order by reference.

Definition at line 13566 of file SelectionDAG.cpp.

References allnodes(), allnodes_begin(), allnodes_size(), assert(), llvm::checkForCycles(), llvm::dbgs(), llvm::SDNode::dumprFull(), llvm::ISD::EntryToken, I, llvm_unreachable, llvm::make_early_inc_range(), N, and P.

Referenced by Legalize().

ByvalParmDbgBegin()

SDDbgInfo::DbgIterator llvm::SelectionDAG::ByvalParmDbgBegin ( ) const

inline

Definition at line 2020 of file SelectionDAG.h.

Referenced by dump().

ByvalParmDbgEnd()

SDDbgInfo::DbgIterator llvm::SelectionDAG::ByvalParmDbgEnd ( ) const

inline

Definition at line 2023 of file SelectionDAG.h.

Referenced by dump().

calculateDivergence()

bool SelectionDAG::calculateDivergence

(

SDNode *

N

)

Definition at line 13436 of file SelectionDAG.cpp.

References assert(), gluePropagatesDivergence(), and N.

Referenced by updateDivergence().

canCreateUndefOrPoison() [1/2]

bool SelectionDAG::canCreateUndefOrPoison	(	SDValue	Op,
		const APInt &	DemandedElts,
		UndefPoisonKind	Kind = UndefPoisonKind::UndefOrPoison,
		bool	ConsiderFlags = true,
		unsigned	Depth = 0 ) const

Return true if Op can create undef or poison from non-undef & non-poison operands.

The DemandedElts argument limits the check to the requested vector elements.

ConsiderFlags controls whether poison producing flags on the instruction are considered. This can be used to see if the instruction could still introduce undef or poison even without poison generating flags which might be on the instruction. (i.e. could the result of Op->dropPoisonGeneratingFlags() still create poison or undef)

Definition at line 5905 of file SelectionDAG.cpp.

References llvm::ISD::ABDS, llvm::ISD::ABDU, llvm::ISD::ABS, llvm::ISD::ABS_MIN_POISON, llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::AND, llvm::ISD::AssertAlign, llvm::ISD::AssertNoFPClass, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::AVGCEILS, llvm::ISD::AVGCEILU, llvm::ISD::AVGFLOORS, llvm::ISD::AVGFLOORU, llvm::ISD::BITCAST, llvm::ISD::BITREVERSE, llvm::ISD::BSWAP, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::cast(), computeKnownBits(), ComputeNumSignBits(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::CTLS, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_POISON, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_POISON, llvm::Depth, llvm::enumerate(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FCEIL, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FFLOOR, llvm::ISD::FMA, llvm::ISD::FMAD, llvm::ISD::FMAXIMUM, llvm::ISD::FMAXIMUMNUM, llvm::ISD::FMAXNUM, llvm::ISD::FMAXNUM_IEEE, llvm::ISD::FMINIMUM, llvm::ISD::FMINIMUMNUM, llvm::ISD::FMINNUM, llvm::ISD::FMINNUM_IEEE, llvm::ISD::FMUL, llvm::ISD::FMULADD, llvm::ISD::FNEARBYINT, llvm::ISD::FNEG, llvm::ISD::FP_EXTEND, llvm::ISD::FP_TO_SINT_SAT, llvm::ISD::FP_TO_UINT_SAT, llvm::ISD::FREEZE, llvm::ISD::FREM, llvm::ISD::FRINT, llvm::ISD::FROUND, llvm::ISD::FROUNDEVEN, llvm::ISD::FSHL, llvm::ISD::FSHR, llvm::ISD::FSUB, llvm::ISD::FTRUNC, llvm::KnownBits::getMaxValue(), getValidMaximumShiftAmount(), llvm::EVT::getVectorMinNumElements(), llvm::includesPoison(), llvm::includesUndef(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, isKnownNeverZero(), llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::ISD::OR, llvm::ISD::PARITY, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SADDO_CARRY, llvm::ISD::SADDSAT, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SCMP, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMULO, llvm::ISD::SPLAT_VECTOR, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::SSUBO, llvm::ISD::SSUBO_CARRY, llvm::ISD::SSUBSAT, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::SUBE, llvm::ISD::TRUNCATE, llvm::ISD::TRUNCATE_SSAT_S, llvm::ISD::TRUNCATE_SSAT_U, llvm::ISD::TRUNCATE_USAT_U, llvm::ISD::UADDO, llvm::ISD::UADDO_CARRY, llvm::ISD::UADDSAT, llvm::ISD::UCMP, llvm::APInt::uge(), llvm::APInt::ugt(), llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMULO, llvm::ISD::USUBO, llvm::ISD::USUBO_CARRY, llvm::ISD::USUBSAT, llvm::ISD::VECTOR_COMPRESS, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSELECT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

Referenced by canCreateUndefOrPoison(), and isGuaranteedNotToBeUndefOrPoison().

canCreateUndefOrPoison() [2/2]

bool SelectionDAG::canCreateUndefOrPoison	(	SDValue	Op,
		UndefPoisonKind	Kind = UndefPoisonKind::UndefOrPoison,
		bool	ConsiderFlags = true,
		unsigned	Depth = 0 ) const

Return true if Op can create undef or poison from non-undef & non-poison operands.

ConsiderFlags controls whether poison producing flags on the instruction are considered. This can be used to see if the instruction could still introduce undef or poison even without poison generating flags which might be on the instruction. (i.e. could the result of Op->dropPoisonGeneratingFlags() still create poison or undef)

Definition at line 5898 of file SelectionDAG.cpp.

References canCreateUndefOrPoison(), llvm::Depth, and getDemandAllEltsMask().

canIgnoreSignBitOfZero() [1/2]

bool SelectionDAG::canIgnoreSignBitOfZero

(

const SDUse &

Use

)

const

Check if a use of a float value is insensitive to signed zeros.

Definition at line 6767 of file SelectionDAG.cpp.

References assert(), llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FCOPYSIGN, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FSUB, llvm::User::getOperand(), llvm::Use::getOperandNo(), llvm::Use::getUser(), isKnownNeverLogicalZero(), llvm::Other, and llvm::ISD::SETCC.

Referenced by foldFPToIntToFP(), and tryCombineFADDReductionWithZero().

canIgnoreSignBitOfZero() [2/2]

bool SelectionDAG::canIgnoreSignBitOfZero

(

SDValue

Op

)

const

Check if Op has no-signed-zeros, or all users (limited to checking two for compile-time performance) are insensitive to signed zeros.

Definition at line 6800 of file SelectionDAG.cpp.

References llvm::all_of().

cannotBeOrderedNegativeFP()

bool SelectionDAG::cannotBeOrderedNegativeFP

(

SDValue

Op

)

const

Test whether the given float value is known to be positive.

+0.0, +inf and +nan are considered positive, -0.0, -inf and -nan are not.

Definition at line 6750 of file SelectionDAG.cpp.

References llvm::ISD::FABS, llvm::ISD::FEXP, llvm::ISD::FEXP10, llvm::ISD::FEXP2, llvm::isConstOrConstSplatFP(), and llvm_unreachable.

canonicalizeCommutativeBinop()

void SelectionDAG::canonicalizeCommutativeBinop	(	unsigned	Opcode,
		SDValue &	N1,
		SDValue &	N2 ) const

Swap N1 and N2 if Opcode is a commutative binary opcode and the canonical form expects the opposite order.

Definition at line 8386 of file SelectionDAG.cpp.

References llvm::SDValue::getOpcode(), isConstantFPBuildVectorOrConstantFP(), isConstantIntBuildVectorOrConstantInt(), llvm::ISD::SPLAT_VECTOR, llvm::ISD::STEP_VECTOR, and std::swap().

Referenced by getNode(), and getNode().

clear()

void SelectionDAG::clear

(

)

Clear state and free memory necessary to make this SelectionDAG ready to process a new block.

Definition at line 1531 of file SelectionDAG.cpp.

References llvm::fill(), and getEntryNode().

clearGraphAttrs()

void SelectionDAG::clearGraphAttrs

(

)

Clear all previously defined node graph attributes.

clearGraphAttrs - Clear all previously defined node graph attributes.

Intended to be used from a debugging tool (eg. gdb).

Definition at line 179 of file SelectionDAGPrinter.cpp.

References llvm::errs().

Combine()

void SelectionDAG::Combine	(	CombineLevel	Level,
		BatchAAResults *	BatchAA,
		CodeGenOptLevel	OptLevel )

This iterates over the nodes in the SelectionDAG, folding certain types of nodes together, or eliminating superfluous nodes.

This is the entry point for the file.

The Level argument controls whether Combine is allowed to produce nodes and types that are illegal on the target.

This is the main entry point to this class.

Definition at line 32390 of file DAGCombiner.cpp.

computeConstantRange() [1/2]

ConstantRange SelectionDAG::computeConstantRange	(	SDValue	Op,
		bool	ForSigned,
		unsigned	Depth = 0 ) const

Determine the possible constant range of an integer or vector of integers.

Definition at line 4680 of file SelectionDAG.cpp.

References computeConstantRange(), llvm::Depth, and getDemandAllEltsMask().

Referenced by computeConstantRange(), and computeConstantRangeIncludingKnownBits().

computeConstantRange() [2/2]

ConstantRange SelectionDAG::computeConstantRange	(	SDValue	Op,
		const APInt &	DemandedElts,
		bool	ForSigned,
		unsigned	Depth = 0 ) const

Determine the possible constant range of an integer or vector of integers.

The DemandedElts argument allows us to only collect the known ranges that are shared by the requested vector elements.

Definition at line 4686 of file SelectionDAG.cpp.

References llvm::BitWidth, C(), llvm::Depth, F, llvm::MachineFunction::getFunction(), getMachineFunction(), llvm::EVT::getScalarSizeInBits(), llvm::getVScaleRange(), llvm::isConstOrConstSplat(), MaxRecursionDepth, llvm::ConstantRange::multiply(), and llvm::ISD::VSCALE.

computeConstantRangeIncludingKnownBits() [1/2]

ConstantRange SelectionDAG::computeConstantRangeIncludingKnownBits	(	SDValue	Op,
		bool	ForSigned,
		unsigned	Depth = 0 ) const

Combine constant ranges from computeConstantRange() and computeKnownBits().

Definition at line 4714 of file SelectionDAG.cpp.

References computeConstantRangeIncludingKnownBits(), llvm::Depth, and getDemandAllEltsMask().

Referenced by computeConstantRangeIncludingKnownBits(), computeOverflowForUnsignedMul(), and computeOverflowForUnsignedSub().

computeConstantRangeIncludingKnownBits() [2/2]

ConstantRange SelectionDAG::computeConstantRangeIncludingKnownBits	(	SDValue	Op,
		const APInt &	DemandedElts,
		bool	ForSigned,
		unsigned	Depth = 0 ) const

Combine constant ranges from computeConstantRange() and computeKnownBits().

The DemandedElts argument allows us to only collect the known ranges that are shared by the requested vector elements.

Definition at line 4721 of file SelectionDAG.cpp.

References computeConstantRange(), computeKnownBits(), llvm::Depth, llvm::ConstantRange::fromKnownBits(), llvm::ConstantRange::intersectWith(), llvm::Known, llvm::ConstantRange::Signed, and llvm::ConstantRange::Unsigned.

computeKnownBits() [1/2]

KnownBits SelectionDAG::computeKnownBits	(	SDValue	Op,
		const APInt &	DemandedElts,
		unsigned	Depth = 0 ) const

Determine which bits of Op are known to be either zero or one and return them in Known.

The DemandedElts argument allows us to only collect the known bits that are shared by the requested vector elements. Targets can implement the computeKnownBitsForTargetNode method in the TargetLowering class to allow target nodes to be understood.

The DemandedElts argument allows us to only collect the known bits that are shared by the requested vector elements.

Definition at line 3348 of file SelectionDAG.cpp.

References llvm::ISD::ABDS, llvm::KnownBits::abds(), llvm::ISD::ABDU, llvm::KnownBits::abdu(), llvm::ISD::ABS, llvm::KnownBits::abs(), llvm::ISD::ABS_MIN_POISON, llvm::ISD::ADD, llvm::KnownBits::add(), llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, llvm::KnownBits::anyext(), llvm::KnownBits::ashr(), assert(), llvm::ISD::AssertAlign, llvm::ISD::AssertNoFPClass, llvm::ISD::AssertZext, llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_CLR, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_SWAP, llvm::ISD::AVGCEILS, llvm::KnownBits::avgCeilS(), llvm::ISD::AVGCEILU, llvm::KnownBits::avgCeilU(), llvm::ISD::AVGFLOORS, llvm::KnownBits::avgFloorS(), llvm::ISD::AVGFLOORU, llvm::KnownBits::avgFloorU(), llvm::bit_width(), llvm::ISD::BITCAST, llvm::ISD::BITREVERSE, llvm::BitWidth, llvm::ISD::BSWAP, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::KnownBits::byteSwap(), C(), llvm::cast(), llvm::APInt::clearBit(), llvm::APInt::clearBits(), llvm::ISD::CLMUL, llvm::KnownBits::clmul(), llvm::KnownBits::computeForAddCarry(), llvm::KnownBits::computeForSubBorrow(), computeKnownBits(), llvm::computeKnownBitsFromRangeMetadata(), ComputeNumSignBits(), llvm::KnownBits::concat(), llvm::ISD::CONCAT_VECTORS, llvm::APInt::countl_zero(), llvm::KnownBits::countMaxLeadingZeros(), llvm::KnownBits::countMaxPopulation(), llvm::KnownBits::countMaxTrailingZeros(), llvm::ISD::CTLS, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_POISON, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_POISON, llvm::Depth, llvm::dyn_cast(), llvm::enumerate(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::APInt::extractBits(), llvm::KnownBits::extractBits(), F, llvm::ISD::FABS, llvm::fcNan, llvm::fcNegative, llvm::fcPositive, llvm::ISD::FGETSIGN, llvm::ISD::FP_TO_UINT_SAT, llvm::ISD::FrameIndex, llvm::ISD::FREEZE, llvm::ISD::FSHL, llvm::KnownBits::fshl(), llvm::ISD::FSHR, llvm::KnownBits::fshr(), llvm::Constant::getAggregateElement(), getAlign(), llvm::APInt::getAllOnes(), llvm::ConstantSDNode::getAPIntValue(), llvm::APInt::getBitsSetFrom(), llvm::APInt::getBitWidth(), getDataLayout(), llvm::MachineFunction::getFunction(), llvm::APInt::getLowBitsSet(), getMachineFunction(), llvm::ShuffleVectorSDNode::getMask(), llvm::APInt::getNumSignBits(), llvm::APInt::getOneBitSet(), llvm::Type::getPrimitiveSizeInBits(), llvm::EVT::getScalarSizeInBits(), llvm::Type::getScalarSizeInBits(), llvm::getShuffleDemandedElts(), llvm::EVT::getSizeInBits(), llvm::Constant::getSplatValue(), llvm::Value::getType(), llvm::ConstantRange::getUnsignedMax(), getValidMinimumShiftAmount(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::getVScaleRange(), I, llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::isConstOrConstSplat(), llvm::ISD::isEXTLoad(), llvm::EVT::isFloatingPoint(), isGuaranteedNotToBeUndefOrPoison(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::APInt::isNegative(), llvm::KnownBits::isNegative(), llvm::ISD::isNON_EXTLoad(), llvm::APInt::isNonNegative(), llvm::KnownBits::isNonNegative(), llvm::KnownBits::isNonZero(), llvm::APInt::isPowerOf2(), llvm::EVT::isScalableVector(), llvm::ISD::isSEXTLoad(), llvm::isUIntN(), llvm::EVT::isVector(), llvm::Type::isVectorTy(), llvm::ISD::isZEXTLoad(), llvm::Known, llvm::ISD::LOAD, llvm::Log2(), llvm::APInt::logBase2(), llvm::KnownBits::lshr(), llvm::KnownBits::makeConstant(), MaxRecursionDepth, llvm::ISD::MERGE_VALUES, llvm::ISD::MGATHER, llvm::ISD::MLOAD, llvm::ISD::MUL, llvm::KnownBits::mul(), llvm::ISD::MULHS, llvm::KnownBits::mulhs(), llvm::ISD::MULHU, llvm::KnownBits::mulhu(), llvm::ConstantRange::multiply(), llvm::ISD::NON_EXTLOAD, llvm::Offset, llvm::ISD::OR, llvm::ISD::PARITY, llvm::ISD::PDEP, llvm::KnownBits::pdep(), llvm::ISD::PEXT, llvm::KnownBits::pext(), llvm::ISD::POISON, Range, llvm::KnownBits::resetAll(), llvm::KnownBits::reverseBits(), llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SADDO_CARRY, llvm::ISD::SCALAR_TO_VECTOR, llvm::APIntOps::ScaleBitMask(), llvm::ISD::SDIV, llvm::KnownBits::sdiv(), llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::KnownBits::setAllZero(), llvm::APInt::setBit(), llvm::ISD::SETCC, llvm::ISD::SETCCCARRY, llvm::KnownBits::sext(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::APInt::shl(), llvm::KnownBits::shl(), llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::SINT_TO_FP, llvm::ArrayRef< T >::size(), llvm::APInt::sle(), llvm::ISD::SMAX, llvm::KnownBits::smax(), llvm::ISD::SMIN, llvm::KnownBits::smin(), llvm::ISD::SMUL_LOHI, llvm::ISD::SMULO, llvm::Splat, llvm::ISD::SPLAT_VECTOR, llvm::ISD::SPLAT_VECTOR_PARTS, llvm::ISD::SRA, llvm::ISD::SRA_PARTS, llvm::ISD::SREM, llvm::KnownBits::srem(), llvm::ISD::SRL, llvm::ISD::SRL_PARTS, llvm::ISD::SSUBO, llvm::ISD::SSUBO_CARRY, llvm::ISD::STEP_VECTOR, llvm::ISD::STRICT_FSETCC, llvm::ISD::STRICT_FSETCCS, llvm::ISD::SUB, llvm::Sub, llvm::KnownBits::sub(), llvm::ISD::SUBC, std::swap(), llvm::ISD::TargetFrameIndex, llvm::ConstantRange::toKnownBits(), llvm::KnownBits::trunc(), llvm::ISD::TRUNCATE, llvm::ISD::TRUNCATE_SSAT_S, llvm::ISD::TRUNCATE_SSAT_U, llvm::ISD::TRUNCATE_USAT_U, llvm::ISD::UADDO, llvm::ISD::UADDO_CARRY, llvm::ISD::UDIV, llvm::KnownBits::udiv(), llvm::ISD::UINT_TO_FP, llvm::ISD::UMAX, llvm::KnownBits::umax(), llvm::ISD::UMIN, llvm::KnownBits::umin(), llvm::ISD::UMUL_LOHI, llvm::APInt::umul_ov(), umul_ov(), llvm::ISD::UMULO, llvm::UndefOrPoison, llvm::ISD::UREM, llvm::KnownBits::urem(), llvm::KnownBits::usub_sat(), llvm::ISD::USUBO, llvm::ISD::USUBO_CARRY, llvm::ISD::USUBSAT, llvm::ISD::VECTOR_COMPRESS, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSCALE, llvm::ISD::VSELECT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::ISD::ZERO_EXTEND_VECTOR_INREG, llvm::TargetLoweringBase::ZeroOrOneBooleanContent, llvm::APInt::zext(), llvm::KnownBits::zext(), llvm::ISD::ZEXTLOAD, and llvm::KnownBits::zextOrTrunc().

computeKnownBits() [2/2]

KnownBits SelectionDAG::computeKnownBits	(	SDValue	Op,
		unsigned	Depth = 0 ) const

Determine which bits of Op are known to be either zero or one and return them in Known.

For vectors, the known bits are those that are shared by every vector element. Targets can implement the computeKnownBitsForTargetNode method in the TargetLowering class to allow target nodes to be understood.

For vectors, the known bits are those that are shared by every vector element.

Definition at line 3340 of file SelectionDAG.cpp.

References computeKnownBits(), llvm::Depth, and getDemandAllEltsMask().

Referenced by adjustForRedundantAnd(), llvm::TargetLowering::BuildUDIV(), canCreateUndefOrPoison(), canonicalizeMaskForVLPredicate(), checkDot4MulSignedness(), checkZExtBool(), combineANDOfSETCCToCZERO(), combineArithReduction(), combineFaddCFmul(), combineFMulcFCMulc(), combineIntDivRem(), combineMOVMSK(), combineMul(), combineMulToPMADD52(), combineOrAndToBitfieldInsert(), combinePMULH(), combinePTESTCC(), combineSCALAR_TO_VECTOR(), combineSelect(), combineSetCC(), combineShiftToAVG(), combineShiftToMULH(), combineTruncate(), combineVPMADD52LH(), computeConstantRangeIncludingKnownBits(), computeKnownBits(), computeKnownBits(), computeKnownBitsBinOp(), computeKnownBitsForHorizontalOperation(), computeKnownBitsForPMADDUBSW(), computeKnownBitsForPMADDWD(), computeKnownBitsForPRMT(), computeKnownBitsForPSADBW(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::LanaiTargetLowering::computeKnownBitsForTargetNode(), llvm::RISCVTargetLowering::computeKnownBitsForTargetNode(), llvm::SITargetLowering::computeKnownBitsForTargetNode(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::SystemZTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), computeKnownFPClass(), ComputeNumSignBits(), computeOverflowForSignedMul(), computeOverflowForSignedSub(), computeOverflowForUnsignedAdd(), detectExtMul(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandAVG(), llvm::TargetLowering::expandFixedPointDiv(), foldMaskedShiftToUSHL(), getPack(), getValidShiftAmountRange(), haveNoCommonBitsSet(), isBitfieldPositioningOp(), isIdentityElement(), isKnownNeverZero(), isSafeSignedCMN(), isSafeSignedCMN(), isTruncateOf(), isWordAligned(), LowerAndToBT(), LowerAndToBTST(), LowerCTPOP(), llvm::AMDGPUTargetLowering::LowerDIVREMToFloat(), LowerMINMAX(), LowerMUL(), LowerPARITY(), llvm::SITargetLowering::lowerSET_ROUNDING(), LowerShift(), lowerShuffleWithVPMOV(), LowerVectorAllEqual(), MaskedValueIsAllOnes(), MaskedValueIsZero(), MaskedValueIsZero(), MaskedVectorIsZero(), llvm::SDPatternMatch::Negative_match::match(), llvm::SDPatternMatch::NonNegative_match::match(), llvm::SDPatternMatch::NonPositive_match::match(), llvm::SDPatternMatch::NonZero_match::match(), llvm::SDPatternMatch::StrictlyPositive_match::match(), matchBinaryShuffle(), matchTruncateWithPACK(), matchVPMADD52(), narrowBitOpRMW(), narrowIndex(), llvm::AMDGPUTargetLowering::numBitsUnsigned(), performANDCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performORCombine(), PerformSELECTShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), performSIGN_EXTEND_INREGCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), performUADDVCombine(), provablyDisjointOr(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImm34(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyMultipleUseDemandedBits(), llvm::X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(), llvm::TargetLowering::SimplifySetCC(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), tryCombineFADDReductionWithZero(), and tryReduceF64CompareToHiHalf().

computeKnownFPClass() [1/2]

KnownFPClass SelectionDAG::computeKnownFPClass	(	SDValue	Op,
		const APInt &	DemandedElts,
		FPClassTest	InterestedClasses,
		unsigned	Depth = 0 ) const

Determine floating-point class information about Op.

The DemandedElts argument allows us to only collect the known FP classes that are shared by the requested vector elements. InterestedClasses is a hint for which FP classes we care about.

Definition at line 6127 of file SelectionDAG.cpp.

References assert(), llvm::ISD::AssertNoFPClass, llvm::ISD::BITCAST, llvm::KnownFPClass::bitcast(), llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, computeKnownBits(), computeKnownFPClass(), llvm::Depth, llvm::dyn_cast(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::APInt::extractBits(), llvm::ISD::FABS, llvm::fcNone, llvm::ISD::FCOPYSIGN, llvm::First, llvm::ISD::FNEG, llvm::APInt::getBitsSet(), llvm::APInt::getBitWidth(), llvm::EVT::getFltSemantics(), llvm::APInt::getOneBitSet(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), I, llvm::ISD::INSERT_SUBVECTOR, llvm::KnownFPClass::intersectWith(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::EVT::isFixedLengthVector(), llvm::EVT::isFloatingPoint(), llvm::EVT::isScalableVector(), llvm::KnownFPClass::isUnknown(), llvm::EVT::isVector(), llvm::APInt::isZero(), llvm::Known, MaxRecursionDepth, llvm::ISD::POISON, llvm::ISD::SELECT, llvm::APInt::shl(), llvm::ISD::SPLAT_VECTOR, llvm::ISD::UNDEF, llvm::ISD::VSELECT, and llvm::APInt::zextOrTrunc().

computeKnownFPClass() [2/2]

KnownFPClass SelectionDAG::computeKnownFPClass	(	SDValue	Op,
		FPClassTest	InterestedClasses,
		unsigned	Depth = 0 ) const

Determine floating-point class information about Op.

For vectors, the known FP classes are those shared by every demanded vector element. InterestedClasses is a hint for which FP classes we care about; the implementation may bail out early if it can determine that none of the interested classes are possible.

Definition at line 6120 of file SelectionDAG.cpp.

References computeKnownFPClass(), llvm::Depth, and getDemandAllEltsMask().

Referenced by computeKnownFPClass(), computeKnownFPClass(), isKnownNeverLogicalZero(), and isKnownNeverNaN().

ComputeMaxSignificantBits() [1/2]

unsigned SelectionDAG::ComputeMaxSignificantBits	(	SDValue	Op,
		const APInt &	DemandedElts,
		unsigned	Depth = 0 ) const

Get the upper bound on bit size for this Value Op as a signed integer.

i.e. x == sext(trunc(x to MaxSignedBits) to bitwidth(x)). Similar to the APInt::getSignificantBits function. Helper wrapper to ComputeNumSignBits.

Definition at line 5601 of file SelectionDAG.cpp.

References ComputeNumSignBits(), and llvm::Depth.

ComputeMaxSignificantBits() [2/2]

unsigned SelectionDAG::ComputeMaxSignificantBits	(	SDValue	Op,
		unsigned	Depth = 0 ) const

Get the upper bound on bit size for this Value Op as a signed integer.

i.e. x == sext(trunc(x to MaxSignedBits) to bitwidth(x)). Similar to the APInt::getSignificantBits function. Helper wrapper to ComputeNumSignBits.

Definition at line 5595 of file SelectionDAG.cpp.

References ComputeNumSignBits(), and llvm::Depth.

Referenced by combineConcatVectorOps(), combineMulToPMADDWD(), combinePMULH(), combineShiftToMULH(), detectExtMul(), EmitCmp(), llvm::TargetLowering::expandMUL_LOHI(), getPack(), lowerBuildVectorOfConstants(), llvm::AMDGPUTargetLowering::numBitsSigned(), performSETCCCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), and llvm::TargetLowering::SimplifyDemandedBits().

ComputeNumSignBits() [1/2]

unsigned SelectionDAG::ComputeNumSignBits	(	SDValue	Op,
		const APInt &	DemandedElts,
		unsigned	Depth = 0 ) const

Return the number of times the sign bit of the register is replicated into the other bits.

We know that at least 1 bit is always equal to the sign bit (itself), but other cases can give us information. For example, immediately after an "SRA X, 2", we know that the top 3 bits are all equal to each other, so we return 3. The DemandedElts argument allows us to only collect the minimum sign bits of the requested vector elements. Targets can implement the ComputeNumSignBitsForTarget method in the TargetLowering class to allow target nodes to be understood.

Definition at line 4906 of file SelectionDAG.cpp.

References llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::AND, assert(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_CLR, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_SWAP, llvm::ISD::AVGCEILS, llvm::ISD::AVGFLOORS, llvm::ISD::BITCAST, llvm::BitWidth, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, C(), llvm::cast(), llvm::APInt::clearBit(), llvm::APInt::clearBits(), computeKnownBits(), ComputeNumSignBits(), llvm::ISD::CONCAT_VECTORS, llvm::Depth, llvm::dyn_cast(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::APInt::extractBits(), llvm::ISD::FP_TO_SINT_SAT, llvm::ISD::FREEZE, llvm::ISD::GET_ACTIVE_LANE_MASK, llvm::Constant::getAggregateElement(), llvm::APInt::getAllOnes(), llvm::ConstantSDNode::getAPIntValue(), llvm::APInt::getBitWidth(), llvm::ConstantRange::getBitWidth(), llvm::getConstantRangeFromMetadata(), getDataLayout(), llvm::ShuffleVectorSDNode::getMask(), llvm::APInt::getNumSignBits(), llvm::APInt::getOneBitSet(), llvm::SDValue::getOperand(), llvm::Type::getPrimitiveSizeInBits(), llvm::EVT::getScalarSizeInBits(), llvm::Type::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::getShuffleDemandedElts(), llvm::ConstantRange::getSignedMax(), llvm::ConstantRange::getSignedMin(), getValidMinimumShiftAmount(), getValidShiftAmountRange(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::isConstOrConstSplat(), llvm::ISD::isExtOpcode(), llvm::EVT::isFloatingPoint(), isGuaranteedNotToBeUndefOrPoison(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::EVT::isScalableVector(), llvm::EVT::isVector(), llvm::Type::isVectorTy(), llvm::Known, llvm::ISD::LOAD, MaxRecursionDepth, llvm::ISD::MERGE_VALUES, llvm::ISD::MUL, llvm::ISD::NON_EXTLOAD, llvm::ISD::OR, llvm::SignBitsOps::rot(), llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SADDO_CARRY, llvm::APIntOps::ScaleBitMask(), llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETCCCARRY, llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::APInt::shl(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ConstantRange::signExtend(), llvm::ArrayRef< T >::size(), llvm::APInt::sle(), llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMULO, llvm::ISD::SPLAT_VECTOR, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SSUBO, llvm::ISD::SSUBO_CARRY, llvm::ISD::STRICT_FSETCC, llvm::ISD::STRICT_FSETCCS, llvm::ISD::SUB, llvm::Sub, std::swap(), T, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UADDO_CARRY, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMULO, llvm::UndefOrPoison, llvm::ISD::USUBO, llvm::ISD::USUBO_CARRY, llvm::ISD::VECTOR_COMPRESS, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSELECT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::ConstantRange::zeroExtend(), llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, llvm::APInt::zext(), and llvm::ISD::ZEXTLOAD.

ComputeNumSignBits() [2/2]

unsigned SelectionDAG::ComputeNumSignBits	(	SDValue	Op,
		unsigned	Depth = 0 ) const

Return the number of times the sign bit of the register is replicated into the other bits.

We know that at least 1 bit is always equal to the sign bit (itself), but other cases can give us information. For example, immediately after an "SRA X, 2", we know that the top 3 bits are all equal to each other, so we return 3. Targets can implement the ComputeNumSignBitsForTarget method in the TargetLowering class to allow target nodes to be understood.

Definition at line 4901 of file SelectionDAG.cpp.

References ComputeNumSignBits(), llvm::Depth, and getDemandAllEltsMask().

Referenced by canCreateUndefOrPoison(), canReduceVMulWidth(), combineAnd(), combineAndMaskToShift(), combineAndnp(), combineBitOpWithPACK(), combineGatherScatter(), combineIntDivRem(), combineLogicBlendIntoConditionalNegate(), combineLogicBlendIntoPBLENDV(), combineMulToPMULDQ(), combinePTESTCC(), combineSelect(), combineSetCCMOVMSK(), combineShiftToAVG(), combineSIntToFP(), combineVECREDUCE_LOGIC(), combineVectorCompareAndMaskUnaryOp(), combineVectorPack(), combineVSelectWithAllOnesOrZeros(), computeKnownBits(), llvm::RISCVTargetLowering::computeKnownBitsForTargetNode(), ComputeMaxSignificantBits(), ComputeMaxSignificantBits(), ComputeNumSignBits(), ComputeNumSignBits(), computeNumSignBitsBinOp(), llvm::AArch64TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::RISCVTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::SystemZTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), computeOverflowForSignedAdd(), computeOverflowForSignedMul(), computeOverflowForSignedSub(), EmitCmp(), llvm::TargetLowering::expandAVG(), llvm::TargetLowering::expandFixedPointDiv(), foldAddSubMasked1(), getFauxShuffleMask(), getNode(), isS16(), LowerADDSAT_SUBSAT(), llvm::AMDGPUTargetLowering::LowerDIVREMToFloat(), LowerEXTEND_VECTOR_INREG(), LowerMINMAX(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerShiftByScalarImmediate(), lowerShuffleWithVPMOV(), LowerTruncateVecI1(), lowerVectorIntrinsicScalars(), LowerVSETCC(), matchBinaryShuffle(), matchShuffleWithPACK(), matchTruncateWithPACK(), matchUnaryShuffle(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), performExtendDuplaneTruncCombine(), performNegSignMaskedAndCombine(), performSetccMergeZeroCombine(), performTruncateCombine(), performVectorShiftCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), selectUmullSmull(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::TargetLowering::SimplifyMultipleUseDemandedBits(), llvm::X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(), and llvm::TargetLowering::SimplifySetCC().

computeOverflowForAdd()

OverflowKind llvm::SelectionDAG::computeOverflowForAdd ( bool IsSigned, SDValue N0, SDValue N1 ) const

inline

Determine if the result of the addition of 2 nodes can overflow.

Definition at line 2180 of file SelectionDAG.h.

References computeOverflowForSignedAdd(), and computeOverflowForUnsignedAdd().

Referenced by willNotOverflowAdd().

computeOverflowForMul()

OverflowKind llvm::SelectionDAG::computeOverflowForMul ( bool IsSigned, SDValue N0, SDValue N1 ) const

inline

Determine if the result of the mul of 2 nodes can overflow.

Definition at line 2220 of file SelectionDAG.h.

References computeOverflowForSignedMul(), and computeOverflowForUnsignedMul().

Referenced by willNotOverflowMul().

computeOverflowForSignedAdd()

SelectionDAG::OverflowKind SelectionDAG::computeOverflowForSignedAdd	(	SDValue	N0,
		SDValue	N1 ) const

Determine if the result of the signed addition of 2 nodes can overflow.

Definition at line 4571 of file SelectionDAG.cpp.

References ComputeNumSignBits(), llvm::isNullConstant(), OFK_Never, and OFK_Sometime.

Referenced by computeOverflowForAdd(), and PerformMinMaxToSatCombine().

computeOverflowForSignedMul()

SelectionDAG::OverflowKind SelectionDAG::computeOverflowForSignedMul	(	SDValue	N0,
		SDValue	N1 ) const

Determine if the result of the signed mul of 2 nodes can overflow.

Definition at line 4651 of file SelectionDAG.cpp.

References llvm::BitWidth, computeKnownBits(), ComputeNumSignBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::KnownBits::isNonNegative(), llvm::isNullConstant(), llvm::isOneConstant(), OFK_Never, and OFK_Sometime.

Referenced by computeOverflowForMul().

computeOverflowForSignedSub()

SelectionDAG::OverflowKind SelectionDAG::computeOverflowForSignedSub	(	SDValue	N0,
		SDValue	N1 ) const

Determine if the result of the signed sub of 2 nodes can overflow.

Definition at line 4609 of file SelectionDAG.cpp.

References computeKnownBits(), ComputeNumSignBits(), llvm::ConstantRange::fromKnownBits(), llvm::isNullConstant(), mapOverflowResult(), OFK_Never, and llvm::ConstantRange::signedSubMayOverflow().

Referenced by computeOverflowForSub().

computeOverflowForSub()

OverflowKind llvm::SelectionDAG::computeOverflowForSub ( bool IsSigned, SDValue N0, SDValue N1 ) const

inline

Determine if the result of the sub of 2 nodes can overflow.

Definition at line 2200 of file SelectionDAG.h.

References computeOverflowForSignedSub(), and computeOverflowForUnsignedSub().

Referenced by willNotOverflowSub().

computeOverflowForUnsignedAdd()

SelectionDAG::OverflowKind SelectionDAG::computeOverflowForUnsignedAdd	(	SDValue	N0,
		SDValue	N1 ) const

Determine if the result of the unsigned addition of 2 nodes can overflow.

Definition at line 4586 of file SelectionDAG.cpp.

References computeKnownBits(), llvm::ConstantRange::fromKnownBits(), llvm::KnownBits::getMaxValue(), llvm::SDValue::getOpcode(), llvm::SDValue::getResNo(), llvm::isNullConstant(), mapOverflowResult(), OFK_Never, llvm::APInt::ult(), llvm::ISD::UMUL_LOHI, and llvm::ConstantRange::unsignedAddMayOverflow().

Referenced by computeOverflowForAdd().

computeOverflowForUnsignedMul()

SelectionDAG::OverflowKind SelectionDAG::computeOverflowForUnsignedMul	(	SDValue	N0,
		SDValue	N1 ) const

Determine if the result of the unsigned mul of 2 nodes can overflow.

Definition at line 4640 of file SelectionDAG.cpp.

References computeConstantRangeIncludingKnownBits(), llvm::isNullConstant(), llvm::isOneConstant(), mapOverflowResult(), OFK_Never, and llvm::ConstantRange::unsignedMulMayOverflow().

Referenced by computeOverflowForMul().

computeOverflowForUnsignedSub()

SelectionDAG::OverflowKind SelectionDAG::computeOverflowForUnsignedSub	(	SDValue	N0,
		SDValue	N1 ) const

Determine if the result of the unsigned sub of 2 nodes can overflow.

Definition at line 4627 of file SelectionDAG.cpp.

References computeConstantRangeIncludingKnownBits(), llvm::isNullConstant(), mapOverflowResult(), OFK_Never, and llvm::ConstantRange::unsignedSubMayOverflow().

Referenced by computeOverflowForSub().

computeVectorKnownZeroElements()

APInt SelectionDAG::computeVectorKnownZeroElements	(	SDValue	Op,
		const APInt &	DemandedElts,
		unsigned	Depth = 0 ) const

For each demanded element of a vector, see if it is known to be zero.

Definition at line 2933 of file SelectionDAG.cpp.

References assert(), llvm::Depth, llvm::APInt::getBitWidth(), llvm::APInt::getOneBitSet(), llvm::EVT::getVectorNumElements(), llvm::APInt::getZero(), llvm::EVT::isScalableVector(), llvm::EVT::isVector(), MaskedVectorIsZero(), and llvm::APInt::setBit().

Referenced by combineShuffleToZeroExtendVectorInReg().

copyExtraInfo()

void SelectionDAG::copyExtraInfo	(	SDNode *	From,
		SDNode *	To )

Copy extra info associated with one node to another.

Definition at line 15272 of file SelectionDAG.cpp.

References assert(), llvm::SmallPtrSetImplBase::clear(), llvm::detail::DenseSetImpl< ValueT, MapTy >::contains(), llvm::dbgs(), llvm::SmallVectorImpl< T >::emplace_back(), llvm::SmallVectorTemplateCommon< T, typename >::empty(), llvm::errs(), getEntryNode(), llvm::SDValue::getNode(), I, llvm::detail::DenseSetImpl< ValueT, MapTy >::insert(), llvm::SmallPtrSetImpl< PtrType >::insert(), LLVM_DEBUG, LLVM_LIKELY, N, and std::swap().

Referenced by ReplaceAllUsesOfValuesWith(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), ReplaceAllUsesWith(), and ReplaceAllUsesWith().

CreateStackTemporary() [1/3]

SDValue SelectionDAG::CreateStackTemporary	(	EVT	VT,
		unsigned	minAlign = 1 )

Create a stack temporary, suitable for holding the specified value type.

If minAlign is specified, the slot size will have at least that alignment.

Definition at line 2673 of file SelectionDAG.cpp.

References CreateStackTemporary(), getContext(), getDataLayout(), getPrefTypeAlign(), llvm::EVT::getStoreSize(), and llvm::EVT::getTypeForEVT().

CreateStackTemporary() [2/3]

SDValue SelectionDAG::CreateStackTemporary	(	EVT	VT1,
		EVT	VT2 )

Create a stack temporary suitable for holding either of the specified value types.

Definition at line 2680 of file SelectionDAG.cpp.

References assert(), CreateStackTemporary(), DL, getContext(), getDataLayout(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::EVT::getStoreSize(), llvm::EVT::getTypeForEVT(), and llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable().

CreateStackTemporary() [3/3]

SDValue SelectionDAG::CreateStackTemporary	(	TypeSize	Bytes,
		Align	Alignment )

Create a stack temporary based on the size in bytes and the alignment.

Definition at line 2660 of file SelectionDAG.cpp.

References llvm::MachineFrameInfo::CreateStackObject(), getDataLayout(), getFrameIndex(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::TargetFrameLowering::getStackIDForScalableVectors(), and llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable().

Referenced by CreateStackTemporary(), CreateStackTemporary(), llvm::TargetLowering::expandMultipleResultFPLibCall(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorSplice(), LowerATOMIC_STORE(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), and llvm::X86TargetLowering::ReplaceNodeResults().

DbgBegin()

SDDbgInfo::DbgIterator llvm::SelectionDAG::DbgBegin ( ) const

inline

Definition at line 2017 of file SelectionDAG.h.

Referenced by dump().

DbgEnd()

SDDbgInfo::DbgIterator llvm::SelectionDAG::DbgEnd ( ) const

inline

Definition at line 2018 of file SelectionDAG.h.

Referenced by dump().

DbgLabelBegin()

SDDbgInfo::DbgLabelIterator llvm::SelectionDAG::DbgLabelBegin ( ) const

inline

Definition at line 2027 of file SelectionDAG.h.

DbgLabelEnd()

SDDbgInfo::DbgLabelIterator llvm::SelectionDAG::DbgLabelEnd ( ) const

inline

Definition at line 2030 of file SelectionDAG.h.

DeleteNode()

void SelectionDAG::DeleteNode

(

SDNode *

N

)

Remove the specified node from the system.

This node must have no referrers.

Definition at line 1148 of file SelectionDAG.cpp.

References N.

Referenced by Legalize().

doesNodeExist()

bool SelectionDAG::doesNodeExist	(	unsigned	Opcode,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops )

Check if a node exists without modifying its flags.

doesNodeExist - Check if a node exists without modifying its flags.

Definition at line 12822 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::SDVTList::NumVTs, and llvm::SDVTList::VTs.

Referenced by canEmitConjunction(), canEmitConjunctionForCCMP(), combineConcatVectorOps(), EmitCmp(), llvm::TargetLowering::expandIntMINMAX(), foldAndOrOfSETCC(), performCSELCombine(), and llvm::TargetLowering::SimplifySetCC().

dump() [1/2]

LLVM_DUMP_METHOD void SelectionDAG::dump

(

)

const

Dump the textual format of this DAG.

Nodes are not sorted. Note that we overload it instead of using default value so that it is convenient to be called from debuggers.

Definition at line 1118 of file SelectionDAGDumper.cpp.

References dump(), and LLVM_DUMP_METHOD.

Referenced by dump(), and NewSDValueDbgMsg().

dump() [2/2]

LLVM_DUMP_METHOD void SelectionDAG::dump

(

bool

Sorted

)

const

Dump the textual format of this DAG.

Print nodes in sorted orders if Sorted is true.

Definition at line 1120 of file SelectionDAGDumper.cpp.

References allnodes(), ByvalParmDbgBegin(), ByvalParmDbgEnd(), DbgBegin(), DbgEnd(), llvm::dbgs(), DumpNodes(), getNode(), getRoot(), getTopologicallyOrderedNodes(), LLVM_DUMP_METHOD, llvm::make_range(), N, llvm::SmallVectorImpl< T >::reserve(), shouldPrintInline(), and VerboseDAGDumping.

dumpDotGraph()

LLVM_DUMP_METHOD void SelectionDAG::dumpDotGraph	(	const Twine &	FileName,
		const Twine &	Title )

Just dump dot graph to a user-provided path and title.

This doesn't open the dot viewer program and helps visualization when outside debugging session. FileName expects absolute path. If provided without any path separators then the file will be created in the current directory. Error will be emitted if the path is insane.

Definition at line 171 of file SelectionDAGPrinter.cpp.

References llvm::dumpDotGraphToFile(), and LLVM_DUMP_METHOD.

expandVAArg()

SDValue SelectionDAG::expandVAArg

(

SDNode *

Node

)

Expand the specified ISD::VAARG node as the Legalize pass would.

Definition at line 2579 of file SelectionDAG.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::cast(), getConstant(), getContext(), getDataLayout(), getLoad(), getNode(), getSignedConstant(), getStore(), getTargetLoweringInfo(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValue(), and llvm::SDValue::getValueType().

expandVACopy()

SDValue SelectionDAG::expandVACopy

(

SDNode *

Node

)

Expand the specified ISD::VACOPY node as the Legalize pass would.

Definition at line 2613 of file SelectionDAG.cpp.

References llvm::cast(), getDataLayout(), getLoad(), getStore(), getTargetLoweringInfo(), and llvm::SDValue::getValue().

Referenced by LowerVACOPY().

ExtractVectorElements()

void SelectionDAG::ExtractVectorElements	(	SDValue	Op,
		SmallVectorImpl< SDValue > &	Args,
		unsigned	Start = 0,
		unsigned	Count = 0,
		EVT	EltVT = EVT() )

Append the extracted elements from Start to Count out of the vector Op in Args.

If Count is 0, all of the elements will be extracted. The extracted elements will have type EVT if it is provided, and otherwise their type will be Op's element type.

Definition at line 14646 of file SelectionDAG.cpp.

References llvm::Count, getExtractVectorElt(), llvm::EVT::getVectorElementType(), and llvm::EVT::getVectorNumElements().

Referenced by adjustLoadValueTypeImpl(), llvm::TargetLowering::expandVecReduce(), llvm::TargetLowering::expandVecReduceSeq(), getBuildVectorizedValue(), getDWordFromOffset(), llvm::AMDGPUTargetLowering::LowerCONCAT_VECTORS(), llvm::AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), lowerSTOREVector(), padEltsToUndef(), llvm::AMDGPUTargetLowering::performShlCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), replaceLoadVector(), scalarizeBinOpOfSplats(), llvm::AMDGPUTargetLowering::splitVector(), UnrollVectorOverflowOp(), unrollVectorShift(), and widenVectorToPartType().

FoldConstantArithmetic()

SDValue SelectionDAG::FoldConstantArithmetic	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		ArrayRef< SDValue >	Ops,
		SDNodeFlags	Flags = SDNodeFlags() )

Definition at line 7610 of file SelectionDAG.cpp.

References llvm::ISD::ABS, llvm::APInt::abs(), llvm::ISD::ABS_MIN_POISON, AbstractManglingParser< Derived, Alloc >::NumOps, AbstractManglingParser< Derived, Alloc >::Ops, llvm::all_of(), llvm::ISD::ANY_EXTEND, llvm::APInt::ashrInPlace(), assert(), llvm::ISD::BF16_TO_FP, llvm::APFloatBase::BFloat(), llvm::ISD::BITCAST, llvm::ISD::BITREVERSE, llvm::EVT::bitsGT(), llvm::EVT::bitsLT(), llvm::ISD::BSWAP, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::APInt::byteSwap(), C(), llvm::cast(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::CONDCODE, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::APFloat::convert(), llvm::APFloat::convertFromAPInt(), llvm::APInt::countl_zero(), llvm::APInt::countr_zero(), llvm::ISD::CTLS, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_POISON, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_POISON, DL, llvm::dyn_cast(), llvm::ISD::FABS, llvm::ISD::FCEIL, llvm::ISD::FFLOOR, llvm::ISD::FMA, llvm::ISD::FMAD, llvm::ISD::FMULADD, llvm::ISD::FNEG, FoldConstantArithmetic(), foldConstantFPMath(), FoldSTEP_VECTOR(), FoldSymbolOffset(), FoldValue(), FoldValueWithUndef(), llvm::ISD::FP16_TO_FP, llvm::ISD::FP_EXTEND, llvm::ISD::FP_TO_BF16, llvm::ISD::FP_TO_FP16, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FSHL, llvm::APIntOps::fshl(), llvm::ISD::FSHR, llvm::APIntOps::fshr(), llvm::ISD::FTRUNC, getAnyExtOrTrunc(), getBitcast(), llvm::APInt::getBitWidth(), getBuildVector(), getConstant(), getConstantFP(), getContext(), getDataLayout(), llvm::TargetLoweringBase::getExtendForContent(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getFixedValue(), llvm::EVT::getFltSemantics(), getIntegerIdentity(), llvm::SDValue::getNode(), getNode(), llvm::APInt::getNumSignBits(), llvm::SDValue::getOpcode(), getPOISON(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), getSplatVector(), getStepVector(), getUNDEF(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueType(), getValueType(), llvm::ISD::getVecReduceBaseOpcode(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::APInt::getZero(), I, llvm::APFloatBase::IEEEdouble(), llvm::APFloatBase::IEEEhalf(), llvm::APFloatBase::IEEEquad(), llvm::APFloatBase::IEEEsingle(), llvm::isa(), llvm::ISD::isBitwiseLogicOp(), llvm::ISD::isBuildVectorOfConstantSDNodes(), llvm::ISD::isConstantSplatVector(), llvm::EVT::isFixedLengthVector(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::APInt::isMinSignedValue(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable(), llvm::SDValue::isUndef(), isUndef(), llvm::EVT::isVector(), llvm::ISD::MUL, NewNodesMustHaveLegalTypes, NewSDValueDbgMsg(), llvm::SDNode::op_values(), llvm::APFloatBase::opInexact, llvm::APFloatBase::opInvalidOp, llvm::APFloatBase::opOK, llvm::ISD::PARTIAL_REDUCE_SMLA, llvm::ISD::PARTIAL_REDUCE_SUMLA, llvm::ISD::PARTIAL_REDUCE_UMLA, llvm::peekThroughBitcasts(), llvm::ISD::POISON, llvm::APInt::popcount(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::BuildVectorSDNode::recastRawBits(), Results, llvm::APInt::reverseBits(), llvm::APFloatBase::rmNearestTiesToEven, llvm::APFloatBase::rmTowardNegative, llvm::APFloatBase::rmTowardPositive, llvm::APFloatBase::rmTowardZero, SDValue(), llvm::BitVector::set(), llvm::ISD::SETCC, llvm::APInt::sext(), llvm::APInt::sextOrTrunc(), llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SINT_TO_FP, llvm::SmallVectorTemplateCommon< T, typename >::size(), llvm::ISD::SPLAT_VECTOR, llvm::ISD::STEP_VECTOR, llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::TargetLoweringBase::TypeLegal, llvm::ISD::UINT_TO_FP, llvm::V1, llvm::V3, llvm::ISD::VECREDUCE_ADD, llvm::ISD::VECREDUCE_AND, llvm::ISD::VECREDUCE_MUL, llvm::ISD::VECREDUCE_OR, llvm::ISD::VECREDUCE_SMAX, llvm::ISD::VECREDUCE_SMIN, llvm::ISD::VECREDUCE_UMAX, llvm::ISD::VECREDUCE_UMIN, llvm::ISD::VECREDUCE_XOR, llvm::ISD::ZERO_EXTEND, llvm::APInt::zext(), and llvm::APInt::zextOrTrunc().

Referenced by combineGatherScatter(), combineSelect(), foldAddSubOfSignBit(), foldBinOpIntoSelectIfProfitable(), foldBinOpIntoSelectIfProfitable(), FoldConstantArithmetic(), getNode(), getNode(), getNode(), getTargetVShiftByConstNode(), getTargetVShiftNode(), LowerRotate(), PromoteMaskArithmetic(), PromoteMaskArithmetic(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifyDemandedVectorElts().

FoldConstantBuildVector()

SDValue SelectionDAG::FoldConstantBuildVector	(	BuildVectorSDNode *	BV,
		const SDLoc &	DL,
		EVT	DstEltVT )

Fold BUILD_VECTOR of constants/undefs to the destination type BUILD_VECTOR of constants/undefs elements.

Definition at line 8277 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::cast(), DL, FoldConstantBuildVector(), getBitcast(), getBuildVector(), getConstant(), llvm::BuildVectorSDNode::getConstantRawBits(), getContext(), getDataLayout(), llvm::EVT::getIntegerVT(), getNode(), llvm::EVT::getSizeInBits(), getUNDEF(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), I, llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::SDNode::op_values(), SDValue(), llvm::SmallVectorTemplateCommon< T, typename >::size(), and llvm::ISD::TRUNCATE.

Referenced by FoldConstantBuildVector().

foldConstantFPMath()

SDValue SelectionDAG::foldConstantFPMath	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		ArrayRef< SDValue >	Ops )

Fold floating-point operations when all operands are constants and/or undefined.

Definition at line 8194 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::APFloat::add(), llvm::APFloat::convert(), llvm::APFloat::copySign(), llvm::APFloat::divide(), DL, llvm::ISD::FADD, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FMAXIMUM, llvm::ISD::FMAXIMUMNUM, llvm::ISD::FMAXNUM, llvm::ISD::FMINIMUM, llvm::ISD::FMINIMUMNUM, llvm::ISD::FMINNUM, llvm::ISD::FMUL, llvm::ISD::FP_ROUND, llvm::ISD::FREM, llvm::ISD::FSUB, getConstantFP(), llvm::EVT::getFltSemantics(), llvm::APFloat::getNaN(), getUNDEF(), llvm::ConstantFPSDNode::getValueAPF(), llvm::isConstOrConstSplatFP(), llvm::SDValue::isUndef(), llvm::maximum(), llvm::maximumnum(), llvm::maxnum(), llvm::minimum(), llvm::minimumnum(), llvm::minnum(), llvm::APFloat::mod(), llvm::APFloat::multiply(), llvm::APFloatBase::rmNearestTiesToEven, SDValue(), and llvm::APFloat::subtract().

Referenced by FoldConstantArithmetic().

FoldSetCC()

SDValue SelectionDAG::FoldSetCC	(	EVT	VT,
		SDValue	N1,
		SDValue	N2,
		ISD::CondCode	Cond,
		const SDLoc &	dl,
		SDNodeFlags	Flags = {} )

Constant fold a setcc to true or false.

Definition at line 2697 of file SelectionDAG.cpp.

References assert(), llvm::APFloatBase::cmpEqual, llvm::APFloatBase::cmpGreaterThan, llvm::APFloatBase::cmpLessThan, llvm::APFloatBase::cmpUnordered, llvm::ICmpInst::compare(), Cond, llvm::dyn_cast(), getBoolConstant(), getConstant(), llvm::getICmpCondCode(), llvm::EVT::getScalarType(), getSetCC(), llvm::ISD::getSetCCSwappedOperands(), llvm::EVT::getSimpleVT(), getUNDEF(), llvm::ISD::getUnorderedFlavor(), llvm::SDValue::getValueType(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isSimple(), llvm::ISD::isTrueWhenEqual(), llvm::SDValue::isUndef(), llvm_unreachable, SDValue(), llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, and llvm::TargetLoweringBase::UndefinedBooleanContent.

Referenced by getNode(), and llvm::TargetLowering::SimplifySetCC().

FoldSymbolOffset()

SDValue SelectionDAG::FoldSymbolOffset	(	unsigned	Opcode,
		EVT	VT,
		const GlobalAddressSDNode *	GA,
		const SDNode *	N2 )

Definition at line 7563 of file SelectionDAG.cpp.

References llvm::ISD::ADD, llvm::dyn_cast(), llvm::GlobalAddressSDNode::getGlobal(), getGlobalAddress(), llvm::GlobalAddressSDNode::getOffset(), llvm::SDNode::getOpcode(), llvm::ISD::GlobalAddress, llvm::Offset, llvm::ISD::PTRADD, SDValue(), llvm::ISD::SUB, and uint64_t.

Referenced by FoldConstantArithmetic().

getAddrSpaceCast()

SDValue SelectionDAG::getAddrSpaceCast	(	const SDLoc &	dl,
		EVT	VT,
		SDValue	Ptr,
		unsigned	SrcAS,
		unsigned	DestAS )

Return an AddrSpaceCastSDNode.

Definition at line 2536 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::ISD::ADDRSPACECAST, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), N, and SDValue().

Referenced by combineLoad(), combineStore(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerSTACKRESTORE(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), and UnrollVectorOp().

getAllOnesConstant()

SDValue SelectionDAG::getAllOnesConstant	(	const SDLoc &	DL,
		EVT	VT,
		bool	IsTarget = false,
		bool	IsOpaque = false )

Definition at line 1845 of file SelectionDAG.cpp.

References DL, llvm::APInt::getAllOnes(), getConstant(), and llvm::EVT::getScalarSizeInBits().

Referenced by combineAddOrSubToADCOrSBB(), combineADDToADDZE(), combineAndLoadToBZHI(), combineBitcastToBoolVector(), combinePTESTCC(), combineSelectToBinOp(), combineSetCC(), combineSetCCMOVMSK(), combineVectorCompare(), combineVectorShiftImm(), ConvertCarryValueToCarryFlag(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandPDEP(), llvm::TargetLowering::expandPEXT(), llvm::TargetLowering::expandRoundInexactToOdd(), foldBoolSelectToLogic(), foldSubCtlzNot(), foldXorTruncShiftIntoCmp(), getBoolConstant(), getNode(), getNOT(), getOnesVector(), getTargetVShiftNode(), getWideningInterleave(), isConditionalZeroOrAllOnes(), isConditionalZeroOrAllOnes(), LowerADDSAT_SUBSAT(), LowerADDSUBO_CARRY(), llvm::AMDGPUTargetLowering::LowerCTLS(), LowerMINMAX_REDUCE(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), lowerSelectToBinOp(), LowerShift(), LowerShiftByScalarImmediate(), LowerShiftByScalarVariable(), LowerSIGN_EXTEND_Mask(), llvm::HexagonTargetLowering::LowerUAddSubO(), LowerVectorAllEqual(), LowerVSETCC(), lowerWaveShuffle(), MatchVectorAllEqualTest(), performAddCSelIntoCSinc(), llvm::HexagonTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performMaskedLoadToVPLoadCombine(), performSIGN_EXTEND_INREGCombine(), performSignExtendInRegCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), ReplaceATOMIC_LOAD_128Results(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifySetCC(), and simplifySetCCWithCTPOP().

getAnyExtOrTrunc()

SDValue SelectionDAG::getAnyExtOrTrunc	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncating it.

Definition at line 1572 of file SelectionDAG.cpp.

References llvm::ISD::ANY_EXTEND, llvm::EVT::bitsGT(), DL, getNode(), and llvm::ISD::TRUNCATE.

Referenced by combineAddOrSubToADCOrSBB(), combineAVX512SetCCToKMOV(), combineBitcast(), combineExtractVectorElt(), combineSCALAR_TO_VECTOR(), combineStore(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), createMMXBuildVector(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset(), FoldConstantArithmetic(), getBitcastedAnyExtOrTrunc(), getCopyFromPartsVector(), getCopyToPartsVector(), getExtOrTrunc(), getNode(), getVectorBitwiseReduce(), LowerADDRSPACECAST(), lowerBUILD_VECTOR(), LowerBuildVectorAsInsert(), LowerBuildVectorv16i8(), LowerFunnelShift(), lowerLaneOp(), lowerSELECT(), performBuildShuffleExtendCombine(), PerformVSELECTCombine(), llvm::HexagonTargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::ReplaceNodeResults(), and replaceProxyReg().

getAssertAlign()

SDValue SelectionDAG::getAssertAlign	(	const SDLoc &	DL,
		SDValue	V,
		Align	A )

Return an AssertAlignSDNode.

Definition at line 8349 of file SelectionDAG.cpp.

References A(), llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), llvm::ISD::AssertAlign, DL, llvm::SDValue::getValueType(), getVTList(), llvm::EVT::isInteger(), N, NewSDValueDbgMsg(), and SDValue().

getAtomic() [1/2]

SDValue SelectionDAG::getAtomic	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	MemVT,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Val,
		MachineMemOperand *	MMO )

Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands.

Definition at line 10502 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_CLR, llvm::ISD::ATOMIC_LOAD_FADD, llvm::ISD::ATOMIC_LOAD_FMAX, llvm::ISD::ATOMIC_LOAD_FMAXIMUM, llvm::ISD::ATOMIC_LOAD_FMIN, llvm::ISD::ATOMIC_LOAD_FMINIMUM, llvm::ISD::ATOMIC_LOAD_FSUB, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UDEC_WRAP, llvm::ISD::ATOMIC_LOAD_UINC_WRAP, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_USUB_COND, llvm::ISD::ATOMIC_LOAD_USUB_SAT, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_STORE, llvm::ISD::ATOMIC_SWAP, getAtomic(), llvm::SDValue::getValueType(), and getVTList().

Referenced by combineAtomicLoad(), combineSetCCAtomicArith(), getAtomic(), getAtomicCmpSwap(), getAtomicLoad(), LowerATOMIC_STORE(), llvm::VETargetLowering::lowerATOMIC_SWAP(), and lowerAtomicArith().

getAtomic() [2/2]

SDValue SelectionDAG::getAtomic	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	MemVT,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		MachineMemOperand *	MMO,
		ISD::LoadExtType	ExtType = ISD::NON_EXTLOAD )

Gets a node for an atomic op, produces result and chain and takes N operands.

Definition at line 10461 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::cast_or_null(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), N, NewSDValueDbgMsg(), and SDValue().

getAtomicCmpSwap()

SDValue SelectionDAG::getAtomicCmpSwap	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	MemVT,
		SDVTList	VTs,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Cmp,
		SDValue	Swp,
		MachineMemOperand *	MMO )

Gets a node for an atomic cmpxchg op.

There are two valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded, a success flag (initially i1), and a chain.

Definition at line 10490 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, getAtomic(), and llvm::SDValue::getValueType().

getAtomicLoad()

SDValue SelectionDAG::getAtomicLoad	(	ISD::LoadExtType	ExtType,
		const SDLoc &	dl,
		EVT	MemVT,
		EVT	VT,
		SDValue	Chain,
		SDValue	Ptr,
		MachineMemOperand *	MMO )

Definition at line 10530 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::ATOMIC_LOAD, getAtomic(), and getVTList().

Referenced by reduceANDOfAtomicLoad(), and tryToFoldExtOfAtomicLoad().

getAtomicMemcpy()

SDValue SelectionDAG::getAtomicMemcpy	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		Type *	SizeTy,
		unsigned	ElemSz,
		bool	isTailCall,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo )

Definition at line 10178 of file SelectionDAG.cpp.

References getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::RTLIB::getMEMCPY_ELEMENT_UNORDERED_ATOMIC(), llvm::Type::getVoidTy(), hasSwiftErrorArg(), llvm::report_fatal_error(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setDiscardResult(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and Size.

getAtomicMemmove()

SDValue SelectionDAG::getAtomicMemmove	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		Type *	SizeTy,
		unsigned	ElemSz,
		bool	isTailCall,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo )

Definition at line 10291 of file SelectionDAG.cpp.

References getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::RTLIB::getMEMMOVE_ELEMENT_UNORDERED_ATOMIC(), llvm::Type::getVoidTy(), hasSwiftErrorArg(), llvm::IntPtrTy, llvm::report_fatal_error(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setDiscardResult(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and Size.

getAtomicMemset()

SDValue SelectionDAG::getAtomicMemset	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Value,
		SDValue	Size,
		Type *	SizeTy,
		unsigned	ElemSz,
		bool	isTailCall,
		MachinePointerInfo	DstPtrInfo )

Definition at line 10425 of file SelectionDAG.cpp.

References getContext(), getDataLayout(), getExternalSymbol(), llvm::Type::getInt8Ty(), llvm::RTLIB::getMEMSET_ELEMENT_UNORDERED_ATOMIC(), llvm::Type::getVoidTy(), hasSwiftErrorArg(), llvm::report_fatal_error(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setDiscardResult(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and Size.

getBasicBlock()

SDValue SelectionDAG::getBasicBlock

(

MachineBasicBlock *

MBB

)

Definition at line 2084 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::BasicBlock, getVTList(), MBB, N, and SDValue().

Referenced by AddNodeIDCustom().

getBFI()

BlockFrequencyInfo * llvm::SelectionDAG::getBFI ( ) const

inline

Definition at line 506 of file SelectionDAG.h.

getBitcast()

SDValue SelectionDAG::getBitcast	(	EVT	VT,
		SDValue	V )

Return a bitcast using the SDLoc of the value operand, and casting to the provided type.

Use getNode to set a custom SDLoc.

Definition at line 2529 of file SelectionDAG.cpp.

References llvm::ISD::BITCAST, and getNode().

Referenced by addBitcastHints(), addShuffleForVecExtend(), adjustBitcastSrcVectorSSE1(), canonicalizeBitSelect(), canonicalizeLaneShuffleWithRepeatedOps(), canonicalizeShuffleMaskWithHorizOp(), canonicalizeShuffleVectorByLane(), canonicalizeShuffleWithOp(), combineAddMulh(), combineAnd(), combineAndMaskToShift(), combineAndNotIntoANDNP(), combineAndNotIntoVANDN(), combineAndnp(), combineAndShuffleNot(), combineArithReduction(), combineAtomicLoad(), combineBasicSADPattern(), combineBitcast(), combineBitcastToBoolVector(), combineBitcastvxi1(), combineBitOpWithMOVMSK(), combineBitOpWithPACK(), combineBitOpWithShift(), combineBITREVERSE(), combineBlendOfPermutes(), combineBROADCAST_LOAD(), combineCastedMaskArithmetic(), combineCMP(), combineCompareEqual(), combineCONCAT_VECTORS(), combineConcatVectorOfExtracts(), combineConcatVectorOfScalars(), combineConcatVectorOps(), combineConstantPoolLoads(), combineCVTP2I_CVTTP2I(), combineCVTPH2PS(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineExtractVectorElt(), combineExtractWithShuffle(), combineFaddCFmul(), combineFMulcFCMulc(), combineFneg(), combineFP_EXTEND(), combineFP_ROUND(), combineFP_ROUND(), combineHorizOpWithShuffle(), combineINSERT_SUBVECTOR(), combineKSHIFT(), combineLoad(), combineLogicBlendIntoConditionalNegate(), combineLogicBlendIntoPBLENDV(), combineMOVMSK(), combineMulToPMADDWD(), combineOr(), combinePCLMULQDQ(), combinePExtTruncate(), combinePMULDQ(), combinePMULH(), combinePTESTCC(), combineRedundantDWordShuffle(), combineSCALAR_TO_VECTOR(), combineScalarAndWithMaskSetcc(), combineSelect(), combineSetCCMOVMSK(), combineShuffleOfBitcast(), combineShuffleToAnyExtendVectorInreg(), combineShuffleToZeroExtendVectorInReg(), combineSIntToFP(), combineStore(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineToFPTruncExtElt(), combineToHorizontalAddSub(), combineTruncationShuffle(), combineVECREDUCE_LOGIC(), combineVECREDUCE_MUL(), combineVectorCompareAndMaskUnaryOp(), combineVectorHADDSUB(), combineVectorInsert(), combineVectorPack(), combineVectorShiftImm(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVPDPBUSDPattern(), combineVSelectWithAllOnesOrZeros(), combineVTRUNCSAT(), combineX86FPLogicOp(), combineX86INT_TO_FP(), combineX86ShuffleChain(), combineX86ShuffleChainWithExtract(), combineX86ShufflesConstants(), combineX86ShufflesRecursively(), combineXor(), constructDup(), convertIntLogicToFPLogic(), convertShiftLeftToScale(), convertTwoLoadsAndCmpToVCMPEQUB(), createMMXBuildVector(), createVariablePermute(), EltsFromConsecutiveLoads(), expandBitCastF128ToI128(), expandBitCastI128ToF128(), llvm::TargetLowering::expandIS_FPCLASS(), llvm::TargetLowering::expandUINT_TO_FP(), ExtractBitFromMaskVector(), FixupMMXIntrinsicTypes(), FoldConstantArithmetic(), FoldConstantBuildVector(), FoldIntToFPToInt(), GeneratePerfectShuffle(), generateSToVPermutedForVecShuffle(), getAVX2GatherNode(), getBitcastedAnyExtOrTrunc(), getBitcastedSExtOrTrunc(), getBitcastedZExtOrTrunc(), getBuildDwordsVector(), getCanonicalConstSplat(), getConstVector(), getConstVector(), getCopyFromPartsVector(), getCopyToPartsVector(), getDataClassTest(), getDeinterleaveShiftAndTrunc(), getDWordFromOffset(), GetExtendHigh(), getFlagsOfCmpZeroFori1(), getMaskNode(), getMemsetValue(), llvm::X86TargetLowering::getNegatedExpression(), getOnesVector(), getPack(), getScalarMaskingNode(), getScalarValueForVectorElement(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getv64i1Argument(), getVCIXISDNodeWCHAIN(), getVectorBitwiseReduce(), getVShift(), getWideningInterleave(), getWideningSpread(), getZeroVector(), llvm::TargetLowering::IncrementMemoryAddress(), IsNOT(), isNOT(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), llvm::SystemZTargetLowering::joinRegisterPartsIntoValue(), lower128BitShuffle(), lower1BitShuffle(), lower256BitShuffle(), lower512BitShuffle(), LowerATOMIC_STORE(), LowerAVXExtend(), llvm::HexagonTargetLowering::LowerBITCAST(), LowerBITCAST(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), lowerBitreverseShuffle(), lowerBSWAP(), lowerBUILD_VECTOR(), LowerBUILD_VECTORvXbf16(), LowerBUILD_VECTORvXi1(), lowerBuildVectorAsBroadcast(), LowerBuildVectorAsInsert(), lowerBuildVectorOfConstants(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), llvm::HexagonTargetLowering::LowerCall(), LowerCLMUL(), LowerCTPOP(), LowerEXTEND_VECTOR_INREG(), llvm::VETargetLowering::lowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFMINIMUM_FMAXIMUM(), llvm::SITargetLowering::LowerFormalArguments(), LowerFunnelShift(), LowerHorizontalByteSum(), llvm::VETargetLowering::lowerINSERT_VECTOR_ELT(), lowerIntNeonIntrinsic(), lowerLaneOp(), LowerLoad(), lowerMasksToReg(), LowerMINMAX(), LowerMINMAX_REDUCE(), LowerMUL(), LowerMULH(), llvm::RISCVTargetLowering::LowerOperation(), lowerPZExt(), lowerRegToMasks(), llvm::HexagonTargetLowering::LowerReturn(), LowerRotate(), LowerSCALAR_TO_VECTOR(), LowerShift(), LowerShiftByScalarImmediate(), LowerShiftByScalarVariable(), lowerShuffleAsBitMask(), lowerShuffleAsBitRotate(), lowerShuffleAsBlend(), lowerShuffleAsBlendOfPSHUFBs(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsByteShiftMask(), lowerShuffleAsElementInsertion(), lowerShuffleAsLanePermuteAndShuffle(), lowerShuffleAsPermuteAndUnpack(), lowerShuffleAsShift(), lowerShuffleAsSpecificExtension(), lowerShuffleAsVALIGN(), lowerShuffleAsVTRUNCAndUnpack(), lowerShuffleAsZeroOrAnyExtend(), lowerShuffleWithPACK(), lowerShuffleWithPSHUFB(), lowerShuffleWithUNPCK256(), lowerShuffleWithVPMOV(), LowerStore(), lowerSTOREVector(), LowerTruncateVecI1(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerUINT_TO_FP_i32(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), lowerV16F32Shuffle(), lowerV16I32Shuffle(), lowerV16I8Shuffle(), lowerV2I64Shuffle(), lowerV4F32Shuffle(), lowerV4I32Shuffle(), lowerV4I64Shuffle(), lowerV8F16Shuffle(), lowerV8F32Shuffle(), lowerV8I16GeneralSingleInputShuffle(), lowerV8I16Shuffle(), lowerV8I32Shuffle(), lowerV8I64Shuffle(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE_IsReverse(), lowerVECTOR_SHUFFLEAsByteRotate(), lowerVECTOR_SHUFFLEAsLanePermuteAndShuffle(), lowerVECTOR_SHUFFLEAsRotate(), lowerVECTOR_SHUFFLEAsShift(), lowerVECTOR_SHUFFLEAsVSlide1(), lowerVECTOR_SHUFFLEAsZeroOrAnyExtend(), LowerVECTOR_SHUFFLEUsingMovs(), LowerVectorAllEqual(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), lowerVectorIntrinsicScalars(), LowerVectorMatch(), LowerVSETCC(), LowervXi8MulWithUNPCK(), lowerWaveShuffle(), lowerZvzipVPAIR(), lowerZvzipVUNZIP(), lowerZvzipVZIP(), matchPERM(), MergeBlocksConvert(), narrowExtractedVectorBinOp(), narrowExtractedVectorSelect(), packImage16bitOpsToDwords(), Passv64i1ArgInRegs(), performBITCASTCombine(), performBitcastCombine(), PerformBUILD_VECTORCombine(), performCONCAT_VECTORSCombine(), performConcatVectorsCombine(), performConvertFPCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performExtendToBoolVectorLoadCombine(), performMulCombine(), performSETCC_BITCASTCombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), performUzpCombine(), performVANDNCombine(), performVECTOR_SHUFFLECombine(), performVECTOR_SHUFFLECombine(), processVCIXOperands(), llvm::AArch64TargetLowering::ReconstructShuffle(), reduceBuildVecToShuffleWithZero(), reduceMaskedLoadToScalarLoad(), reduceMaskedStoreToScalarStore(), reduceVMULWidth(), ReplaceBITCAST(), replaceLoadVector(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeExtractedVectorLoad(), scalarizeVectorStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle(), llvm::TargetLowering::SimplifyMultipleUseDemandedBits(), llvm::X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(), splitAndLowerShuffle(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), llvm::SystemZTargetLowering::splitValueIntoRegisterParts(), takeInexpensiveLog2(), truncateVectorWithNARROW(), truncateVectorWithPACK(), tryCombineNeonFcvtFP16ToI16(), tryWidenMaskForShuffle(), tryWidenMaskForShuffle(), llvm::X86TargetLowering::visitMaskedLoad(), llvm::X86TargetLowering::visitMaskedStore(), widenBuildVec(), widenBuildVector(), widenPackedVectorWithZeros(), and widenShuffleMask().

getBitcastedAnyExtOrTrunc()

SDValue SelectionDAG::getBitcastedAnyExtOrTrunc	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of integer type, to the integer type VT, by first bitcasting (from potential vector) to corresponding scalar type then either any-extending or truncating it.

Definition at line 1590 of file SelectionDAG.cpp.

References assert(), DL, getAnyExtOrTrunc(), getBitcast(), llvm::EVT::getIntegerVT(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), and Size.

Referenced by getDWordFromOffset(), and matchPERM().

getBitcastedSExtOrTrunc()

SDValue SelectionDAG::getBitcastedSExtOrTrunc	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of integer type, to the integer type VT, by first bitcasting (from potential vector) to corresponding scalar type then either sign-extending or truncating it.

Definition at line 1605 of file SelectionDAG.cpp.

References assert(), DL, getBitcast(), llvm::MVT::getIntegerVT(), getSExtOrTrunc(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), and Size.

getBitcastedZExtOrTrunc()

SDValue SelectionDAG::getBitcastedZExtOrTrunc	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of integer type, to the integer type VT, by first bitcasting (from potential vector) to corresponding scalar type then either zero-extending or truncating it.

Definition at line 1620 of file SelectionDAG.cpp.

References assert(), DL, getBitcast(), llvm::MVT::getIntegerVT(), llvm::SDValue::getValueType(), getZExtOrTrunc(), llvm::EVT::isVector(), and Size.

getBlockAddress()

SDValue SelectionDAG::getBlockAddress	(	const BlockAddress *	BA,
		EVT	VT,
		int64_t	Offset = 0,
		bool	isTarget = false,
		unsigned	TargetFlags = 0 )

Definition at line 2478 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::BlockAddress, getVTList(), N, llvm::Offset, Opc, SDValue(), and llvm::ISD::TargetBlockAddress.

Referenced by getTargetBlockAddress(), and llvm::LanaiTargetLowering::LowerBlockAddress().

getBoolConstant()

SDValue SelectionDAG::getBoolConstant	(	bool	V,
		const SDLoc &	DL,
		EVT	VT,
		EVT	OpVT )

Create a true or false constant of type VT using the target's BooleanContent for type OpVT.

Definition at line 1694 of file SelectionDAG.cpp.

References DL, getAllOnesConstant(), getConstant(), llvm_unreachable, llvm::TargetLoweringBase::UndefinedBooleanContent, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.

Referenced by llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandIS_FPCLASS(), llvm::TargetLowering::expandMultipleResultFPLibCall(), FoldSetCC(), getDataClassTest(), getLogicalNOT(), getNode(), performSETCCCombine(), llvm::TargetLowering::SimplifySetCC(), and UnrollVectorOverflowOp().

getBoolExtOrTrunc()

SDValue SelectionDAG::getBoolExtOrTrunc	(	SDValue	Op,
		const SDLoc &	SL,
		EVT	VT,
		EVT	OpVT )

Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate for the target's BooleanContent for type OpVT or truncating it.

Definition at line 1635 of file SelectionDAG.cpp.

References llvm::EVT::bitsLE(), getNode(), and llvm::ISD::TRUNCATE.

Referenced by combineCarryDiamond(), combineSelectAsExtAnd(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandFP_TO_UINT(), llvm::TargetLowering::expandSADDSUBO(), llvm::TargetLowering::expandUADDSUBO(), llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVectorMatch(), and llvm::TargetLowering::SimplifySetCC().

getBuildVector() [1/2]

SDValue llvm::SelectionDAG::getBuildVector ( EVT VT, const SDLoc & DL, ArrayRef< SDUse > Ops )

inline

Return an ISD::BUILD_VECTOR node.

The number of elements in VT, which must be a vector type, must match the number of operands in Ops. The operands must have the same type as (or, for integers, a type wider than) VT's element type.

Definition at line 874 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::BUILD_VECTOR, DL, and getNode().

getBuildVector() [2/2]

SDValue llvm::SelectionDAG::getBuildVector ( EVT VT, const SDLoc & DL, ArrayRef< SDValue > Ops )

inline

Return an ISD::BUILD_VECTOR node.

The number of elements in VT, which must be a vector type, must match the number of operands in Ops. The operands must have the same type as (or, for integers, a type wider than) VT's element type.

Definition at line 865 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::BUILD_VECTOR, DL, and getNode().

Referenced by adjustLoadValueTypeImpl(), llvm::SparcTargetLowering::bitcastConstantFPToInt(), BuildExactSDIV(), BuildExactUDIV(), buildScalarToVector(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), combineADDToSUB(), combineAndOnGF2P8AFFINEQBOperand(), combineConcatVectorOfScalars(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineNestedGF2P8AFFINEQB(), combineOrWithGF2P8AFFINEQB(), combineShuffleOfScalars(), combineStore(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineX86ShuffleChain(), combineXorWithGF2P8AFFINEQB(), CompactSwizzlableVector(), convertLocVTToValVT(), convertShiftLeftToScale(), ExtendToType(), extractSubVector(), extractSubVector(), foldCONCAT_VECTORS(), FoldConstantArithmetic(), FoldConstantBuildVector(), GenerateFixedLengthSVETBL(), GenerateTBL(), getBuildDwordsVector(), getBuildVectorizedValue(), getBuildVectorSplat(), getConstant(), getConstVector(), getConstVector(), getCopyFromPartsVector(), getDWordFromOffset(), getGeneralPermuteNode(), getGFNICtrlMask(), llvm::TargetLowering::getNegatedExpression(), getStepVector(), getTargetVShiftNode(), getVectorShuffle(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), lowerBUILD_VECTOR(), LowerBUILD_VECTORvXi1(), lowerBuildVectorOfConstants(), lowerBuildVectorToBitOp(), LowerBuildVectorv4x32(), lowerBuildVectorViaDominantValues(), lowerBuildVectorViaPacking(), llvm::AMDGPUTargetLowering::LowerCONCAT_VECTORS(), lowerDisjointIndicesShuffle(), llvm::AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(), llvm::SITargetLowering::LowerFormalArguments(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT64(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), lowerINT_TO_FP_vXi64(), lowerLaneOp(), lowerMSABinaryBitImmIntr(), lowerMSASplatZExt(), LowerShift(), lowerShuffleAsBlend(), lowerShuffleAsBlendOfPSHUFBs(), lowerShuffleAsSpecificExtension(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), lowerSTOREVector(), LowerTruncateVectorStore(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), lowerV16I8Shuffle(), lowerV8I16Shuffle(), lowerVECTOR_SHUFFLE_VSHF(), lowerVECTOR_SHUFFLE_VSHUF(), lowerVECTOR_SHUFFLE_XVPERM(), lowerVECTOR_SHUFFLE_XVSHUF(), lowerVECTOR_SHUFFLEAsVRGatherVX(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPInRegLUT(), NormalizeBuildVector(), packImage16bitOpsToDwords(), padEltsToUndef(), PerformBUILD_VECTORCombine(), performBUILD_VECTORCombine(), performConcatVectorsCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), performVECTOR_SHUFFLECombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReconstructShuffleWithRuntimeMask(), ReorganizeVector(), ReplaceINTRINSIC_W_CHAIN(), replaceLoadVector(), llvm::X86TargetLowering::ReplaceNodeResults(), scalarizeBinOpOfSplats(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::SimplifyDemandedVectorElts(), SkipExtensionForVMULL(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), llvm::AMDGPUTargetLowering::splitVector(), takeInexpensiveLog2(), tryBuildVectorShuffle(), tryToConvertShuffleOfTbl2ToTbl4(), tryToFoldExtendOfConstant(), UnrollVectorOp(), UnrollVectorOverflowOp(), unrollVectorShift(), widenBuildVec(), widenBuildVector(), and widenVectorToPartType().

getCalledGlobal()

std::optional< CalledGlobalInfo > llvm::SelectionDAG::getCalledGlobal ( const SDNode * Node )

inline

Return CalledGlobal associated with Node, or a nullopt if none exists.

Definition at line 2667 of file SelectionDAG.h.

References I.

getCALLSEQ_END() [1/2]

SDValue llvm::SelectionDAG::getCALLSEQ_END ( SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, const SDLoc & DL )

inline

Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd).

CALLSEQ_END does not have a useful SDLoc.

Definition at line 1128 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::CALLSEQ_END, DL, llvm::SDValue::getNode(), getNode(), and getVTList().

Referenced by getCALLSEQ_END(), GetTLSADDR(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::VETargetLowering::lowerToTLSGeneralDynamicModel(), llvm::AMDGPUTargetLowering::lowerUnhandledCall(), and PrepareTailCall().

getCALLSEQ_END() [2/2]

SDValue llvm::SelectionDAG::getCALLSEQ_END ( SDValue Chain, uint64_t Size1, uint64_t Size2, SDValue Glue, const SDLoc & DL )

inline

Definition at line 1140 of file SelectionDAG.h.

References DL, getCALLSEQ_END(), getIntPtrConstant(), and uint64_t.

getCALLSEQ_START()

SDValue llvm::SelectionDAG::getCALLSEQ_START ( SDValue Chain, uint64_t InSize, uint64_t OutSize, const SDLoc & DL )

inline

Return a new CALLSEQ_START node, that starts new call frame, in which InSize bytes are set up inside CALLSEQ_START..CALLSEQ_END sequence and OutSize specifies part of the frame set up prior to the sequence.

Definition at line 1116 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::CALLSEQ_START, DL, getIntPtrConstant(), getNode(), getVTList(), and uint64_t.

Referenced by GetTLSADDR(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::VETargetLowering::lowerToTLSGeneralDynamicModel(), and llvm::AMDGPUTargetLowering::lowerUnhandledCall().

getCallSiteInfo()

CallSiteInfo llvm::SelectionDAG::getCallSiteInfo ( const SDNode * Node )

inline

Return CallSiteInfo associated with Node, or a default if none exists.

Definition at line 2629 of file SelectionDAG.h.

References CallSiteInfo, and I.

getCommutedVectorShuffle()

SDValue SelectionDAG::getCommutedVectorShuffle

(

const ShuffleVectorSDNode &

SV

)

Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swapped operands.

Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3>

Definition at line 2414 of file SelectionDAG.cpp.

References llvm::ShuffleVectorSDNode::commuteMask(), llvm::ShuffleVectorSDNode::getMask(), llvm::SDNode::getOperand(), llvm::SDNode::getValueType(), and getVectorShuffle().

Referenced by lowerVECTOR_SHUFFLE().

getCondCode()

SDValue SelectionDAG::getCondCode

(

ISD::CondCode

Cond

)

Definition at line 2150 of file SelectionDAG.cpp.

References Cond, N, and SDValue().

Referenced by combine_CC(), combine_CC(), combineVSelectWithAllOnesOrZeros(), getSelectCC(), llvm::TargetLowering::LegalizeSetCCCondCode(), lowerBALLOTIntrinsic(), lowerFCMPIntrinsic(), lowerICMPIntrinsic(), LowerTruncatei1(), lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(), lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(), LowerVSETCC(), performIntrinsicCombine(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), splitVSETCC(), and tryConvertSVEWideCompare().

getConstant() [1/3]

SDValue SelectionDAG::getConstant	(	const APInt &	Val,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false,
		bool	isOpaque = false )

Definition at line 1715 of file SelectionDAG.cpp.

References DL, and getConstant().

getConstant() [2/3]

SDValue SelectionDAG::getConstant	(	const ConstantInt &	Val,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false,
		bool	isOpaque = false )

Definition at line 1720 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::append_range(), assert(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::ISD::BITCAST, llvm::ISD::Constant, DL, llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::APInt::extractBits(), llvm::ConstantInt::getBitWidth(), getBuildVector(), getConstant(), getContext(), getDataLayout(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), getSplat(), llvm::Value::getType(), llvm::ConstantInt::getValue(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), getVTList(), llvm::isa(), isBigEndian(), llvm::EVT::isInteger(), llvm::EVT::isScalableVector(), llvm::EVT::isVector(), N, NewNodesMustHaveLegalTypes, NewSDValueDbgMsg(), Opc, llvm::SmallVectorTemplateBase< T, bool >::push_back(), SDValue(), llvm::APInt::sextOrTrunc(), llvm::ISD::SPLAT_VECTOR, llvm::ISD::SPLAT_VECTOR_PARTS, llvm::ISD::TargetConstant, llvm::TargetLoweringBase::TypeExpandInteger, llvm::TargetLoweringBase::TypePromoteInteger, and llvm::APInt::zextOrTrunc().

getConstant() [3/3]

SDValue SelectionDAG::getConstant	(	uint64_t	Val,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false,
		bool	isOpaque = false )

Create a ConstantSDNode wrapping a constant value.

If VT is a vector type, the constant is splatted into a BUILD_VECTOR.

If only legal types can be produced, this does the necessary transformations (e.g., if the vector element type is illegal).

Definition at line 1709 of file SelectionDAG.cpp.

References DL, getConstant(), and llvm::EVT::getScalarSizeInBits().

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), addIPMSequence(), adjustForSubtraction(), adjustForTestUnderMask(), adjustICmpTruncate(), AdjustLength(), adjustSubwordCmp(), adjustZeroCmp(), llvm::SparcTargetLowering::bitcastConstantFPToInt(), bitcastf32Toi32(), buildCallOperands(), BuildExactSDIV(), BuildExactUDIV(), BuildIntrinsicOp(), BuildIntrinsicOp(), BuildIntrinsicOp(), llvm::SITargetLowering::buildRSRC(), llvm::TargetLowering::BuildSDIV(), llvm::PPCTargetLowering::BuildSDIVPow2(), llvm::TargetLowering::buildSDIVPow2WithCMov(), llvm::TargetLowering::BuildUDIV(), canonicalizeMaskForVLPredicate(), canonicalizePRMTInput(), canonicalizeShuffleVectorByLane(), carryFlagToValue(), carryFlagToValue(), checkSignTestSetCCCombine(), clampDynamicVectorIndex(), combine_CC(), combine_CC(), combineAcrossLanesIntrinsic(), combineADC(), combineAdd(), combineAddMulh(), combineAddOrSubToADCOrSBB(), combineADDToADDZE(), combineADDToSUB(), combineAnd(), combineAndLoadToBZHI(), combineAndnp(), combineAndOnGF2P8AFFINEQBOperand(), CombineANDShift(), combineAndXorSubWithBMI(), combineArithReduction(), combineAVG(), combineAVX512SetCCToKMOV(), CombineBaseUpdate(), combineBitcast(), combineBitcastToBoolVector(), combineCarryDiamond(), combineCarryThroughADD(), combineCMov(), combineCMP(), combineCompareEqual(), combineCONCAT_VECTORS(), combineConcatVectorOps(), combineDeMorganOfBoolean(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineExtractVectorElt(), combineExtractWithShuffle(), combineFP_EXTEND(), combineFP_TO_xINT_SAT(), combineGatherScatter(), combinei64TruncSrlConstant(), combineKSHIFT(), combineM68kBrCond(), combineMOVMSK(), combineMul(), combineMulSpecial(), combineMulToPMADDWD(), combineNarrowableShiftedLoad(), combineNestedGF2P8AFFINEQB(), combineOr(), combineOrAndToBitfieldInsert(), combineOrToBitfieldInsert(), combineOrWithGF2P8AFFINEQB(), combinePExtWideningMul(), combinePMULDQ(), combinePRMT(), combinePTESTCC(), combineSCALAR_TO_VECTOR(), combineScalarAndWithMaskSetcc(), combineSelect(), llvm::VETargetLowering::combineSelect(), llvm::VETargetLowering::combineSelectCC(), combineSelectOfTwoConstants(), combineSetCC(), combineSetCCAtomicArith(), combineSetCCMOVMSK(), combineShiftAnd1ToBitTest(), combineShiftLeft(), combineShiftOfShiftedLogic(), combineShiftRightArithmetic(), combineShiftRightLogical(), combineSmallMaskReduction(), combineStore(), combineSub(), combineSubOfBoolean(), combineSubSetcc(), combineSVEReductionFP(), combineSVEReductionInt(), combineSVEReductionOrderedFP(), combineSZExtToMulWide(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineTruncOfSraSext(), combineTruncSelectToSMaxUSat(), combineUADDO_CARRYDiamond(), combineVECREDUCE_LOGIC(), combineVectorCompare(), combineVectorMulToSraBitcast(), combineVectorShiftImm(), combineVectorShiftVar(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), CombineVMOVDRRCandidateWithVecOp(), combineVPMADD(), combineVSelectWithAllOnesOrZeros(), combinevXi1ConstantToInteger(), combineWideMaskReduction(), combineX86AddSub(), combineX86ShuffleChain(), combineX86XOR(), combineXorToBitfieldInsert(), combineXorWithGF2P8AFFINEQB(), combineZextSetccWithZero(), constantFoldBFE(), constructDup(), constructRetValue(), ConvertCarryFlagToCarryValue(), ConvertCarryValueToCarryFlag(), convertFixedMaskToScalableVector(), convertFromF16(), convertMulToShlAdd(), convertRMEncoding(), ConvertSETCCToXori(), convertShiftLeftToScale(), convertToF16(), convertTwoLoadsAndCmpToVCMPEQUB(), convertValVTToLocVT(), CreateCopyOfByValArgument(), CreateCopyOfByValArgument(), CreateCopyOfByValArgument(), createFPCmp(), createLoadLR(), createPSADBW(), createSetFPEnvNodes(), createStoreLR(), createVariablePermute(), createVPDPBUSD(), llvm::TargetLowering::CTTZTableLookup(), customLegalizeToWOp(), EltsFromConsecutiveLoads(), EmitCMP(), emitConditionalComparison(), emitConstantSizeRepmov(), emitConstantSizeRepstos(), emitFloatCompareMask(), emitMemMemImm(), emitSETCC(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::BPFSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::RISCVSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(), EmitTest(), emitVectorComparison(), Expand64BitShift(), llvm::TargetLowering::expandABS(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandAVG(), llvm::TargetLowering::expandBITREVERSE(), llvm::TargetLowering::expandBSWAP(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLS(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTPOP(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandCttzElts(), expandDivFix(), expandf64Toi32(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandFP_TO_UINT(), expandFSH64(), llvm::TargetLowering::expandFunnelShift(), llvm::TargetLowering::expandIntMINMAX(), expandIntrinsicWChainHelper(), llvm::TargetLowering::expandIS_FPCLASS(), llvm::TargetLowering::expandLoopDependenceMask(), expandMul(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandMULO(), expandMulToAddOrSubOfShl(), expandMulToNAFSequence(), expandMulToShlAddShlAdd(), llvm::TargetLowering::expandROT(), llvm::TargetLowering::expandRoundInexactToOdd(), llvm::TargetLowering::expandSADDSUBO(), llvm::TargetLowering::expandShiftParts(), llvm::TargetLowering::expandShlSat(), llvm::TargetLowering::expandUADDSUBO(), llvm::TargetLowering::expandUINT_TO_FP(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVectorMatch(), llvm::TargetLowering::expandVPCTTZElements(), ExtendToType(), extractF64Exponent(), extractShiftForRotate(), fillVector(), finalizeTS1AM(), foldAddSubBoolOfMaskedVal(), foldAndOrOfSETCC(), foldAndToUsubsat(), FoldConstantArithmetic(), FoldConstantBuildVector(), foldCSELofCTTZ(), foldExtendedSignBitTest(), foldMaskAndShiftToExtract(), foldMaskAndShiftToScale(), foldMaskedShiftToBEXTR(), foldMaskedShiftToUSHL(), foldReduceOperandViaVDOT4A(), foldSelectOfConstantsUsingSra(), foldSelectOfCTTZOrCTLZ(), FoldSetCC(), foldSetCCWithFunnelShift(), FoldSTEP_VECTOR(), foldVectorXorShiftIntoCmp(), llvm::TargetLowering::forceExpandMultiply(), llvm::TargetLowering::forceExpandWideMUL(), genConstMult(), generateEquivalentSub(), GenerateFixedLengthSVETBL(), GeneratePerfectShuffle(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), llvm::MipsTargetLowering::getAddrNonPICSym64(), getAllOnesConstant(), getARMIndexedAddressParts(), getAVX512Node(), getBitTestCondition(), getBoolConstant(), getBoundedStrlen(), getBuildVectorSplat(), getCanonicalConstSplat(), getCCResult(), getCondCode(), getConstant(), getConstant(), getConstant(), getConstVector(), getConstVector(), llvm::RegsForValue::getCopyFromRegs(), getCSAddressAndShifts(), getDataClassTest(), getDefaultVLOps(), getDeinterleaveShiftAndTrunc(), getDWordFromOffset(), GetExponent(), getFixedOrScalableQuantity(), getFlagsOfCmpZeroFori1(), getGeneralPermuteNode(), getGFNICtrlMask(), llvm::AMDGPUTargetLowering::getHiHalf64(), getIdentityElement(), getIntPtrConstant(), getInvertedARMCondCode(), getLegalMaskAndStepVector(), llvm::AMDGPUTargetLowering::getLoHalf64(), getMaskFromElementCount(), getMaskNode(), getMemsetStringVal(), getMemsetValue(), getMOVMSK(), getMVEIndexedAddressParts(), getNegative(), getNode(), getNode(), getNode(), getPack(), llvm::AVRTargetLowering::getPostIndexedAddressParts(), getPredicateForScalableVector(), getPRMT(), getPRMT(), getPTest(), getPTrue(), getPTrueAsCounter(), getReductionSDNode(), getScaledOffsetForBitWidth(), getSETCC(), getSETCC(), getShiftAmountConstant(), getShlAddShlAdd(), getShuffleScalarElt(), getSignedConstant(), GetSignificand(), llvm::NVPTXTargetLowering::getSqrtEstimate(), getStepVector(), getSVEPredicateBitCast(), getT2IndexedAddressParts(), getTargetConstant(), getTargetConstant(), getTargetConstant(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getTruncatedUSUBSAT(), getUniformBase(), getVectorBitwiseReduce(), getVectorIdxConstant(), llvm::TargetLowering::getVectorSubVecPointer(), getVScale(), getWideningInterleave(), getWideningSpread(), getZeroExtendInReg(), getZeroVector(), getzOSCalleeAndADA(), llvm::TargetLowering::IncrementMemoryAddress(), initializeM0ToZeroForClusterLoad(), insert1BitVector(), IntCondCCodeToICC(), isConditionalZeroOrAllOnes(), isConditionalZeroOrAllOnes(), isOrXorChain(), IsSingleInstrConstant(), legalizeIntrinsicImmArg(), llvm::AMDGPUTargetLowering::loadInputValue(), lower1BitShuffle(), LowerABS(), lowerAddrSpaceCast(), LowerADDSAT_SUBSAT(), LowerAndToBT(), LowerAndToBTST(), LowerAsSplatVectorLoad(), LowerATOMIC_FENCE(), LowerAVXExtend(), lowerBALLOTIntrinsic(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), lowerBitreverseShuffle(), llvm::LanaiTargetLowering::LowerBR_CC(), LowerBR_CC(), lowerBSWAP(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), lowerBUILD_VECTOR(), LowerBUILD_VECTOR_i1(), LowerBUILD_VECTORToVIDUP(), LowerBUILD_VECTORvXi1(), lowerBuildVectorOfConstants(), LowerBuildVectorOfFPExt(), LowerBuildVectorOfFPTrunc(), LowerBuildVectorv16i8(), lowerBuildVectorViaPacking(), lowerBuildVectorViaVID(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), lowerCallResult(), llvm::TargetLowering::LowerCallTo(), llvm::TargetLowering::lowerCmpEqZeroToCtlzSrl(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS_i1(), LowerCONCAT_VECTORSvXi1(), llvm::AMDGPUTargetLowering::LowerCTLS(), LowerCTLZ(), llvm::AMDGPUTargetLowering::LowerCTLZ_CTTZ(), llvm::AMDGPUTargetLowering::lowerCTLZResults(), LowerCTPOP(), LowerCTPOP(), LowerCTTZ(), lowerCttzElts(), lowerCvtRSIntrinsics(), lowerDisjointIndicesShuffle(), llvm::AMDGPUTargetLowering::LowerDIVREMToFloat(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_SUBVECTOR(), llvm::VETargetLowering::lowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_i1(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), LowerF128Store(), llvm::AMDGPUTargetLowering::LowerF64ToF16Safe(), lowerFABSorFNEG(), lowerFCOPYSIGN(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), llvm::AMDGPUTargetLowering::lowerFEXP(), LowerFGETSIGN(), LowerFLDEXP(), llvm::AMDGPUTargetLowering::LowerFLOGCommon(), LowerFMINIMUM_FMAXIMUM(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFP16_TO_FP(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT64(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT_SAT(), LowerFP_TO_INT_SAT(), lowerFP_TO_INT_SAT(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), LowerFunnelShift(), LowerFunnelShift(), llvm::SITargetLowering::lowerGET_ROUNDING(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), lowerGR128ToI128(), LowerHorizontalByteSum(), lowerI128ToGR128(), llvm::VETargetLowering::lowerINSERT_VECTOR_ELT(), LowerINSERT_VECTOR_ELT_i1(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP64(), lowerINT_TO_FP_vXi64(), LowerInterruptReturn(), llvm::HexagonTargetLowering::LowerINTRINSIC_VOID(), LowerINTRINSIC_W_CHAIN(), LowerLabelRef(), lowerLaneOp(), llvm::MipsTargetLowering::lowerLOAD(), lowerLoadF128(), lowerLoadI1(), LowerMemOpCallTo(), LowerMINMAX_REDUCE(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSASplatImm(), lowerMSASplatZExt(), llvm::LanaiTargetLowering::LowerMUL(), LowerMUL(), lowerMUL_LOHI32(), LowerMULH(), LowerMULO(), llvm::R600TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), lowerOverflowArithmetic(), LowerPARITY(), lowerPredicateInterleaveWithPackedVectors(), LowerPredicateLoad(), LowerPredicateStore(), llvm::HexagonTargetLowering::LowerPREFETCH(), LowerPREFETCH(), lowerPrmtIntrinsic(), lowerPZExt(), lowerReductionSeq(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), lowerRETURNADDR(), LowerRotate(), LowerSaturatingConditional(), lowerScalarInsert(), lowerScalarSplat(), LowerSDIV_v4i16(), LowerSDIV_v4i8(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::LanaiTargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), LowerSELECTWithCmpZero(), llvm::SITargetLowering::lowerSET_FPENV(), llvm::SITargetLowering::lowerSET_ROUNDING(), llvm::LanaiTargetLowering::LowerSETCC(), llvm::MSP430TargetLowering::LowerSETCC(), LowerSETCCCARRY(), LowerShift(), LowerShift(), LowerShiftByScalarImmediate(), LowerShiftByScalarVariable(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), lowerShuffleAsBlend(), lowerShuffleAsBlendOfPSHUFBs(), lowerShuffleAsSpecificExtension(), lowerShuffleAsTruncBroadcast(), lowerShuffleAsVTRUNCAndUnpack(), lowerShuffleWithEXPAND(), LowerSIGN_EXTEND_Mask(), LowerSMELdrStr(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerSTACKADDRESS(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), lowerStoreF128(), lowerStoreI1(), LowerSVEIntrinsicEXT(), LowerTruncatei1(), LowerTruncateVecI1(), LowerTruncateVectorStore(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), lowerV16I8Shuffle(), lowerV8I16Shuffle(), llvm::VETargetLowering::lowerVAARG(), LowerVecReduce(), LowerVecReduceMinMax(), lowerVECTOR_COMPRESS(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_i1(), lowerVECTOR_SHUFFLE_IsReverse(), lowerVECTOR_SHUFFLE_VEXTRINS(), lowerVECTOR_SHUFFLE_VPERMI(), lowerVECTOR_SHUFFLE_VREPLVEI(), lowerVECTOR_SHUFFLE_VSHUF4I(), lowerVECTOR_SHUFFLE_XVEXTRINS(), lowerVECTOR_SHUFFLE_XVINSVE0(), lowerVECTOR_SHUFFLE_XVPERM(), lowerVECTOR_SHUFFLE_XVPERMI(), lowerVECTOR_SHUFFLE_XVREPLVEI(), lowerVECTOR_SHUFFLE_XVSHUF4I(), lowerVECTOR_SHUFFLEAsByteRotate(), lowerVECTOR_SHUFFLEAsRotate(), lowerVECTOR_SHUFFLEAsRV32PNarrowingShift(), lowerVECTOR_SHUFFLEAsShift(), lowerVECTOR_SHUFFLEAsVRGatherVX(), lowerVECTOR_SHUFFLEAsVSlidedown(), lowerVECTOR_SHUFFLEAsVSlideup(), lowerVECTOR_SHUFFLEAsZeroOrAnyExtend(), LowerVECTOR_SHUFFLEUsingMovs(), LowerVectorAllEqual(), lowerVectorBitClear(), lowerVectorBitClearImm(), lowerVectorBitRevImm(), lowerVectorBitSetImm(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPInRegLUT(), lowerVectorIntrinsicScalars(), LowerVectorMatch(), lowerVectorPickVE2GR(), lowerVectorSplatImm(), LowerVSETCC(), LowerVSETCC(), LowerVSETCCWithSUBUS(), LowervXi8MulWithUNPCK(), lowerWaveShuffle(), lowerX86CmpEqZeroToCtlzSrl(), LowerXALUO(), LowerZERO_EXTEND_Mask(), lowerZvzipVUNZIP(), llvm::SparcTargetLowering::makeAddress(), matchMergedBFX(), matchPERM(), matchPMADDWD(), MatchVectorAllEqualTest(), memsetStore(), narrowBitOpRMW(), narrowIndex(), NormalizeBuildVector(), optimizeBitTest(), optimizeIncrementingWhile(), optimizeLogicalImm(), optimizeLogicalImm(), overflowFlagToValue(), overflowFlagToValue(), llvm::SITargetLowering::passSpecialInputs(), performAddAddCombine(), performAddCSelIntoCSinc(), PerformAddcSubcCombine(), PerformAddeSubeCombine(), performAddMulZextCombine(), performAddSubCarryCombine(), performAddSubIntoVectorOp(), performAddUADDVCombine(), performANDCombine(), performANDCombine(), performANDCombine(), performANDORCSELCombine(), performANDSCombine(), performANDSETCCCombine(), performAnyAllCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBitcastCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performCONCAT_VECTORSCombine(), performConcatVectorsCombine(), performCONDCombine(), performConvertFPCombine(), PerformCSETCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::HexagonTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performDSPShiftCombine(), performDUPCombine(), PerformExtendCombine(), PerformEXTRACTCombine(), PerformExtractEltCombine(), PerformExtractEltToVMOVRRD(), performExtractVectorEltCombine(), llvm::AMDGPUTargetLowering::performFAbsCombine(), performFirstTrueTestVectorCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFP_TO_INT_SATCombine(), performGlobalAddressCombine(), performInsertSubvectorCombine(), performINTRINSIC_WO_CHAINCombine(), llvm::ARMTargetLowering::PerformIntrinsicCombine(), performIntrinsicCombine(), performLastTrueTestVectorCombine(), performLDNT1Combine(), PerformLongShiftCombine(), performMaskedLoadToVPLoadCombine(), PerformMinMaxCombine(), PerformMinMaxToSatCombine(), PerformMULCombine(), performMulCombine(), performMulRdsvlCombine(), performMulVectorCmpZeroCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performORCombine(), performORCombine(), PerformORCombineToBFI(), PerformORCombineToShiftInsert(), performP_BITCASTCombine(), PerformPREDICATE_CASTCombine(), performReverseEVLCombine(), performRNDRCombine(), performSELECT_CCCombine(), performSetccAddFolding(), performSETCCCombine(), performSETCCCombine(), PerformShiftCombine(), performShiftCombine(), performSHLCombine(), performSHLCombine(), performSHLCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), PerformSHLSimplify(), PerformShuffleVMOVNCombine(), performSignExtendCombine(), performSPLIT_PAIR_F64Combine(), PerformSplittingToNarrowingStores(), PerformSplittingToWideningLoad(), performSRACombine(), llvm::AMDGPUTargetLowering::performSraCombine(), performSRLCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), PerformSTORECombine(), PerformSUBCombine(), performSUBCombine(), performSubNegAndOneCombine(), performSubsToAndsCombine(), performSubWithBorrowCombine(), performSVEAndCombine(), performTBZCombine(), performTruncateCombine(), PerformTruncatingStoreCombine(), performUnpackCombine(), performVANDNCombine(), PerformVCMPCombine(), PerformVCVTCombine(), PerformVDUPCombine(), performVecReduceAddCombine(), performVECTOR_SHUFFLECombine(), performVectorDeinterleaveCombine(), PerformVMOVrhCombine(), PerformVMOVRRDCombine(), PerformVMulVCTPCombine(), performVP_STORECombine(), PerformVSELECTCombine(), PerformVSetCCToVCTPCombine(), PerformXORCombine(), performXORCombine(), performZExtDeinterleaveShuffleCombine(), performZExtUZPCombine(), prepareTS1AM(), promoteExtBeforeAdd(), reassociateCSELOperandsForCSE(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), reduceBuildVecToShuffleWithZero(), refineUniformBase(), ReplaceBITCAST(), replaceLoadVector(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), replaceVPICKVE2GRResults(), resolveSources(), reverseZExtICmpCombine(), SaturateWidenedDIVFIX(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), llvm::TargetLowering::ShrinkDemandedConstant(), simplifyAssumingCCVal(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::ARMTargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::LoongArchTargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::TargetLowering::SimplifyDemandedVectorElts(), simplifyDivRem(), llvm::TargetLowering::SimplifySetCC(), simplifySetCCIntoEq(), simplifySetCCWithCTPOP(), simplifyShift(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), llvm::AMDGPUTargetLowering::split64BitValue(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), splitStores(), splitStoreSplat(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), llvm::AMDGPUTargetLowering::splitVector(), llvm::AMDGPUTargetLowering::storeStackInputValue(), takeInexpensiveLog2(), llvm::RISCVTargetLowering::targetShrinkDemandedConstant(), llvm::X86TargetLowering::targetShrinkDemandedConstant(), transformAddShlImm(), TranslateM68kCC(), translateSetCCForBranch(), translateSetCCForBranch(), TranslateX86CC(), truncateVecElts(), truncateVecElts(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), tryAdvSIMDModImm321s(), tryAdvSIMDModImm64(), tryAdvSIMDModImm8(), tryAdvSIMDModImmFP(), TryCombineBaseUpdate(), tryCombineFADDReductionWithZero(), tryCombineShiftImm(), tryConvertSVEWideCompare(), tryDemorganOfBooleanCondition(), tryFoldMADwithSRL(), tryFoldSelectIntoOp(), tryFoldToZero(), tryLowerMultiVectorLoad(), tryLowerMultiVectorStore(), TryMULWIDECombine(), trySVESplat64(), tryToConvertShuffleOfTbl2ToTbl4(), tryToFoldExtendOfConstant(), UnpackFromArgumentSlot(), UnrollVectorOverflowOp(), unrollVectorShift(), valueToCarryFlag(), valueToCarryFlag(), llvm::X86TargetLowering::visitMaskedLoad(), widenBuildVec(), and widenVectorOpsToi8().

getConstantDbgValue()

SDDbgValue * SelectionDAG::getConstantDbgValue	(	DIVariable *	Var,
		DIExpression *	Expr,
		const Value *	C,
		const DebugLoc &	DL,
		unsigned	O )

Creates a constant SDDbgValue node.

Constant.

Definition at line 12849 of file SelectionDAG.cpp.

References assert(), C(), llvm::cast(), DL, and llvm::SDDbgOperand::fromConst().

getConstantFP() [1/3]

SDValue SelectionDAG::getConstantFP	(	const APFloat &	Val,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false )

Definition at line 1874 of file SelectionDAG.cpp.

References DL, getConstantFP(), and getContext().

getConstantFP() [2/3]

SDValue SelectionDAG::getConstantFP	(	const ConstantFP &	V,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false )

Definition at line 1879 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), llvm::ISD::ConstantFP, DL, getContext(), llvm::EVT::getScalarType(), getSplat(), llvm::Value::getType(), llvm::ConstantFP::getValue(), getVTList(), llvm::isa(), llvm::EVT::isFloatingPoint(), llvm::EVT::isVector(), N, NewSDValueDbgMsg(), Opc, SDValue(), and llvm::ISD::TargetConstantFP.

getConstantFP() [3/3]

SDValue SelectionDAG::getConstantFP	(	double	Val,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false )

Create a ConstantFPSDNode wrapping a constant value.

If VT is a vector type, the constant is splatted into a BUILD_VECTOR.

If only legal types can be produced, this does the necessary transformations (e.g., if the vector element type is illegal). The forms that take a double should only be used for simple constants that can be exactly represented in VT. No checks are made.

Definition at line 1918 of file SelectionDAG.cpp.

References llvm::APFloat::convert(), DL, getConstantFP(), llvm::EVT::getFltSemantics(), llvm::EVT::getScalarType(), llvm_unreachable, and llvm::APFloatBase::rmNearestTiesToEven.

Referenced by combineBitcast(), combineExtractWithShuffle(), combineFneg(), combineFP_ROUND(), combineVSelectWithAllOnesOrZeros(), EltsFromConsecutiveLoads(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), expandExp(), llvm::TargetLowering::expandFCANONICALIZE(), llvm::TargetLowering::expandFMINIMUM_FMAXIMUM(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_UINT(), expandFP_TO_UINT_SSE(), llvm::TargetLowering::expandIS_FPCLASS(), expandLog(), ExpandPowI(), llvm::TargetLowering::expandUINT_TO_FP(), FoldConstantArithmetic(), foldConstantFPMath(), foldFPToIntToFP(), getConstantFP(), getConstantFP(), getF32Constant(), getIdentityElement(), getInvertedVectorForFMA(), llvm::AMDGPUTargetLowering::getIsFinite(), llvm::AMDGPUTargetLowering::getIsLtSmallestNormal(), getMemsetValue(), llvm::TargetLowering::getNegatedExpression(), getNode(), getNode(), getRVVFPReductionOpAndOperands(), llvm::AMDGPUTargetLowering::getScaledLogInput(), getShuffleScalarElt(), llvm::TargetLowering::getSqrtInputTest(), llvm::TargetLowering::getSqrtResultForDenormInput(), getTargetConstantFP(), getTargetConstantFP(), getTargetConstantFP(), getZeroVector(), LowerFABSorFNEG(), llvm::AMDGPUTargetLowering::LowerFCEIL(), LowerFCOPYSIGN(), llvm::AMDGPUTargetLowering::lowerFEXP(), llvm::AMDGPUTargetLowering::lowerFEXP10Unsafe(), llvm::AMDGPUTargetLowering::lowerFEXP2(), llvm::AMDGPUTargetLowering::lowerFEXPF64(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafe(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafeImpl(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), llvm::AMDGPUTargetLowering::LowerFLOG2(), llvm::AMDGPUTargetLowering::LowerFLOGCommon(), llvm::AMDGPUTargetLowering::LowerFLOGUnsafe(), LowerFMINIMUM_FMAXIMUM(), LowerFP_TO_FP16(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT64(), lowerFREM(), llvm::AMDGPUTargetLowering::LowerFROUND(), LowerFROUND(), llvm::AMDGPUTargetLowering::LowerFROUNDEVEN(), lowerFTRUNC_FCEIL_FFLOOR_FROUND(), llvm::NVPTXTargetLowering::LowerOperation(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerUINT_TO_FP_i32(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(), lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), performInsertSubvectorCombine(), llvm::AMDGPUTargetLowering::performRcpCombine(), performVselectPowCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyFPBinop(), strictFPExtFromF16(), and tryCombineFADDReductionWithZero().

getConstantPool() [1/2]

SDValue SelectionDAG::getConstantPool	(	const Constant *	C,
		EVT	VT,
		MaybeAlign	Align = std::nullopt,
		int	Offs = 0,
		bool	isT = false,
		unsigned	TargetFlags = 0 )

Definition at line 2028 of file SelectionDAG.cpp.

References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), C(), llvm::ISD::ConstantPool, llvm::DataLayout::getABITypeAlign(), getDataLayout(), llvm::DataLayout::getPrefTypeAlign(), getVTList(), N, NewSDValueDbgMsg(), llvm::Offset, Opc, SDValue(), shouldOptForSize(), and llvm::ISD::TargetConstantPool.

Referenced by combineConcatVectorOps(), combineTargetShuffle(), llvm::TargetLowering::CTTZTableLookup(), getAddressForMemoryInput(), getTargetConstantPool(), getTargetConstantPool(), lowerBuildVectorAsBroadcast(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_vXi32(), and llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle().

getConstantPool() [2/2]

SDValue SelectionDAG::getConstantPool	(	MachineConstantPoolValue *	C,
		EVT	VT,
		MaybeAlign	Align = std::nullopt,
		int	Offs = 0,
		bool	isT = false,
		unsigned	TargetFlags = 0 )

Definition at line 2058 of file SelectionDAG.cpp.

References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), C(), llvm::ISD::ConstantPool, getDataLayout(), llvm::DataLayout::getPrefTypeAlign(), getVTList(), N, llvm::Offset, Opc, SDValue(), and llvm::ISD::TargetConstantPool.

getContext()

LLVMContext * llvm::SelectionDAG::getContext ( ) const

inline

Definition at line 503 of file SelectionDAG.h.

Referenced by addBitcastHints(), AddCombineVUZPToVPADDL(), llvm::RegsForValue::AddInlineAsmOperands(), addShuffleForVecExtend(), adjustLoadValueTypeImpl(), llvm::TargetLowering::annotateStackObjectPointer(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::buildSDIVPow2WithCMov(), llvm::TargetLowering::BuildUDIV(), BuildVectorFromScalar(), canCombineShuffleToExtendVectorInreg(), canFoldInAddressingMode(), checkIntrinsicImmArg(), coerceLoadedValue(), coerceStoredValue(), CollectOpsToWiden(), combineAdd(), combineAnd(), combineAndShuffleNot(), combineArithReduction(), combineAtomicLoad(), combineBasicSADPattern(), combineBinOpOfExtractToReduceTree(), combineBinOpOfZExt(), combineBitcastToBoolVector(), combineBitcastvxi1(), combineCMP(), combineCONCAT_VECTORS(), combineConcatVectorOfCasts(), combineConcatVectorOfScalars(), combineConcatVectorOfShuffles(), combineConcatVectorOps(), combineEXTEND_VECTOR_INREG(), combineExtractVectorElt(), combineExtractWithShuffle(), combineFMinNumFMaxNum(), combineFP_EXTEND(), combineFP_ROUND(), combineFP_TO_xINT_SAT(), combineGatherScatter(), combinei64TruncSrlConstant(), combineINSERT_SUBVECTOR(), combineIntDivRem(), combineLoad(), combineMinNumMaxNumImpl(), combineMulToPMADDWD(), combineOr(), combineOrOfSetCCToUSUBOCarry(), combinePMULH(), combineScalarAndWithMaskSetcc(), combineSelect(), combineShiftAnd1ToBitTest(), combineShiftToAVG(), combineShiftToMULH(), combineShuffleToZeroExtendVectorInReg(), combineSIntToFP(), combineSmallMaskReduction(), combineStore(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineToFPTruncExtElt(), combineTruncateWithSat(), combineUIntToFP(), combineVECREDUCE_LOGIC(), combineVECREDUCE_MUL(), combineVectorMulToSraBitcast(), combineVectorSizedSetCCEquality(), CombineVMOVDRRCandidateWithVecOp(), combineVPDPBUSDPattern(), combineVSelectWithAllOnesOrZeros(), combinevXi1ConstantToInteger(), combineWideMaskReduction(), concatSubVectors(), constructRetValue(), convertIntLogicToFPLogic(), createPSADBW(), CreateStackTemporary(), CreateStackTemporary(), llvm::TargetLowering::CTTZTableLookup(), detectPMADDUBSW(), diagnoseUnsupportedImage(), DoubleVectorWidth(), earlyExpandDIVFIX(), EltsFromConsecutiveLoads(), emitErrorAndReplaceIntrinsicResults(), emitFloatCompareMask(), emitIntrinsicErrorMessage(), emitIntrinsicWithChainErrorMessage(), emitNonHSAIntrinsicError(), emitRemovedIntrinsicError(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), emitVectorComparison(), errorUnsupported(), llvm::TargetLowering::expandABD(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandAVG(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTPOP(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandCttzElts(), expandDivFix(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFMINIMUM_FMAXIMUM(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_UINT(), llvm::TargetLowering::expandIntMINMAX(), llvm::TargetLowering::expandIS_FPCLASS(), llvm::TargetLowering::expandLoopDependenceMask(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandMULO(), llvm::TargetLowering::expandMultipleResultFPLibCall(), llvm::TargetLowering::expandPartialReduceMLA(), llvm::TargetLowering::expandRoundInexactToOdd(), llvm::TargetLowering::expandSADDSUBO(), llvm::TargetLowering::expandShiftParts(), llvm::TargetLowering::expandShlSat(), llvm::TargetLowering::expandUADDSUBO(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), llvm::TargetLowering::expandVecReduce(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVectorMatch(), llvm::TargetLowering::expandVectorSplice(), llvm::TargetLowering::expandVPCTTZElements(), extractSubVector(), extractSubVector(), fail(), findMemType(), findMoreOptimalIndexType(), FoldConstantArithmetic(), FoldConstantBuildVector(), foldExtendVectorInregToExtendOfSubvector(), foldFPToIntToFP(), foldShuffleOfConcatUndefs(), foldToMaskedStore(), foldXorTruncShiftIntoCmp(), llvm::TargetLowering::forceExpandWideMUL(), GenerateFixedLengthSVETBL(), getAtomicMemcpy(), getAtomicMemmove(), getAtomicMemset(), getBuildVectorizedValue(), getConstant(), getConstantFP(), getConstantFP(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), GetDependentSplitDestVTs(), getDWordFromOffset(), getEVTAlign(), llvm::AMDGPUTargetLowering::getIsFinite(), llvm::AMDGPUTargetLowering::getIsLtSmallestNormal(), getLargeExternalSymbol(), getLegalMaskAndStepVector(), getMaskFromElementCount(), getMemccpy(), getMemcmp(), getMemcpy(), getMemcpyLoadsAndStores(), getMemmove(), getMemmoveLoadsAndStores(), getMemset(), getMemsetStores(), getMemsetStringVal(), getMemsetValue(), getPredicateForScalableVector(), getPrefTypeAlign(), getPrefTypeAlign(), getPTest(), getReducedAlign(), getRegistersForValue(), llvm::AMDGPUTargetLowering::getScaledLogInput(), getSplatValue(), GetSplitDestVTs(), llvm::AMDGPUTargetLowering::getSplitDestVTs(), llvm::TargetLowering::getSqrtInputTest(), getStrcmp(), getStrcpy(), getStrlen(), getStrstr(), GetTLSADDR(), getUniformBase(), getVectorBitwiseReduce(), llvm::TargetLowering::getVectorElementPointer(), llvm::TargetLowering::IncrementMemoryAddress(), llvm::SITargetLowering::isEligibleForTailCallOptimization(), llvm::AMDGPUTargetLowering::isLoadBitCastBeneficial(), llvm::TargetLoweringBase::isLoadBitCastBeneficial(), isSaturatingMinMax(), isSpecificZeroAfterMaybeRounding(), isUpperSubvectorUndef(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), legalizeIntrinsicImmArg(), legalizeScatterGatherIndexType(), LowerADDSAT_SUBSAT(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), lowerBitreverseShuffle(), llvm::SparcTargetLowering::LowerBSWAP(), lowerBuildVectorAsBroadcast(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::SITargetLowering::LowerCallResult(), llvm::AMDGPUTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS_i1(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), llvm::AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), llvm::AMDGPUTargetLowering::LowerFCEIL(), lowerFCMPIntrinsic(), llvm::AMDGPUTargetLowering::lowerFEXP(), llvm::AMDGPUTargetLowering::lowerFEXP10Unsafe(), llvm::AMDGPUTargetLowering::lowerFEXP2(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafe(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), LowerFLDEXP(), LowerFMINIMUM_FMAXIMUM(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerFROUND(), llvm::AMDGPUTargetLowering::LowerFROUNDEVEN(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), lowerICMPIntrinsic(), lowerLaneOp(), LowerMSCATTER(), LowerMULO(), LowerNTStore(), llvm::AArch64TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), LowerPredicateLoad(), LowerPredicateStore(), llvm::HexagonTargetLowering::LowerReturn(), llvm::LoongArchTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::RISCVTargetLowering::LowerReturn(), llvm::SITargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::VETargetLowering::LowerReturn(), llvm::XtensaTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::NVPTXTargetLowering::LowerSTACKRESTORE(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), lowerStAsyncRelease(), lowerStAsyncWithMbarrier(), LowerStore(), lowerSTOREVector(), LowerSVEIntrinsicEXT(), llvm::TargetLowering::LowerToTLSEmulatedModel(), LowerToTLSExecModel(), llvm::VETargetLowering::lowerToVVP(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_vXi32(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), llvm::AMDGPUTargetLowering::lowerUnhandledCall(), LowerVECTOR_SHUFFLE(), LowerVectorAllEqual(), lowerVectorBitClearImm(), lowerVectorBitRevImm(), lowerVectorBitSetImm(), LowerVectorExtend(), lowerVectorPickVE2GR(), lowerVectorSplatImm(), LowerVSETCC(), llvm::VETargetLowering::lowerVVP_LOAD_STORE(), llvm::SystemZTargetLowering::makeExternalCall(), llvm::TargetLowering::makeLibCall(), makeStateFunctionCall(), matchBinOpReduction(), matchPMADDWD(), matchPMADDWD_2(), narrowExtractedVectorBinOp(), narrowIndex(), performActiveLaneMaskCombine(), PerformARMBUILD_VECTORCombine(), performBITCASTCombine(), performBitcastCombine(), PerformBUILD_VECTORCombine(), performBuildShuffleExtendCombine(), performBuildVectorCombine(), performConcatVectorsCombine(), performConvertFPCombine(), performCTPOPCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performDUPCombine(), performExtBinopLoadFold(), performExtendToBoolVectorLoadCombine(), PerformExtractFpToIntStores(), PerformInsertEltCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PerformMinMaxFpToSatCombine(), performMulVectorCmpZeroCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performSelectCombine(), performSETCC_BITCASTCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), performSignExtendInRegCombine(), PerformSplittingMVEEXTToWideningLoad(), PerformSplittingMVETruncToNarrowingStores(), PerformSplittingToNarrowingStores(), PerformSplittingToWideningLoad(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), PerformSTORECombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), performSunpkloCombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), PerformTruncatingStoreCombine(), performUADDVZextCombine(), PerformUMinFpToSatCombine(), performUnpackCombine(), performUzpCombine(), PerformVECREDUCE_ADDCombine(), performVecReduceAddCombine(), performVECTOR_SHUFFLECombine(), performVectorDeinterleaveCombine(), performVectorExtCombine(), PromoteBinOpToF32(), llvm::TargetLoweringBase::promoteTargetBoolean(), promoteToConstantPool(), llvm::AArch64TargetLowering::ReconstructShuffle(), reduceMaskedLoadToScalarLoad(), reduceMaskedStoreToScalarStore(), reduceVMULWidth(), replaceAtomicSwap128(), replaceLoadVector(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), replaceProxyReg(), reportInvalidTensormapReplaceUsage(), reverseZExtICmpCombine(), scalarizeBinOpOfSplats(), llvm::TargetLowering::scalarizeExtractedVectorLoad(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), shouldTransformMulToShiftsAddsSubs(), llvm::TargetLowering::ShrinkDemandedOp(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), llvm::TargetLowering::SimplifySetCC(), skipExtensionForVectorMULL(), llvm::TargetLowering::softenSetCCOperands(), splitStores(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), splitVector(), llvm::X86TargetLowering::targetShrinkDemandedConstant(), truncateVectorWithNARROW(), truncateVectorWithPACK(), tryCombineMULLWithUZP1(), tryFormConcatFromShuffle(), tryToReplaceScalarFPConversionWithSVE(), tryToWidenSetCCOperands(), UnrollVectorOp(), UnrollVectorOverflowOp(), widenAbs(), widenBuildVec(), llvm::AMDGPUTargetLowering::WidenOrSplitVectorLoad(), widenVec(), WidenVector(), widenVectorOpsToi8(), and widenVectorToPartType().

getCopyFromReg() [1/2]

SDValue llvm::SelectionDAG::getCopyFromReg ( SDValue Chain, const SDLoc & dl, Register Reg, EVT VT )

inline

Definition at line 836 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::CopyFromReg, getNode(), getRegister(), getVTList(), and Reg.

Referenced by llvm::AArch64TargetLowering::changeStreamingMode(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::AArch64TargetLowering::emitStackGuardMixFP(), expandIntrinsicWChainHelper(), llvm::RegsForValue::getCopyFromRegs(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getFRAMEADDR(), getReadTimeStampCounter(), GetTLSADDR(), getv64i1Argument(), getZeroRegister(), getzOSCalleeAndADA(), llvm::SystemZTargetLowering::LowerAsmOutputForConstraint(), llvm::X86TargetLowering::LowerAsmOutputForConstraint(), lowerBALLOTIntrinsic(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::SITargetLowering::LowerCallResult(), LowerCallResult(), lowerCallResult(), LowerCMP_SWAP(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), lowerFRAMEADDR(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::LanaiTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerSETCC(), LowerSTACKADDRESS(), llvm::SITargetLowering::LowerSTACKSAVE(), llvm::VETargetLowering::lowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), performDivRemCombine(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), replaceZeroVectorStore(), llvm::AMDGPUTargetLowering::storeStackInputValue(), unpack64(), unpackF64OnLA32DSoftABI(), unpackF64OnRV32DSoftABI(), unpackFromRegLoc(), unpackFromRegLoc(), unpackFromRegLoc(), and unpackGPRVecOnRV32().

getCopyFromReg() [2/2]

SDValue llvm::SelectionDAG::getCopyFromReg ( SDValue Chain, const SDLoc & dl, Register Reg, EVT VT, SDValue Glue )

inline

Definition at line 845 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ArrayRef(), llvm::ISD::CopyFromReg, llvm::SDValue::getNode(), getNode(), getRegister(), getVTList(), and Reg.

getCopyToReg() [1/3]

SDValue llvm::SelectionDAG::getCopyToReg ( SDValue Chain, const SDLoc & dl, Register Reg, SDValue N )

inline

Definition at line 810 of file SelectionDAG.h.

References llvm::ISD::CopyToReg, getNode(), getRegister(), N, and Reg.

Referenced by emitRepmovs(), emitRepstos(), expandIntrinsicWChainHelper(), llvm::RegsForValue::getCopyToRegs(), llvm::MipsTargetLowering::getOpndList(), GetTLSADDR(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::SelectionDAGBuilder::LowerCallTo(), LowerCMP_SWAP(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::HexagonTargetLowering::LowerReturn(), llvm::LoongArchTargetLowering::LowerReturn(), llvm::RISCVTargetLowering::LowerReturn(), llvm::SITargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::VETargetLowering::LowerReturn(), llvm::XtensaTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::SITargetLowering::PostISelFolding(), prepareDescriptorIndirectCall(), prepareOutOfLineGlueCall(), and llvm::X86TargetLowering::ReplaceNodeResults().

getCopyToReg() [2/3]

SDValue llvm::SelectionDAG::getCopyToReg ( SDValue Chain, const SDLoc & dl, Register Reg, SDValue N, SDValue Glue )

inline

Definition at line 819 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ArrayRef(), llvm::ISD::CopyToReg, llvm::SDValue::getNode(), getNode(), getRegister(), getVTList(), N, and Reg.

getCopyToReg() [3/3]

SDValue llvm::SelectionDAG::getCopyToReg ( SDValue Chain, const SDLoc & dl, SDValue Reg, SDValue N, SDValue Glue )

inline

Definition at line 828 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ArrayRef(), llvm::ISD::CopyToReg, llvm::SDValue::getNode(), getNode(), getVTList(), N, and Reg.

getDataLayout()

const DataLayout & llvm::SelectionDAG::getDataLayout ( ) const

inline

Definition at line 483 of file SelectionDAG.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), addShuffleForVecExtend(), analyzeCallOperands(), llvm::SparcTargetLowering::bitcastConstantFPToInt(), BuildExactSDIV(), BuildExactUDIV(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::buildSDIVPow2WithCMov(), llvm::TargetLowering::BuildUDIV(), canCombineShuffleToExtendVectorInreg(), canFoldInAddressingMode(), combineBVOfVecSExt(), combineConcatVectorOfShuffles(), combineConcatVectorOps(), combineFMinNumFMaxNum(), combineGatherScatter(), combineLoad(), combineShiftAnd1ToBitTest(), combineShuffleToAnyExtendVectorInreg(), combineShuffleToZeroExtendVectorInReg(), combineStore(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineTruncationShuffle(), combineVECREDUCE_LOGIC(), combineVSelectWithAllOnesOrZeros(), computeKnownBits(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), ComputeNumSignBits(), createGPRPairNode(), createGPRPairNodei64(), createMMXBuildVector(), createSetFPEnvNodes(), CreateStackTemporary(), CreateStackTemporary(), CreateStackTemporary(), llvm::TargetLowering::CTTZTableLookup(), determineConstraints(), EltsFromConsecutiveLoads(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::X86TargetLowering::emitStackGuardMixFP(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::TargetLowering::expandABD(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandBITREVERSE(), llvm::TargetLowering::expandBSWAP(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTPOP(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandCttzElts(), expandDivFix(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFMINIMUM_FMAXIMUM(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandFP_TO_UINT(), llvm::TargetLowering::expandIntMINMAX(), llvm::TargetLowering::expandLoopDependenceMask(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandMULO(), llvm::TargetLowering::expandMultipleResultFPLibCall(), llvm::TargetLowering::expandRoundInexactToOdd(), llvm::TargetLowering::expandSADDSUBO(), llvm::TargetLowering::expandShiftParts(), llvm::TargetLowering::expandShlSat(), llvm::TargetLowering::expandUADDSUBO(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), expandVACopy(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVectorMatch(), FoldConstantArithmetic(), FoldConstantBuildVector(), foldXorTruncShiftIntoCmp(), llvm::TargetLowering::forceExpandWideMUL(), getADAEntry(), getAddressForMemoryInput(), getAtomicMemcpy(), getAtomicMemmove(), getAtomicMemset(), getAVX2GatherNode(), getConstant(), getConstantPool(), getConstantPool(), getCopyFromParts(), getCopyToParts(), getEVTAlign(), getGatherNode(), getGlobalAddress(), getIntPtrConstant(), llvm::AMDGPUTargetLowering::getIsFinite(), llvm::AMDGPUTargetLowering::getIsLtSmallestNormal(), getJumpTableDebugInfo(), getLegalMaskAndStepVector(), getLifetimeNode(), getLoadStackGuard(), getMaskFromElementCount(), getMemccpy(), getMemcmp(), getMemcpy(), getMemcpyLoadsAndStores(), getMemmove(), getMemmoveLoadsAndStores(), getMemset(), getMemsetStores(), getMemsetStringVal(), getNode(), getNode(), llvm::M68kTargetLowering::getPICJumpTableRelocBase(), llvm::PPCTargetLowering::getPICJumpTableRelocBase(), llvm::VETargetLowering::getPICJumpTableRelocBase(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), getPPCf128HiElementSelector(), getPrefetchNode(), getPrefTypeAlign(), getPrefTypeAlign(), getReducedAlign(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getRuntimeCallSDValueHelper(), llvm::AMDGPUTargetLowering::getScaledLogInput(), getScatterNode(), getShiftAmountConstant(), getShiftAmountOperand(), llvm::PPC::getSplatIdxForPPCMnemonics(), llvm::TargetLowering::getSqrtInputTest(), getSymbolFunctionGlobalAddress(), getTagSymNode(), getUniformBase(), getVectorIdxConstant(), getzOSCalleeAndADA(), InferPtrAlign(), isBLACompatibleAddress(), isExtendedBUILD_VECTOR(), llvm::AMDGPUTargetLowering::isLoadBitCastBeneficial(), llvm::TargetLoweringBase::isLoadBitCastBeneficial(), IsPredicateKnownToFail(), isSpecificZeroAfterMaybeRounding(), llvm::PPC::isVMRGEOShuffleMask(), llvm::PPC::isVMRGHShuffleMask(), llvm::PPC::isVMRGLShuffleMask(), llvm::PPC::isVPKUDUMShuffleMask(), llvm::PPC::isVPKUHUMShuffleMask(), llvm::PPC::isVPKUWUMShuffleMask(), llvm::PPC::isVSLDOIShuffleMask(), LowerADDSAT_SUBSAT(), llvm::HexagonTargetLowering::LowerBlockAddress(), llvm::SparcTargetLowering::LowerBSWAP(), lowerBuildVectorAsBroadcast(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::TargetLowering::LowerCallTo(), llvm::LanaiTargetLowering::LowerConstantPool(), LowerCTPOP(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerF64Op(), llvm::AMDGPUTargetLowering::LowerFCEIL(), llvm::AMDGPUTargetLowering::lowerFEXP(), llvm::AMDGPUTargetLowering::lowerFEXP10Unsafe(), llvm::AMDGPUTargetLowering::lowerFEXP2(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafe(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), LowerFMINIMUM_FMAXIMUM(), LowerFNEGorFABS(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::AMDGPUTargetLowering::LowerFROUND(), llvm::AMDGPUTargetLowering::LowerFROUNDEVEN(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::HexagonTargetLowering::LowerINTRINSIC_WO_CHAIN(), llvm::SparcTargetLowering::LowerINTRINSIC_WO_CHAIN(), llvm::LanaiTargetLowering::LowerJumpTable(), LowerMemOpCallTo(), LowerMULO(), LowerNTStore(), llvm::R600TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), LowerPredicateLoad(), LowerPredicateStore(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), LowerRETURNADDR(), llvm::NVPTXTargetLowering::LowerSTACKRESTORE(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), lowerSTOREVector(), llvm::TargetLowering::LowerToTLSEmulatedModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_vXi32(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), llvm::HexagonTargetLowering::LowerVASTART(), llvm::LanaiTargetLowering::LowerVASTART(), LowerVASTART(), LowerVASTART(), LowerVASTART(), llvm::VETargetLowering::lowerVASTART(), llvm::SparcTargetLowering::makeAddress(), llvm::SystemZTargetLowering::makeExternalCall(), llvm::TargetLowering::makeLibCall(), makeStateFunctionCall(), matchPERM(), narrowExtractedVectorLoad(), PerformBITCASTCombine(), llvm::SparcTargetLowering::PerformBSWAPCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performMULCombine(), llvm::SparcTargetLowering::PerformSTORECombine(), PerformSTORECombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), PerformTruncatingStoreCombine(), performUzpCombine(), PerformVMOVRRDCombine(), prepareDAGLevelOperands(), llvm::TargetLoweringBase::promoteTargetBoolean(), promoteToConstantPool(), llvm::AArch64TargetLowering::ReconstructShuffle(), reduceBuildVecToShuffleWithZero(), ReplaceATOMIC_LOAD_128Results(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), replaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeExtractedVectorLoad(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::TargetLowering::SimplifyMultipleUseDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), transformCallee(), unpackFromMemLoc(), unpackFromMemLoc(), unpackFromMemLoc(), UnrollVectorOverflowOp(), llvm::SDNodeInfo::verifyNode(), and llvm::AMDGPUTargetLowering::WidenOrSplitVectorLoad().

getDbgLabel()

SDDbgLabel * SelectionDAG::getDbgLabel	(	DILabel *	Label,
		const DebugLoc &	DL,
		unsigned	O )

Creates a SDDbgLabel node.

Definition at line 13127 of file SelectionDAG.cpp.

References assert(), llvm::cast(), and DL.

getDbgValue()

SDDbgValue * SelectionDAG::getDbgValue	(	DIVariable *	Var,
		DIExpression *	Expr,
		SDNode *	N,
		unsigned	R,
		bool	IsIndirect,
		const DebugLoc &	DL,
		unsigned	O )

Creates a SDDbgValue node.

getDbgValue - Creates a SDDbgValue node.

SDNode

Definition at line 12837 of file SelectionDAG.cpp.

References assert(), llvm::cast(), DL, llvm::SDDbgOperand::fromNode(), and N.

getDbgValueList()

SDDbgValue * SelectionDAG::getDbgValueList	(	DIVariable *	Var,
		DIExpression *	Expr,
		ArrayRef< SDDbgOperand >	Locs,
		ArrayRef< SDNode * >	Dependencies,
		bool	IsIndirect,
		const DebugLoc &	DL,
		unsigned	O,
		bool	IsVariadic )

Creates a SDDbgValue node from a list of locations.

Definition at line 12899 of file SelectionDAG.cpp.

References assert(), llvm::cast(), and DL.

Referenced by handleDanglingVariadicDebugInfo(), salvageDebugInfo(), transferDbgValues(), and tryToFoldExtOfLoad().

GetDbgValues()

ArrayRef< SDDbgValue * > llvm::SelectionDAG::GetDbgValues ( const SDNode * SD ) const

inline

Get the debug values which reference the given SDNode.

Definition at line 2008 of file SelectionDAG.h.

Referenced by ProcessSDDbgValues(), salvageDebugInfo(), transferDbgValues(), and tryToFoldExtOfLoad().

getDeactivationSymbol()

SDValue SelectionDAG::getDeactivationSymbol

(

const GlobalValue *

GV

)

Definition at line 1970 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::DEACTIVATION_SYMBOL, getVTList(), N, and SDValue().

getDenormalMode()

DenormalMode llvm::SelectionDAG::getDenormalMode ( EVT VT ) const

inline

Return the current function's default denormal handling kind for the given floating point type.

Definition at line 2689 of file SelectionDAG.h.

References llvm::EVT::getFltSemantics().

Referenced by isKnownNeverLogicalZero().

GetDependentSplitDestVTs()

std::pair< EVT, EVT > SelectionDAG::GetDependentSplitDestVTs	(	const EVT &	VT,
		const EVT &	EnvVT,
		bool *	HiIsEmpty ) const

Compute the VTs needed for the low/hi parts of a type, dependent on an enveloping VT that has been split into two identical pieces.

GetDependentSplitDestVTs - Compute the VTs needed for the low/hi parts of a type, dependent on an enveloping VT that has been split into two identical pieces.

Sets the HisIsEmpty flag when hi type has zero storage size.

Sets the HiIsEmpty flag when hi type has zero storage size.

Definition at line 14575 of file SelectionDAG.cpp.

References assert(), getContext(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::getKnownMinValue(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorVT(), and llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isScalable().

getEHLabel()

SDValue SelectionDAG::getEHLabel	(	const SDLoc &	dl,
		SDValue	Root,
		MCSymbol *	Label )

Definition at line 2454 of file SelectionDAG.cpp.

References llvm::ISD::EH_LABEL, and getLabelNode().

getElementCount()

SDValue SelectionDAG::getElementCount	(	const SDLoc &	DL,
		EVT	VT,
		ElementCount	EC )

Definition at line 2193 of file SelectionDAG.cpp.

References DL, and getFixedOrScalableQuantity().

Referenced by llvm::RISCVTargetLowering::computeVLMax(), llvm::TargetLowering::expandCttzElts(), llvm::TargetLowering::expandLoopDependenceMask(), llvm::TargetLowering::expandVectorFindLastActive(), getMaskFromElementCount(), lowerCttzElts(), performActiveLaneMaskCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), and SplitEVL().

getEntryNode()

SDValue llvm::SelectionDAG::getEntryNode ( ) const

inline

Return the token chain corresponding to the entry of the function.

Definition at line 573 of file SelectionDAG.h.

References SDValue().

Referenced by llvm::AMDGPUTargetLowering::addTokenForArgument(), clear(), combineConcatVectorOps(), combineTargetShuffle(), copyExtraInfo(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::AMDGPUTargetLowering::CreateLiveInRegisterRaw(), llvm::TargetLowering::CTTZTableLookup(), llvm::AArch64TargetLowering::emitStackGuardMixFP(), llvm::TargetLowering::expandFCANONICALIZE(), llvm::TargetLowering::expandMultipleResultFPLibCall(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorSplice(), getADAEntry(), llvm::MipsTargetLowering::getAddrLocal(), getFLUSHW(), getFRAMEADDR(), getLargeExternalSymbol(), getLargeGlobalAddress(), getStackArgumentTokenFactor(), GetTLSADDR(), getZeroRegister(), getzOSCalleeAndADA(), HandleMergeInputChains(), llvm::AMDGPUTargetLowering::loadStackInputValue(), lowerBALLOTIntrinsic(), llvm::SparcTargetLowering::LowerBSWAP(), lowerBuildVectorAsBroadcast(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), lowerFRAMEADDR(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::SystemZTargetLowering::LowerOperationWrapper(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), lowerRETURNADDR(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::TargetLowering::LowerToTLSEmulatedModel(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::VETargetLowering::lowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_vXi32(), llvm::SparcTargetLowering::makeAddress(), llvm::VETargetLowering::makeAddress(), llvm::TargetLowering::makeLibCall(), performDivRemCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), llvm::SITargetLowering::PostISelFolding(), promoteXINT_TO_FP(), llvm::SITargetLowering::ReplaceNodeResults(), replaceZeroVectorStore(), SelectionDAG(), and llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle().

getErrorMergeValues()

SDValue SelectionDAG::getErrorMergeValues	(	ArrayRef< EVT >	ResultTypes,
		SDValue	Chain,
		const SDLoc &	dl )

Return poison values for each of ResultTypes, substituting Chain for any result of type MVT::Other, merged into a single MERGE_VALUES node.

Used to salvage a chain when an operation cannot be lowered due to an error, and the program will be discarded.

Definition at line 10550 of file SelectionDAG.cpp.

References getMergeValues(), getPOISON(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorImpl< T >::reserve(), and llvm::ArrayRef< T >::size().

Referenced by diagnoseUnsupportedImage().

getEVTAlign()

Align SelectionDAG::getEVTAlign

(

EVT

MemoryVT

)

const

Compute the default alignment value for the given type.

Definition at line 1432 of file SelectionDAG.cpp.

References llvm::PointerType::get(), llvm::DataLayout::getABITypeAlign(), getContext(), getDataLayout(), and llvm::EVT::getTypeForEVT().

Referenced by llvm::X86TargetLowering::BuildFILD(), getLoad(), getLoadStackGuard(), getLoadVP(), getMemIntrinsicNode(), getStore(), getTruncStore(), llvm::NVPTXTargetLowering::LowerCall(), and lowerMSTORE().

getExternalSymbol() [1/2]

SDValue SelectionDAG::getExternalSymbol	(	const char *	Sym,
		EVT	VT )

Definition at line 2112 of file SelectionDAG.cpp.

References getVTList(), N, and SDValue().

Referenced by llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::TargetLowering::expandMultipleResultFPLibCall(), getAtomicMemcpy(), getAtomicMemmove(), getAtomicMemset(), getExternalSymbol(), getMemcpy(), getMemmove(), getMemset(), getRuntimeCallSDValueHelper(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::TargetLowering::LowerToTLSEmulatedModel(), llvm::SystemZTargetLowering::makeExternalCall(), llvm::TargetLowering::makeLibCall(), and makeStateFunctionCall().

getExternalSymbol() [2/2]

SDValue SelectionDAG::getExternalSymbol	(	RTLIB::LibcallImpl	LCImpl,
		EVT	VT )

Definition at line 2120 of file SelectionDAG.cpp.

References llvm::StringRef::data(), getExternalSymbol(), and llvm::RTLIB::RuntimeLibcallsInfo::getLibcallImplName().

getExtLoad() [1/2]

SDValue SelectionDAG::getExtLoad	(	ISD::LoadExtType	ExtType,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Chain,
		SDValue	Ptr,
		EVT	MemVT,
		MachineMemOperand *	MMO )

Definition at line 10842 of file SelectionDAG.cpp.

References getLoad(), getPOISON(), llvm::SDValue::getValueType(), llvm::Undef, and llvm::ISD::UNINDEXED.

getExtLoad() [2/2]

SDValue SelectionDAG::getExtLoad	(	ISD::LoadExtType	ExtType,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Chain,
		SDValue	Ptr,
		MachinePointerInfo	PtrInfo,
		EVT	MemVT,
		MaybeAlign	Alignment = MaybeAlign(),
		MachineMemOperand::Flags	MMOFlags = MachineMemOperand::MONone,
		const MMOMetadata &	Metadata = MMOMetadata() )

Definition at line 10831 of file SelectionDAG.cpp.

References getLoad(), getPOISON(), llvm::SDValue::getValueType(), llvm::Undef, and llvm::ISD::UNINDEXED.

Referenced by adjustSubwordCmp(), combineEXTEND_VECTOR_INREG(), combineLoad(), llvm::TargetLowering::CTTZTableLookup(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), getMemcpyLoadsAndStores(), lowerLOADi1(), LowerPredicateLoad(), llvm::RISCVTargetLowering::PerformDAGCombine(), performExtractVectorEltCombine(), performFPExtendCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), PerformVMOVrhCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeExtractedVectorLoad(), llvm::TargetLowering::scalarizeVectorLoad(), SkipLoadExtensionForVMULL(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), tryToFoldExtOfExtload(), tryToFoldExtOfLoad(), unpackFromMemLoc(), unpackFromMemLoc(), and llvm::AMDGPUTargetLowering::WidenOrSplitVectorLoad().

getExtLoadVP() [1/2]

SDValue SelectionDAG::getExtLoadVP	(	ISD::LoadExtType	ExtType,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Mask,
		SDValue	EVL,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		bool	IsExpanding = false )

Definition at line 11098 of file SelectionDAG.cpp.

References getLoadVP(), getPOISON(), llvm::SDValue::getValueType(), llvm::Undef, and llvm::ISD::UNINDEXED.

getExtLoadVP() [2/2]

SDValue SelectionDAG::getExtLoadVP	(	ISD::LoadExtType	ExtType,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Mask,
		SDValue	EVL,
		MachinePointerInfo	PtrInfo,
		EVT	MemVT,
		MaybeAlign	Alignment,
		MachineMemOperand::Flags	MMOFlags,
		const AAMDNodes &	AAInfo,
		bool	IsExpanding = false )

Definition at line 11085 of file SelectionDAG.cpp.

References getLoadVP(), getPOISON(), llvm::SDValue::getValueType(), llvm::Undef, and llvm::ISD::UNINDEXED.

getExtOrTrunc() [1/2]

SDValue llvm::SelectionDAG::getExtOrTrunc ( bool IsSigned, SDValue Op, const SDLoc & DL, EVT VT )

inline

Convert Op, which must be of integer type, to the integer type VT, by either sign/zero-extending (depending on IsSigned) or truncating it.

Definition at line 1038 of file SelectionDAG.h.

References DL, getSExtOrTrunc(), and getZExtOrTrunc().

getExtOrTrunc() [2/2]

SDValue llvm::SelectionDAG::getExtOrTrunc ( SDValue Op, const SDLoc & DL, EVT VT, unsigned Opcode )

inline

Convert Op, which must be of integer type, to the integer type VT, by either any/sign/zero-extending (depending on IsAny / IsSigned) or truncating it.

Definition at line 1022 of file SelectionDAG.h.

References llvm::ISD::ANY_EXTEND, DL, getAnyExtOrTrunc(), getSExtOrTrunc(), getZExtOrTrunc(), llvm_unreachable, llvm::ISD::SIGN_EXTEND, and llvm::ISD::ZERO_EXTEND.

Referenced by canonicalizeMaskForVLPredicate(), combineShiftToAVG(), combineShiftToMULH(), earlyExpandDIVFIX(), expandDivFix(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT_SAT(), LowerShift(), and PerformMinMaxFpToSatCombine().

getExtractSubvector()

SDValue llvm::SelectionDAG::getExtractSubvector ( const SDLoc & DL, EVT VT, SDValue Vec, unsigned Idx )

inline

Return the VT typed sub-vector of Vec at Idx.

Definition at line 960 of file SelectionDAG.h.

References DL, llvm::ISD::EXTRACT_SUBVECTOR, getNode(), and getVectorIdxConstant().

Referenced by combineBinOpOfExtractToReduceTree(), combineIntDivRem(), convertFromScalableVector(), convertFromScalableVector(), CustomNonLegalBITCASTResults(), llvm::TargetLowering::expandPartialReduceMLA(), llvm::TargetLowering::expandVecReduce(), extractSubVector(), getZeroPaddedAdd(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), lower1BitShuffle(), lowerBitreverseShuffle(), lowerBUILD_VECTOR(), lowerBuildVectorOfConstants(), LowerFLDEXP(), LowerNTStore(), lowerScalarInsert(), lowerVECTOR_SHUFFLEAsPZip(), lowerVECTOR_SHUFFLEAsVSlidedown(), matchBinOpReduction(), matchPMADDWD(), matchSplatAsGather(), performBuildVectorCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performDUPCombine(), performExtBinopLoadFold(), performInsertSubvectorCombine(), performScalarToVectorCombine(), performSunpkloCombine(), performUzpCombine(), performVecReduceAddCombine(), performVecReduceAddCombineWithUADDLP(), llvm::AArch64TargetLowering::ReconstructShuffle(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifyDemandedVectorElts(), splitStores(), SplitVector(), tryCombineMULLWithUZP1(), tryExtendDUPToExtractHigh(), tryFormConcatFromShuffle(), tryLowerMultiVectorStore(), and tryLowerSmallVectorExtLoad().

getExtractVectorElt()

SDValue llvm::SelectionDAG::getExtractVectorElt ( const SDLoc & DL, EVT VT, SDValue Vec, unsigned Idx )

inline

Extract element at Idx from Vec.

See EXTRACT_VECTOR_ELT description for result type handling.

Definition at line 938 of file SelectionDAG.h.

References DL, llvm::ISD::EXTRACT_VECTOR_ELT, getNode(), and getVectorIdxConstant().

Referenced by coerceStoredValue(), combineExtractVectorElt(), combinePExtTruncate(), combineScalarMinMaxAbsStore(), combineVECREDUCE_MUL(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorMatch(), ExtractVectorElements(), getMemsetStores(), getNode(), getOrderedReduction(), getRVVFPReductionOpAndOperands(), getShuffleReduction(), getSplatValue(), LowerFLDEXP(), llvm::AArch64TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), lowerReductionSeq(), LowerVECREDUCE(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeVectorStore(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), and UnrollVectorOp().

getExtStridedLoadVP()

SDValue SelectionDAG::getExtStridedLoadVP	(	ISD::LoadExtType	ExtType,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Stride,
		SDValue	Mask,
		SDValue	EVL,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		bool	IsExpanding = false )

Definition at line 11310 of file SelectionDAG.cpp.

References DL, getPOISON(), getStridedLoadVP(), llvm::SDValue::getValueType(), llvm::Undef, and llvm::ISD::UNINDEXED.

getFlagInserter()

FlagInserter * llvm::SelectionDAG::getFlagInserter ( )

inline

Definition at line 509 of file SelectionDAG.h.

Referenced by llvm::SelectionDAG::FlagInserter::FlagInserter().

getFPExtendOrRound()

SDValue SelectionDAG::getFPExtendOrRound	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of float type, to the float type VT, by either extending or rounding (by truncation).

Definition at line 1551 of file SelectionDAG.cpp.

References llvm::EVT::bitsGT(), DL, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, getIntPtrConstant(), and getNode().

Referenced by emitIntrinsicWithCC(), llvm::TargetLowering::expandRoundInexactToOdd(), getCopyFromPartsVector(), getNode(), LowerFLDEXP(), llvm::RISCVTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperationWrapper(), LowerUINT_TO_FP_i32(), llvm::RISCVTargetLowering::PerformDAGCombine(), and PromoteBinOpToF32().

getFrameIndex()

SDValue SelectionDAG::getFrameIndex	(	int	FI,
		EVT	VT,
		bool	isTarget = false )

Definition at line 1985 of file SelectionDAG.cpp.

References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::ISD::FrameIndex, getVTList(), N, Opc, SDValue(), and llvm::ISD::TargetFrameIndex.

Referenced by llvm::X86TargetLowering::BuildFILD(), CalculateTailCallArgDest(), CreateStackTemporary(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), getAddressForMemoryInput(), getLifetimeNode(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getTargetFrameIndex(), llvm::AMDGPUTargetLowering::loadStackInputValue(), llvm::SparcTargetLowering::LowerBSWAP(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::TargetLowering::LowerCallTo(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Op(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerINTRINSIC_W_CHAIN(), llvm::HexagonTargetLowering::LowerVASTART(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), LowerVASTART(), LowerVASTART(), unpack64(), unpackF64OnLA32DSoftABI(), unpackF64OnRV32DSoftABI(), unpackFromMemLoc(), unpackFromMemLoc(), unpackFromMemLoc(), and unpackGPRVecOnRV32().

getFrameIndexDbgValue() [1/2]

SDDbgValue * SelectionDAG::getFrameIndexDbgValue	(	DIVariable *	Var,
		DIExpression *	Expr,
		unsigned	FI,
		ArrayRef< SDNode * >	Dependencies,
		bool	IsIndirect,
		const DebugLoc &	DL,
		unsigned	O )

Creates a FrameIndex SDDbgValue node.

FrameIndex with dependencies.

Definition at line 12873 of file SelectionDAG.cpp.

References assert(), llvm::cast(), DL, and llvm::SDDbgOperand::fromFrameIdx().

getFrameIndexDbgValue() [2/2]

SDDbgValue * SelectionDAG::getFrameIndexDbgValue	(	DIVariable *	Var,
		DIExpression *	Expr,
		unsigned	FI,
		bool	IsIndirect,
		const DebugLoc &	DL,
		unsigned	O )

Creates a FrameIndex SDDbgValue node.

FrameIndex.

Definition at line 12862 of file SelectionDAG.cpp.

References assert(), llvm::cast(), DL, and getFrameIndexDbgValue().

Referenced by getFrameIndexDbgValue().

getFreeze() [1/2]

SDValue SelectionDAG::getFreeze

(

SDValue

V

)

Return a freeze using the SDLoc of the value operand.

Definition at line 2558 of file SelectionDAG.cpp.

References llvm::ISD::FREEZE, and getNode().

Referenced by combineOr(), combinePTESTCC(), combineSelectToBinOp(), combineVECREDUCE_LOGIC(), combineVSelectWithAllOnesOrZeros(), EltsFromConsecutiveLoads(), llvm::TargetLowering::expandABD(), llvm::TargetLowering::expandABS(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandAVG(), llvm::TargetLowering::expandCTLS(), llvm::TargetLowering::expandIntMINMAX(), llvm::TargetLowering::expandVECTOR_COMPRESS(), foldBoolSelectToLogic(), foldSelectWithIdentityConstant(), foldVSelectToSignBitSplatMask(), getFreeze(), getNode(), LowerABD(), LowerAVXCONCAT_VECTORS(), llvm::RISCVTargetLowering::LowerOperation(), lowerSELECT(), lowerSelectToBinOp(), LowerShiftByScalarImmediate(), lowerVECTOR_SHUFFLEAsZeroOrAnyExtend(), lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(), lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(), llvm::RISCVTargetLowering::PerformDAGCombine(), performNanGuardFpToSatCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifyDemandedVectorElts(), simplifySelect(), tryToFoldExtOfExtload(), and tryToFoldExtOfLoad().

getFreeze() [2/2]

SDValue SelectionDAG::getFreeze	(	SDValue	V,
		const APInt &	DemandedElts,
		UndefPoisonKind	Kind = UndefPoisonKind::UndefOrPoison )

Return a freeze of V if any of the demanded elts may be undef or poison.

Kind can be used to selectively freeze poison and/or undef bits only.

Definition at line 2562 of file SelectionDAG.cpp.

References getFreeze(), and isGuaranteedNotToBeUndefOrPoison().

getFunctionVarLocs()

const FunctionVarLocs * llvm::SelectionDAG::getFunctionVarLocs ( ) const

inline

Returns the result of the AssignmentTrackingAnalysis pass if it's available, otherwise return nullptr.

Definition at line 502 of file SelectionDAG.h.

getGatherVP()

SDValue SelectionDAG::getGatherVP	(	SDVTList	VTs,
		EVT	VT,
		const SDLoc &	dl,
		ArrayRef< SDValue >	Ops,
		MachineMemOperand *	MMO,
		ISD::MemIndexType	IndexType )

Definition at line 11405 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::isa(), llvm::details::FixedOrScalableQuantity< ElementCount, unsigned >::isKnownGE(), N, NewSDValueDbgMsg(), and SDValue().

Referenced by llvm::RISCVTargetLowering::PerformDAGCombine().

getGetFPEnv()

SDValue SelectionDAG::getGetFPEnv	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Ptr,
		EVT	MemVT,
		MachineMemOperand *	MMO )

Definition at line 11747 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::ISD::GET_FPENV_MEM, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), getVTList(), N, NewSDValueDbgMsg(), and SDValue().

getGLOBAL_OFFSET_TABLE()

SDValue llvm::SelectionDAG::getGLOBAL_OFFSET_TABLE ( EVT VT )

inline

Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc.

Definition at line 1172 of file SelectionDAG.h.

References getNode(), and llvm::ISD::GLOBAL_OFFSET_TABLE.

Referenced by llvm::HexagonTargetLowering::LowerGLOBALADDRESS().

getGlobalAddress()

SDValue SelectionDAG::getGlobalAddress	(	const GlobalValue *	GV,
		const SDLoc &	DL,
		EVT	VT,
		int64_t	offset = 0,
		bool	isTargetGA = false,
		unsigned	TargetFlags = 0 )

Definition at line 1936 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), llvm::BitWidth, DL, getDataLayout(), llvm::DataLayout::getPointerTypeSizeInBits(), llvm::GlobalValue::getType(), getVTList(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::GlobalValue::isThreadLocal(), N, llvm::Offset, Opc, SDValue(), llvm::SignExtend64(), llvm::ISD::TargetGlobalAddress, and llvm::ISD::TargetGlobalTLSAddress.

Referenced by FoldSymbolOffset(), llvm::VETargetLowering::getPICJumpTableRelocBase(), getSymbolFunctionGlobalAddress(), getTargetGlobalAddress(), llvm::TargetLowering::LowerToTLSEmulatedModel(), and performGlobalAddressCombine().

getGraphAttrs()

std::string SelectionDAG::getGraphAttrs

(

const SDNode *

N

)

const

Get graph attributes for a node.

getGraphAttrs - Get graph attributes for a node.

(eg. "color=red".) Used from getNodeAttributes.

Definition at line 203 of file SelectionDAGPrinter.cpp.

References llvm::errs(), I, and N.

Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getNodeAttributes().

getHasPredecessorMaxSteps()

unsigned SelectionDAG::getHasPredecessorMaxSteps ( )

static

Definition at line 122 of file SelectionDAG.cpp.

References MaxSteps.

Referenced by canFoldStoreIntoLibCallOutputPointers(), getPostIndexedLoadStoreOp(), and shouldCombineToPostInc().

getHeapAllocSite()

MDNode * llvm::SelectionDAG::getHeapAllocSite ( const SDNode * Node ) const

inline

Return HeapAllocSite associated with Node, or nullptr if none exists.

Definition at line 2638 of file SelectionDAG.h.

References I.

getIdentityElement()

SDValue SelectionDAG::getIdentityElement	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDNodeFlags	Flags )

Get the (commutative) identity element for the given opcode, if it exists.

Definition at line 15171 of file SelectionDAG.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::APFloat::changeSign(), DL, llvm::ISD::FADD, llvm::ISD::FMAXIMUM, llvm::ISD::FMAXIMUMNUM, llvm::ISD::FMAXNUM, llvm::ISD::FMINIMUM, llvm::ISD::FMINIMUMNUM, llvm::ISD::FMINNUM, llvm::ISD::FMUL, getConstant(), getConstantFP(), llvm::EVT::getFltSemantics(), llvm::APFloat::getInf(), getIntegerIdentity(), llvm::APFloat::getLargest(), llvm::APFloat::getQNaN(), llvm::EVT::getScalarSizeInBits(), llvm::ISD::MUL, llvm::ISD::OR, SDValue(), llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::UMAX, llvm::ISD::UMIN, and llvm::ISD::XOR.

Referenced by tryFoldSelectIntoOp().

getIndexedLoad()

SDValue SelectionDAG::getIndexedLoad	(	SDValue	OrigLoad,
		const SDLoc &	dl,
		SDValue	Base,
		SDValue	Offset,
		ISD::MemIndexedMode	AM )

Definition at line 10850 of file SelectionDAG.cpp.

References assert(), llvm::sampleprof::Base, llvm::cast(), getLoad(), llvm::SDValue::getValueType(), llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::Offset, and llvm::ISD::POISON.

getIndexedLoadVP()

SDValue SelectionDAG::getIndexedLoadVP	(	SDValue	OrigLoad,
		const SDLoc &	dl,
		SDValue	Base,
		SDValue	Offset,
		ISD::MemIndexedMode	AM )

Definition at line 11107 of file SelectionDAG.cpp.

References assert(), llvm::sampleprof::Base, llvm::cast(), getLoadVP(), llvm::SDValue::getValueType(), llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, llvm::Offset, and llvm::ISD::POISON.

getIndexedMaskedLoad()

SDValue SelectionDAG::getIndexedMaskedLoad	(	SDValue	OrigLoad,
		const SDLoc &	dl,
		SDValue	Base,
		SDValue	Offset,
		ISD::MemIndexedMode	AM )

Definition at line 11527 of file SelectionDAG.cpp.

References assert(), llvm::sampleprof::Base, llvm::cast(), getMaskedLoad(), llvm::SDValue::getValueType(), llvm::Offset, and llvm::ISD::POISON.

getIndexedMaskedStore()

SDValue SelectionDAG::getIndexedMaskedStore	(	SDValue	OrigStore,
		const SDLoc &	dl,
		SDValue	Base,
		SDValue	Offset,
		ISD::MemIndexedMode	AM )

Definition at line 11577 of file SelectionDAG.cpp.

References assert(), llvm::sampleprof::Base, llvm::cast(), getMaskedStore(), llvm::Offset, and llvm::ISD::POISON.

getIndexedStore()

SDValue SelectionDAG::getIndexedStore	(	SDValue	OrigStore,
		const SDLoc &	dl,
		SDValue	Base,
		SDValue	Offset,
		ISD::MemIndexedMode	AM )

Definition at line 10990 of file SelectionDAG.cpp.

References assert(), llvm::sampleprof::Base, llvm::cast(), getStore(), llvm::Offset, and llvm::ISD::POISON.

Referenced by llvm::HexagonTargetLowering::LowerStore().

getIndexedStoreVP()

SDValue SelectionDAG::getIndexedStoreVP	(	SDValue	OrigStore,
		const SDLoc &	dl,
		SDValue	Base,
		SDValue	Offset,
		ISD::MemIndexedMode	AM )

Definition at line 11234 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::sampleprof::Base, llvm::cast(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, and SDValue().

getInsertSubvector()

SDValue llvm::SelectionDAG::getInsertSubvector ( const SDLoc & DL, SDValue Vec, SDValue SubVec, unsigned Idx )

inline

Insert SubVec at the Idx element of Vec.

Definition at line 953 of file SelectionDAG.h.

References DL, getNode(), llvm::SDValue::getValueType(), getVectorIdxConstant(), and llvm::ISD::INSERT_SUBVECTOR.

Referenced by combineBinOpToReduce(), combineToHorizontalAddSub(), convertToScalableVector(), convertToScalableVector(), llvm::TargetLowering::expandVecReduce(), getDeinterleaveShiftAndTrunc(), getLegalMaskAndStepVector(), getZeroPaddedAdd(), insertSubVector(), lowerBitreverseShuffle(), lowerBUILD_VECTOR(), llvm::RISCVTargetLowering::LowerOperation(), lowerReductionSeq(), lowerScalarInsert(), matchSplatAsGather(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), widenSubVector(), WidenVector(), and WidenVector().

getInsertVectorElt()

SDValue llvm::SelectionDAG::getInsertVectorElt ( const SDLoc & DL, SDValue Vec, SDValue Elt, unsigned Idx )

inline

Insert Elt into Vec at offset Idx.

See INSERT_VECTOR_ELT description for element type handling.

Definition at line 946 of file SelectionDAG.h.

References DL, getNode(), llvm::SDValue::getValueType(), getVectorIdxConstant(), and llvm::ISD::INSERT_VECTOR_ELT.

Referenced by BuildVectorFromScalar(), CollectOpsToWiden(), combineVectorInsert(), LowerBUILD_VECTORvXi1(), lowerBuildVectorOfConstants(), lowerBuildVectorViaDominantValues(), llvm::AArch64TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), and performINSERT_VECTOR_ELTCombine().

getIntPtrConstant()

SDValue SelectionDAG::getIntPtrConstant	(	uint64_t	Val,
		const SDLoc &	DL,
		bool	isTarget = false )

Definition at line 1851 of file SelectionDAG.cpp.

References DL, getConstant(), and getDataLayout().

Referenced by buildCallOperands(), combineBVZEXTLOAD(), CompactSwizzlableVector(), CreateCopyOfByValArgument(), emitConstantSizeRepmov(), emitConstantSizeRepstos(), emitRepmovsB(), emitRepstosB(), extractSubVector(), getCALLSEQ_END(), getCALLSEQ_START(), getCopyToParts(), getFPExtendOrRound(), getFRAMEADDR(), getParamsForOneTrueMaskedElt(), getStrictFPExtendOrRound(), GetTLSADDR(), isSpecificZeroAfterMaybeRounding(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerClusterLaunchControlQueryCancel(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS_i1(), lowerCvtRSIntrinsics(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerEXTRACT_SUBVECTOR(), LowerFCOPYSIGN(), LowerFLDEXP(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), lowerINT_TO_FP(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP16(), lowerMasksToReg(), lowerMSTORE(), llvm::RISCVTargetLowering::LowerOperation(), llvm::LanaiTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerSDIV(), lowerStAsyncWithMbarrier(), lowerSTOREVector(), LowerTcgen05MMADisableOutputLane(), lowerTcgen05St(), LowerToTLSExecModel(), LowerUDIV(), LowerVAARG(), llvm::VETargetLowering::lowerVAARG(), llvm::HexagonTargetLowering::LowerVACOPY(), LowerVACOPY(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), llvm::VETargetLowering::lowerVASTART(), llvm::PPCTargetLowering::PerformDAGCombine(), performFPExtendCombine(), PerformTruncatingStoreCombine(), prepareDescriptorIndirectCall(), promoteXINT_TO_FP(), ReorganizeVector(), replaceAtomicSwap128(), replaceLoadVector(), and SplitScalar().

getJumpTable()

SDValue SelectionDAG::getJumpTable	(	int	JTI,
		EVT	VT,
		bool	isTarget = false,
		unsigned	TargetFlags = 0 )

Definition at line 2001 of file SelectionDAG.cpp.

References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), getVTList(), llvm::ISD::JumpTable, N, Opc, SDValue(), and llvm::ISD::TargetJumpTable.

Referenced by getTargetJumpTable().

getJumpTableDebugInfo()

SDValue SelectionDAG::getJumpTableDebugInfo	(	int	JTI,
		SDValue	Chain,
		const SDLoc &	DL )

Definition at line 2021 of file SelectionDAG.cpp.

References DL, getDataLayout(), getNode(), llvm::TargetLoweringBase::getPointerTy(), getTargetConstant(), getTargetLoweringInfo(), and llvm::ISD::JUMP_TABLE_DEBUG_INFO.

Referenced by llvm::RISCVTargetLowering::expandIndirectJTBranch(), llvm::TargetLowering::expandIndirectJTBranch(), and llvm::X86TargetLowering::expandIndirectJTBranch().

getLabelNode()

SDValue SelectionDAG::getLabelNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		SDValue	Root,
		MCSymbol *	Label )

Definition at line 2459 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), N, and SDValue().

Referenced by getEHLabel().

getLibcalls()

const LibcallLoweringInfo & llvm::SelectionDAG::getLibcalls ( ) const

inline

Definition at line 492 of file SelectionDAG.h.

Referenced by llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), getLoadStackGuard(), getRuntimeCallSDValueHelper(), isDivRemLibcallAvailable(), llvm::SparcTargetLowering::LowerF128Op(), and llvm::TargetLowering::softenSetCCOperands().

getLibInfo()

const TargetLibraryInfo & llvm::SelectionDAG::getLibInfo ( ) const

inline

Definition at line 490 of file SelectionDAG.h.

getLifetimeNode()

SDValue SelectionDAG::getLifetimeNode	(	bool	IsStart,
		const SDLoc &	dl,
		SDValue	Chain,
		int	FrameIndex )

Creates a LifetimeSDNode that starts (IsStart==true) or ends (IsStart==false) the lifetime of the FrameIndex.

Definition at line 10642 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), getDataLayout(), llvm::SDLoc::getDebugLoc(), getFrameIndex(), llvm::SDLoc::getIROrder(), getTargetLoweringInfo(), getVTList(), llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, N, NewSDValueDbgMsg(), and SDValue().

getLoad() [1/5]

SDValue SelectionDAG::getLoad	(	EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		MachineMemOperand *	MMO )

Definition at line 10824 of file SelectionDAG.cpp.

References getLoad(), getPOISON(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::Undef, and llvm::ISD::UNINDEXED.

getLoad() [2/5]

SDValue SelectionDAG::getLoad	(	EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		MachinePointerInfo	PtrInfo,
		MaybeAlign	Alignment = MaybeAlign(),
		MachineMemOperand::Flags	MMOFlags = MachineMemOperand::MONone,
		const MMOMetadata &	Metadata = MMOMetadata() )

Loads are not normal binary operators: their result type is not determined by their operands, and they produce a value AND a token chain.

This function will set the MOLoad flag on MMOFlags, but you can set it if you want. The MOStore flag must not be set.

Definition at line 10814 of file SelectionDAG.cpp.

References getLoad(), getPOISON(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::Undef, and llvm::ISD::UNINDEXED.

Referenced by bitcastf32Toi32(), llvm::X86TargetLowering::BuildFILD(), combineBVOfConsecutiveLoads(), combineConcatVectorOfShuffles(), combineConcatVectorOps(), combineEXTRACT_SUBVECTOR(), combineExtractFromVectorLoad(), combineExtractWithShuffle(), combineLoad(), combineMaskedLoadConstantMask(), combineMOVDQ2Q(), combineStore(), combineTargetShuffle(), combineTruncate(), convertMLOADToLoadWithUsedBytesMask(), convertTwoLoadsAndCmpToVCMPEQUB(), EltsFromConsecutiveLoads(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), expandf64Toi32(), llvm::TargetLowering::expandMultipleResultFPLibCall(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), expandVACopy(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorSplice(), getADAEntry(), llvm::MipsTargetLowering::getAddrGlobal(), llvm::MipsTargetLowering::getAddrGlobalLargeGOT(), llvm::MipsTargetLowering::getAddrLocal(), llvm::MipsTargetLowering::getDllimportVariable(), getExtLoad(), getExtLoad(), getFRAMEADDR(), getIndexedLoad(), getLargeExternalSymbol(), getLargeGlobalAddress(), getLoad(), getLoad(), getLoad(), getLoad(), getMemmoveLoadsAndStores(), GetTLSADDR(), getzOSCalleeAndADA(), llvm::AMDGPUTargetLowering::loadStackInputValue(), LowerAsSplatVectorLoad(), llvm::SparcTargetLowering::LowerBSWAP(), llvm::NVPTXTargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerF128Load(), llvm::SparcTargetLowering::LowerF128Op(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), lowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerLoad(), LowerLoad(), lowerLoadF128(), lowerLoadI1(), lowerMSALoadIntr(), llvm::RISCVTargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), lowerRETURNADDR(), lowerShuffleAsBroadcast(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerUINT_TO_FP_i64(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), LowerVAARG(), llvm::VETargetLowering::lowerVAARG(), llvm::SparcTargetLowering::makeAddress(), llvm::VETargetLowering::makeAddress(), narrowBitOpRMW(), narrowExtractedVectorLoad(), performConcatVectorsCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performExtBinopLoadFold(), performExtendToBoolVectorLoadCombine(), performIntToFpCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performPredicateLoadCombine(), performSINT_TO_FPCombine(), PerformSplittingMVEEXTToWideningLoad(), PerformSplittingToWideningLoad(), PerformVMOVhrCombine(), PerformVMOVRRDCombine(), prepareDescriptorIndirectCall(), reduceMaskedLoadToScalarLoad(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeExtractedVectorLoad(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle(), llvm::TargetLowering::SimplifySetCC(), SkipLoadExtensionForVMULL(), tryLowerSmallVectorExtLoad(), unpack64(), unpackF64OnLA32DSoftABI(), unpackF64OnRV32DSoftABI(), unpackFromMemLoc(), and unpackGPRVecOnRV32().

getLoad() [3/5]

SDValue SelectionDAG::getLoad	(	ISD::MemIndexedMode	AM,
		ISD::LoadExtType	ExtType,
		EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Offset,
		EVT	MemVT,
		MachineMemOperand *	MMO )

Definition at line 10756 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::EVT::bitsLT(), llvm::cast_or_null(), llvm::mdconst::extract(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MDNode::getOperand(), llvm::MachineMemOperand::getPointerInfo(), llvm::MachineMemOperand::getRanges(), llvm::EVT::getRawBits(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), getVTList(), Indexed, llvm::EVT::isInteger(), llvm::EVT::isVector(), llvm::ISD::LOAD, N, NewSDValueDbgMsg(), llvm::ISD::NON_EXTLOAD, llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

getLoad() [4/5]

SDValue SelectionDAG::getLoad	(	ISD::MemIndexedMode	AM,
		ISD::LoadExtType	ExtType,
		EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Offset,
		MachinePointerInfo	PtrInfo,
		EVT	MemVT,
		Align	Alignment,
		MachineMemOperand::Flags	MMOFlags = MachineMemOperand::MONone,
		const MMOMetadata &	Metadata = MMOMetadata() )

Definition at line 10732 of file SelectionDAG.cpp.

References assert(), getLoad(), getMachineFunction(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PTs >::isNull(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, llvm::Offset, Size, and llvm::MachinePointerInfo::V.

getLoad() [5/5]

SDValue llvm::SelectionDAG::getLoad ( ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc & dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment = MaybeAlign(), MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, const MMOMetadata & Metadata = MMOMetadata() )

inline

Definition at line 1490 of file SelectionDAG.h.

References getEVTAlign(), getLoad(), llvm::MachineMemOperand::MONone, and llvm::Offset.

getLoadFFVP()

SDValue SelectionDAG::getLoadFFVP	(	EVT	VT,
		const SDLoc &	DL,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Mask,
		SDValue	EVL,
		MachineMemOperand *	MMO )

Definition at line 11719 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::cast(), DL, llvm::MachinePointerInfo::getAddrSpace(), llvm::MachineMemOperand::getFlags(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), getVTList(), N, NewSDValueDbgMsg(), and SDValue().

getLoadVP() [1/5]

SDValue SelectionDAG::getLoadVP	(	EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Mask,
		SDValue	EVL,
		MachineMemOperand *	MMO,
		bool	IsExpanding = false )

Definition at line 11077 of file SelectionDAG.cpp.

References getLoadVP(), getPOISON(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::Undef, and llvm::ISD::UNINDEXED.

getLoadVP() [2/5]

SDValue SelectionDAG::getLoadVP	(	EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Mask,
		SDValue	EVL,
		MachinePointerInfo	PtrInfo,
		MaybeAlign	Alignment,
		MachineMemOperand::Flags	MMOFlags,
		const AAMDNodes &	AAInfo,
		const MDNode *	Ranges = nullptr,
		bool	IsExpanding = false )

Definition at line 11064 of file SelectionDAG.cpp.

References getLoadVP(), getPOISON(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::Undef, and llvm::ISD::UNINDEXED.

getLoadVP() [3/5]

SDValue SelectionDAG::getLoadVP	(	ISD::MemIndexedMode	AM,
		ISD::LoadExtType	ExtType,
		EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Offset,
		SDValue	Mask,
		SDValue	EVL,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		bool	IsExpanding = false )

Definition at line 11022 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast_or_null(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), getVTList(), Indexed, N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

getLoadVP() [4/5]

SDValue SelectionDAG::getLoadVP	(	ISD::MemIndexedMode	AM,
		ISD::LoadExtType	ExtType,
		EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Offset,
		SDValue	Mask,
		SDValue	EVL,
		MachinePointerInfo	PtrInfo,
		EVT	MemVT,
		Align	Alignment,
		MachineMemOperand::Flags	MMOFlags,
		const AAMDNodes &	AAInfo,
		const MDNode *	Ranges = nullptr,
		bool	IsExpanding = false )

Definition at line 11001 of file SelectionDAG.cpp.

References assert(), getLoadVP(), getMachineFunction(), llvm::EVT::getStoreSize(), InferPointerInfo(), llvm::PointerUnion< PTs >::isNull(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, llvm::Offset, Size, and llvm::MachinePointerInfo::V.

Referenced by getExtLoadVP(), getExtLoadVP(), getIndexedLoadVP(), getLoadVP(), getLoadVP(), getLoadVP(), getLoadVP(), and performMaskedLoadToVPLoadCombine().

getLoadVP() [5/5]

SDValue llvm::SelectionDAG::getLoadVP ( ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc & dl, SDValue Chain, SDValue Ptr, SDValue Offset, SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT, MaybeAlign Alignment = MaybeAlign(), MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, const AAMDNodes & AAInfo = AAMDNodes(), const MDNode * Ranges = nullptr, bool IsExpanding = false )

inline

Definition at line 1571 of file SelectionDAG.h.

References getEVTAlign(), getLoadVP(), llvm::MachineMemOperand::MONone, and llvm::Offset.

getLogicalNOT()

SDValue SelectionDAG::getLogicalNOT	(	const SDLoc &	DL,
		SDValue	Val,
		EVT	VT )

Create a logical NOT operation as (XOR Val, BooleanOne).

Definition at line 1689 of file SelectionDAG.cpp.

References DL, getBoolConstant(), getNode(), and llvm::ISD::XOR.

Referenced by extractBooleanFlip(), llvm::RISCVTargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerUAddSubOCarry(), PerformORCombine_i1(), performVECTOR_SHUFFLECombine(), and performVSELECTCombine().

getMachineFunction()

MachineFunction & llvm::SelectionDAG::getMachineFunction ( ) const

inline

Definition at line 476 of file SelectionDAG.h.

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::TargetLowering::annotateStackObjectPointer(), buildCallOperands(), llvm::X86TargetLowering::BuildFILD(), llvm::TargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildSREMPow2(), CalculateTailCallSPDiff(), llvm::AArch64TargetLowering::changeStreamingMode(), combineConcatVectorOfShuffles(), combineConcatVectorOps(), combineFMA(), combineFMADDSUB(), combineFMinNumFMaxNum(), combineFneg(), combineIntDivRem(), combineMul(), combineScalarMinMaxAbsStore(), combineStore(), combineTargetShuffle(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), llvm::BaseIndexOffset::computeAliasing(), computeConstantRange(), computeKnownBits(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), llvm::SITargetLowering::computeKnownBitsForTargetNode(), convertTwoLoadsAndCmpToVCMPEQUB(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::TargetLowering::CTTZTableLookup(), llvm::SITargetLowering::denormalsEnabledForType(), diagnoseUnsupportedImage(), EmitCmp(), emitConstantSizeRepmov(), emitConstantSizeRepstos(), emitLockedStackOp(), llvm::AArch64SelectionDAGInfo::EmitMOPS(), emitNonHSAIntrinsicError(), emitRemovedIntrinsicError(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemmove(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemmove(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::RISCVSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForSetTag(), EmitUnrolledSetTag(), llvm::BaseIndexOffset::equalBaseIndex(), errorUnsupported(), llvm::RISCVTargetLowering::expandIndirectJTBranch(), llvm::X86TargetLowering::expandIndirectJTBranch(), llvm::TargetLowering::expandIS_FPCLASS(), expandMul(), llvm::TargetLowering::expandMultipleResultFPLibCall(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorSplice(), fail(), fixupFuncForFI(), getADAEntry(), getAddressForMemoryInput(), llvm::MipsTargetLowering::getAddrLocal(), getBROADCAST_LOAD(), getCopyFromParts(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getFRAMEADDR(), llvm::MipsTargetLowering::getGlobalReg(), getLargeExternalSymbol(), getLargeGlobalAddress(), getLegalMaskAndStepVector(), getLoad(), getLoadStackGuard(), getLoadVP(), getMemcpyLoadsAndStores(), getMemIntrinsicNode(), getMemmoveLoadsAndStores(), getMemsetStores(), llvm::MipsTargetLowering::getOpndList(), llvm::VETargetLowering::getPICJumpTableRelocBase(), getReducedAlign(), getRegistersForValue(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), llvm::NVPTXTargetLowering::getSqrtEstimate(), getStore(), getTagSymNode(), GetTLSADDR(), getTruncStore(), getTruncStoreVP(), getv64i1Argument(), getVCIXISDNodeWCHAIN(), getVScale(), getzOSCalleeAndADA(), hasReturnsTwiceAttr(), InferPointerInfo(), InferPtrAlign(), llvm::SITargetLowering::isCanonicalized(), isConsecutiveLSLoc(), llvm::HexagonTargetLowering::IsEligibleForTailCallOptimization(), llvm::SITargetLowering::isEligibleForTailCallOptimization(), isEligibleToFoldADDIForFasterLocalAccesses(), llvm::SITargetLowering::isFMADLegal(), llvm::SITargetLowering::isFPExtFoldable(), llvm::TargetLowering::isInTailCallPosition(), llvm::SITargetLowering::isKnownNeverNaNForTargetNode(), isKnownNeverZero(), isThreadPointerAcquisitionNode(), IsWebAssemblyLocal(), legalizeScatterGatherIndexType(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::AMDGPUTargetLowering::loadStackInputValue(), LowerAsSplatVectorLoad(), LowerATOMIC_STORE(), llvm::SparcTargetLowering::LowerBSWAP(), lowerBuildVectorAsBroadcast(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::SITargetLowering::LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCLMUL(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Op(), llvm::HexagonTargetLowering::LowerFDIV(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), lowerFRAMEADDR(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerInterruptReturn(), LowerINTRINSIC_W_CHAIN(), llvm::VETargetLowering::lowerINTRINSIC_WO_CHAIN(), llvm::R600TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), LowerPDEPPEXT(), llvm::HexagonTargetLowering::LowerReturn(), llvm::LoongArchTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::RISCVTargetLowering::LowerReturn(), llvm::SITargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::VETargetLowering::LowerReturn(), llvm::XtensaTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), lowerRETURNADDR(), lowerShuffleAsBroadcast(), llvm::NVPTXTargetLowering::LowerSTACKRESTORE(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), lowerStAsyncRelease(), lowerStAsyncWithMbarrier(), llvm::TargetLowering::LowerToTLSEmulatedModel(), LowerToTLSExecModel(), llvm::VETargetLowering::lowerToTLSGeneralDynamicModel(), LowerToTLSLocalDynamicModel(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_vXi32(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), llvm::AMDGPUTargetLowering::lowerUnhandledCall(), LowerVACOPY(), llvm::HexagonTargetLowering::LowerVASTART(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), LowerVASTART(), LowerVASTART(), LowerVASTART(), llvm::VETargetLowering::lowerVASTART(), llvm::SparcTargetLowering::makeAddress(), llvm::VETargetLowering::makeAddress(), MarkEHGuard(), MarkEHRegistrationNode(), narrowExtractedVectorLoad(), llvm::AMDGPUTargetLowering::needsDenormHandlingF32(), llvm::SITargetLowering::passSpecialInputs(), performBRCONDCombine(), performCONCAT_VECTORSCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performMemPairCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), performOrXorChainCombine(), performReverseEVLCombine(), performVP_STORECombine(), llvm::SITargetLowering::PostISelFolding(), llvm::AArch64TargetLowering::preferredShiftLegalizationStrategy(), llvm::RISCVTargetLowering::preferredShiftLegalizationStrategy(), llvm::X86TargetLowering::preferredShiftLegalizationStrategy(), prepareDAGLevelOperands(), processVCIXOperands(), promoteToConstantPool(), promoteVCIXScalar(), recoverFramePointer(), reduceVMULWidth(), refinePtrAS(), replaceAtomicSwap128(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), reportInvalidTensormapReplaceUsage(), selectI64Imm(), setAlignFlagsForFI(), setUsesTOCBasePtr(), shouldGenerateInlineTPLoop(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetShuffle(), llvm::TargetLowering::SimplifySetCC(), splitStores(), llvm::AMDGPUTargetLowering::storeStackInputValue(), StoreTailCallArgumentsToStackSlot(), transformCallee(), tryMemPairCombine(), llvm::X86InstrInfo::unfoldMemoryOperand(), unpack64(), unpackF64OnLA32DSoftABI(), unpackF64OnRV32DSoftABI(), unpackFromMemLoc(), unpackFromMemLoc(), unpackFromMemLoc(), unpackFromRegLoc(), unpackFromRegLoc(), unpackFromRegLoc(), unpackGPRVecOnRV32(), updateForAIXShLibTLSModelOpt(), and viewGraph().

getMachineNode() [1/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		ArrayRef< EVT >	ResultTys,
		ArrayRef< SDValue >	Ops )

Definition at line 12728 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [2/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT )

These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.

getMachineNode - These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.

Note that getMachineNode returns the resultant node. If there is already a node of the specified opcode and operands, it returns that node instead of the current one.

Definition at line 12647 of file SelectionDAG.cpp.

References getMachineNode(), and getVTList().

Referenced by buildGPRPair(), llvm::SITargetLowering::buildRSRC(), buildSMovImm32(), llvm::VETargetLowering::combineTRUNCATE(), combineXorSelectCC(), convertFromF16(), llvm::SITargetLowering::copyToM0(), createGPRPairNode(), createGPRPairNode2xi32(), emitLockedStackOp(), llvm::AArch64SelectionDAGInfo::EmitMOPS(), llvm::X86TargetLowering::emitStackGuardMixFP(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForSetTag(), expandBitCastI128ToF128(), expandIntrinsicWChainHelper(), getDataClassTest(), getLeftShift(), getLoadStackGuard(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getMachineNode(), getPrefetchNode(), getTargetExtractSubreg(), getTargetInsertSubreg(), llvm::WebAssembly::getTLSBase(), InvertCarryFlag(), isWorthFoldingIntoOrrWithShift(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::VETargetLowering::lowerATOMIC_FENCE(), lowerBuildVectorViaPacking(), llvm::SITargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::VETargetLowering::lowerEXTRACT_VECTOR_ELT(), LowerF128Load(), LowerF128Store(), LowerF64Op(), LowerFNEGorFABS(), llvm::VETargetLowering::LowerFormalArguments(), lowerI128ToGR128(), llvm::VETargetLowering::lowerINSERT_VECTOR_ELT(), LowerINTRINSIC_W_CHAIN(), lowerLoadF128(), lowerLoadI1(), llvm::SystemZTargetLowering::LowerOperationWrapper(), LowerPtrAuthGlobalAddressStatically(), llvm::VETargetLowering::LowerReturn(), lowerStoreF128(), lowerStoreI1(), optimizeLogicalImm(), llvm::SITargetLowering::PostISelFolding(), ReplaceATOMIC_LOAD_128Results(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), replaceCMP_XCHG_128Results(), llvm::PPCTargetLowering::SelectAddressRegImm(), selectConstantAddr(), selectI64Imm(), selectI64Imm(), selectI64ImmDirect(), selectI64ImmDirectPrefix(), selectImm(), selectImmSeq(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), SelectSAddrFI(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), llvm::X86InstrInfo::unfoldMemoryOperand(), Widen(), and llvm::SITargetLowering::wrapAddr64Rsrc().

getMachineNode() [3/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT,
		ArrayRef< SDValue >	Ops )

Definition at line 12675 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [4/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Op1 )

Definition at line 12653 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [5/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Op1,
		SDValue	Op2 )

Definition at line 12660 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [6/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3 )

Definition at line 12667 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [7/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT1,
		EVT	VT2,
		ArrayRef< SDValue >	Ops )

Definition at line 12697 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [8/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT1,
		EVT	VT2,
		EVT	VT3,
		ArrayRef< SDValue >	Ops )

Definition at line 12721 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [9/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT1,
		EVT	VT2,
		EVT	VT3,
		SDValue	Op1,
		SDValue	Op2 )

Definition at line 12704 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [10/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT1,
		EVT	VT2,
		EVT	VT3,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3 )

Definition at line 12712 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [11/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT1,
		EVT	VT2,
		SDValue	Op1,
		SDValue	Op2 )

Definition at line 12681 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [12/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		EVT	VT1,
		EVT	VT2,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3 )

Definition at line 12689 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineNode(), and getVTList().

getMachineNode() [13/13]

MachineSDNode * SelectionDAG::getMachineNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		SDVTList	VTs,
		ArrayRef< SDValue >	Ops )

Definition at line 12735 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::cast(), DL, N, NewSDValueDbgMsg(), llvm::SDVTList::NumVTs, SDValue(), and llvm::SDVTList::VTs.

getMaskedGather()

SDValue SelectionDAG::getMaskedGather	(	SDVTList	VTs,
		EVT	MemVT,
		const SDLoc &	dl,
		ArrayRef< SDValue >	Ops,
		MachineMemOperand *	MMO,
		ISD::MemIndexType	IndexType,
		ISD::LoadExtType	ExtTy )

Definition at line 11588 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::isa(), llvm::details::FixedOrScalableQuantity< ElementCount, unsigned >::isKnownGE(), llvm::ISD::MGATHER, N, NewSDValueDbgMsg(), and SDValue().

Referenced by llvm::RISCVTargetLowering::PerformDAGCombine(), performMaskedGatherScatterCombine(), and rebuildGatherScatter().

getMaskedHistogram()

SDValue SelectionDAG::getMaskedHistogram	(	SDVTList	VTs,
		EVT	MemVT,
		const SDLoc &	dl,
		ArrayRef< SDValue >	Ops,
		MachineMemOperand *	MMO,
		ISD::MemIndexType	IndexType )

Definition at line 11681 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), llvm::ISD::EXPERIMENTAL_VECTOR_HISTOGRAM, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::isa(), N, NewSDValueDbgMsg(), and SDValue().

Referenced by performMaskedGatherScatterCombine().

getMaskedLoad()

SDValue SelectionDAG::getMaskedLoad	(	EVT	VT,
		const SDLoc &	dl,
		SDValue	Chain,
		SDValue	Base,
		SDValue	Offset,
		SDValue	Mask,
		SDValue	Src0,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		ISD::MemIndexedMode	AM,
		ISD::LoadExtType	ExtTy,
		bool	IsExpanding = false )

Definition at line 11492 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::sampleprof::Base, llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), getVTList(), Indexed, llvm::ISD::MLOAD, N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

Referenced by combineMaskedLoad(), combineMaskedLoadConstantMask(), getIndexedMaskedLoad(), LowerMLOAD(), LowerMLOAD(), llvm::RISCVTargetLowering::PerformDAGCombine(), performLDNT1Combine(), performUnpackCombine(), and tryToFoldExtOfMaskedLoad().

getMaskedScatter()

SDValue SelectionDAG::getMaskedScatter	(	SDVTList	VTs,
		EVT	MemVT,
		const SDLoc &	dl,
		ArrayRef< SDValue >	Ops,
		MachineMemOperand *	MMO,
		ISD::MemIndexType	IndexType,
		bool	IsTruncating = false )

Definition at line 11635 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::isa(), llvm::details::FixedOrScalableQuantity< ElementCount, unsigned >::isKnownGE(), llvm::ISD::MSCATTER, N, NewSDValueDbgMsg(), and SDValue().

Referenced by llvm::RISCVTargetLowering::PerformDAGCombine(), performMaskedGatherScatterCombine(), and rebuildGatherScatter().

getMaskedStore()

SDValue SelectionDAG::getMaskedStore	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Val,
		SDValue	Base,
		SDValue	Offset,
		SDValue	Mask,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		ISD::MemIndexedMode	AM,
		bool	IsTruncating = false,
		bool	IsCompressing = false )

Definition at line 11539 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::sampleprof::Base, llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), getVTList(), Indexed, llvm::ISD::MSTORE, N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

Referenced by combineMaskedStore(), foldToMaskedStore(), getIndexedMaskedStore(), if(), LowerINTRINSIC_W_CHAIN(), LowerMSTORE(), llvm::RISCVTargetLowering::PerformDAGCombine(), and performSTNT1Combine().

getMaskFromElementCount()

SDValue SelectionDAG::getMaskFromElementCount	(	const SDLoc &	DL,
		EVT	VT,
		ElementCount	Len )

Return a vector with the first 'Len' lanes set to true and remaining lanes set to false.

The mask's ValueType is the same as when comparing vectors of type VT.

Definition at line 2202 of file SelectionDAG.cpp.

References DL, llvm::ISD::GET_ACTIVE_LANE_MASK, getConstant(), getContext(), getDataLayout(), getElementCount(), and getNode().

getMCSymbol()

SDValue SelectionDAG::getMCSymbol	(	MCSymbol *	Sym,
		EVT	VT )

Definition at line 2125 of file SelectionDAG.cpp.

References getVTList(), N, and SDValue().

Referenced by recoverFramePointer(), and transformCallee().

getMDNode()

SDValue SelectionDAG::getMDNode

(

const MDNode *

MD

)

Return an MDNodeSDNode which holds an MDNode.

Definition at line 2514 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), getVTList(), llvm::ISD::MDNODE_SDNODE, N, and SDValue().

Referenced by llvm::PPCTargetLowering::CollectTargetIntrinsicOperands(), and determineConstraints().

getMemBasePlusOffset() [1/2]

SDValue SelectionDAG::getMemBasePlusOffset	(	SDValue	Base,
		SDValue	Offset,
		const SDLoc &	DL,
		const SDNodeFlags	Flags = SDNodeFlags() )

Definition at line 9383 of file SelectionDAG.cpp.

References llvm::ISD::ADD, assert(), DL, getNode(), llvm::SDValue::getValueType(), llvm::Offset, llvm::ISD::PTRADD, and llvm::SDNodeFlags::setInBounds().

getMemBasePlusOffset() [2/2]

SDValue SelectionDAG::getMemBasePlusOffset	(	SDValue	Base,
		TypeSize	Offset,
		const SDLoc &	DL,
		const SDNodeFlags	Flags = SDNodeFlags() )

Returns sum of the base pointer and offset.

Unlike getObjectPtrOffset this does not set NoUnsignedWrap and InBounds by default.

Definition at line 9376 of file SelectionDAG.cpp.

References llvm::sampleprof::Base, DL, getMemBasePlusOffset(), getTypeSize(), and llvm::Offset.

Referenced by combineLoad(), combineStore(), combineTargetShuffle(), combineTruncate(), llvm::TargetLowering::CTTZTableLookup(), EltsFromConsecutiveLoads(), EmitUnrolledSetTag(), llvm::TargetLowering::expandVectorSplice(), getBROADCAST_LOAD(), getMemBasePlusOffset(), getObjectPtrOffset(), getObjectPtrOffset(), getParamsForOneTrueMaskedElt(), llvm::TargetLowering::getVectorSubVecPointer(), llvm::SparcTargetLowering::LowerCall_32(), llvm::TargetLowering::LowerCallTo(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), lowerShuffleAsBroadcast(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), narrowBitOpRMW(), narrowExtractedVectorLoad(), scalarizeVectorStore(), ShrinkLoadReplaceStoreWithStore(), and splitVectorStore().

getMemccpy()

std::pair< SDValue, SDValue > SelectionDAG::getMemccpy	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	C,
		SDValue	Size,
		const CallInst *	CI )

Lower a memccpy operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.

Definition at line 10032 of file SelectionDAG.cpp.

References C(), getContext(), getDataLayout(), llvm::Type::getInt32Ty(), llvm::DataLayout::getIntPtrType(), getRuntimeCallSDValueHelper(), llvm::PointerType::getUnqual(), and Size.

Referenced by llvm::PPCSelectionDAGInfo::EmitTargetCodeForMemccpy().

getMemcmp()

std::pair< SDValue, SDValue > SelectionDAG::getMemcmp	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		const CallInst *	CI )

Lower a memcmp operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.

Definition at line 10049 of file SelectionDAG.cpp.

References getContext(), getDataLayout(), llvm::DataLayout::getIntPtrType(), getRuntimeCallSDValueHelper(), llvm::PointerType::getUnqual(), and Size.

Referenced by llvm::PPCSelectionDAGInfo::EmitTargetCodeForMemcmp().

getMemcpy()

SDValue SelectionDAG::getMemcpy	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		Align	DstAlign,
		Align	SrcAlign,
		bool	isVol,
		bool	AlwaysInline,
		const CallInst *	CI,
		std::optional< bool >	OverrideTailCall,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo,
		const AAMDNodes &	AAInfo = AAMDNodes(),
		BatchAAResults *	BatchAA = nullptr )

Definition at line 10087 of file SelectionDAG.cpp.

References assert(), checkAddrSpaceIsValidForLibcall(), llvm::dyn_cast(), llvm::MachinePointerInfo::getAddrSpace(), getContext(), getDataLayout(), getExternalSymbol(), llvm::getMemCacheHintMetadata(), getMemcpyLoadsAndStores(), llvm::PointerType::getUnqual(), llvm::ConstantSDNode::getZExtValue(), hasSwiftErrorArg(), isInTailCallPositionWrapper(), llvm::ConstantSDNode::isZero(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setDiscardResult(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and Size.

Referenced by CreateCopyOfByValArgument(), CreateCopyOfByValArgument(), CreateCopyOfByValArgument(), CreateCopyOfByValArgument(), emitConstantSizeRepmov(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::HexagonTargetLowering::LowerVACOPY(), and LowerVACOPY().

getMemIntrinsicNode() [1/4]

SDValue SelectionDAG::getMemIntrinsicNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		EVT	MemVT,
		ArrayRef< MachineMemOperand * >	MMOs )

getMemIntrinsicNode - Creates a MemIntrinsicNode with multiple MMOs.

Definition at line 10581 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::ISD::BUILTIN_OP_END, llvm::cast(), llvm::copy(), llvm::ArrayRef< T >::empty(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::EVT::getRawBits(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, N, NewSDValueDbgMsg(), llvm::SDVTList::NumVTs, llvm::ISD::PREFETCH, SDValue(), llvm::ArrayRef< T >::size(), and llvm::SDVTList::VTs.

getMemIntrinsicNode() [2/4]

SDValue SelectionDAG::getMemIntrinsicNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		EVT	MemVT,
		MachineMemOperand *	MMO )

Definition at line 10574 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::ArrayRef(), and getMemIntrinsicNode().

getMemIntrinsicNode() [3/4]

SDValue SelectionDAG::getMemIntrinsicNode	(	unsigned	Opcode,
		const SDLoc &	dl,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		EVT	MemVT,
		MachinePointerInfo	PtrInfo,
		Align	Alignment,
		MachineMemOperand::Flags	Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore,
		LocationSize	Size = LocationSize::precise(0),
		const AAMDNodes &	AAInfo = AAMDNodes() )

Creates a MemIntrinsicNode that may produce a result and takes a list of operands.

Opcode may be INTRINSIC_VOID, INTRINSIC_W_CHAIN, or a target-specific memory-referencing opcode

Definition at line 10559 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getMachineFunction(), getMemIntrinsicNode(), llvm::EVT::getStoreSize(), llvm::LocationSize::precise(), and Size.

Referenced by llvm::X86TargetLowering::BuildFILD(), combineBitcast(), combineBVZEXTLOAD(), combineMaskedStore(), combinePackingMovIntoStore(), combineStore(), combineTargetShuffle(), CombineVLDDUP(), combineX86CloadCstore(), createLoadLR(), createSetFPEnvNodes(), createStoreLR(), EltsFromConsecutiveLoads(), EmitMaskedTruncSStore(), llvm::RISCVSelectionDAGInfo::EmitTargetCodeForMemset(), EmitTruncSStore(), EmitUnrolledSetTag(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), getAVX2GatherNode(), getBROADCAST_LOAD(), getGatherNode(), getMemIntrinsicNode(), getMemIntrinsicNode(), getMemIntrinsicNode(), getScatterNode(), LowerATOMIC_STORE(), lowerAtomicArithWithLOCK(), llvm::SparcTargetLowering::LowerBSWAP(), lowerBuildVectorAsBroadcast(), LowerCMP_SWAP(), lowerFixedVectorSegLoadIntrinsics(), lowerFixedVectorSegStoreIntrinsics(), LowerINTRINSIC_W_CHAIN(), LowerMGATHER(), LowerMSCATTER(), lowerMSTORE(), LowerNTStore(), llvm::RISCVTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperationWrapper(), lowerShuffleAsBroadcast(), LowerStore(), lowerSTOREVector(), lowerTcgen05Ld(), lowerTcgen05LdRed(), LowerTcgen05MMADisableOutputLane(), lowerTcgen05St(), lowerUINT_TO_FP_vXi32(), narrowLoadToVZLoad(), llvm::SparcTargetLowering::PerformBSWAPCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), PerformMVEVLDCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), llvm::SparcTargetLowering::PerformSTORECombine(), PerformVDUPCombine(), performVectorDeinterleaveCombine(), replaceAtomicSwap128(), ReplaceINTRINSIC_W_CHAIN(), replaceLoadVector(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), TryCombineBaseUpdate(), tryLowerMultiVectorStore(), tryMemPairCombine(), llvm::X86TargetLowering::visitMaskedLoad(), and llvm::X86TargetLowering::visitMaskedStore().

getMemIntrinsicNode() [4/4]

SDValue llvm::SelectionDAG::getMemIntrinsicNode ( unsigned Opcode, const SDLoc & dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, MaybeAlign Alignment = std::nullopt, MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore, LocationSize Size = LocationSize::precise(0), const AAMDNodes & AAInfo = AAMDNodes() )

inline

Definition at line 1413 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, getEVTAlign(), getMemIntrinsicNode(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, llvm::LocationSize::precise(), and Size.

getMemmove()

SDValue SelectionDAG::getMemmove	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		Align	DstAlign,
		Align	SrcAlign,
		bool	isVol,
		const CallInst *	CI,
		std::optional< bool >	OverrideTailCall,
		MachinePointerInfo	DstPtrInfo,
		MachinePointerInfo	SrcPtrInfo,
		const AAMDNodes &	AAInfo = AAMDNodes(),
		BatchAAResults *	BatchAA = nullptr )

Definition at line 10216 of file SelectionDAG.cpp.

References checkAddrSpaceIsValidForLibcall(), llvm::dyn_cast(), llvm::MachinePointerInfo::getAddrSpace(), getContext(), getDataLayout(), getExternalSymbol(), getMemmoveLoadsAndStores(), llvm::PointerType::getUnqual(), llvm::ConstantSDNode::getZExtValue(), hasSwiftErrorArg(), isInTailCallPositionWrapper(), llvm::ConstantSDNode::isZero(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setDiscardResult(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and Size.

getMemset()

SDValue SelectionDAG::getMemset	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		SDValue	Size,
		Align	Alignment,
		bool	isVol,
		bool	AlwaysInline,
		const CallInst *	CI,
		MachinePointerInfo	DstPtrInfo,
		const AAMDNodes &	AAInfo = AAMDNodes() )

Definition at line 10329 of file SelectionDAG.cpp.

References assert(), checkAddrSpaceIsValidForLibcall(), DL, llvm::dyn_cast(), llvm::funcReturnsFirstArgOfCall(), llvm::MachinePointerInfo::getAddrSpace(), getContext(), getDataLayout(), getExternalSymbol(), getMemsetStores(), getTarget(), llvm::PointerType::getUnqual(), llvm::Type::getVoidTy(), llvm::ConstantSDNode::getZExtValue(), hasSwiftErrorArg(), llvm::isInTailCallPosition(), llvm::isNullConstant(), llvm::CallInst::isTailCall(), llvm::ConstantSDNode::isZero(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setDiscardResult(), llvm::TargetLowering::CallLoweringInfo::setLibCallee(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and Size.

Referenced by emitConstantSizeRepstos().

getMergeValues()

SDValue SelectionDAG::getMergeValues	(	ArrayRef< SDValue >	Ops,
		const SDLoc &	dl )

Create a MERGE_VALUES node from the given operands.

getMergeValues - Create a MERGE_VALUES node from the given operands.

Definition at line 10539 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, getNode(), getVTList(), llvm::ISD::MERGE_VALUES, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::SmallVectorImpl< T >::reserve().

Referenced by combineAtomicLoad(), combineFP_EXTEND(), combineFP_ROUND(), combineVectorCompareAndMaskUnaryOp(), combineX86AddSub(), combineX86SubCmpForFlags(), combineX86XOR(), constructRetValue(), emitIntrinsicWithChainErrorMessage(), llvm::AArch64SelectionDAGInfo::EmitStreamingCompatibleMemLibCall(), FixupMMXIntrinsicTypes(), getAVX2GatherNode(), getErrorMergeValues(), getGatherNode(), getVCIXISDNodeWCHAIN(), LowerADDSUBO_CARRY(), lowerADDSUBO_CARRY(), llvm::VETargetLowering::lowerATOMIC_SWAP(), llvm::AMDGPUTargetLowering::LowerDIVREMToFloat(), lowerDSPIntr(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), LowerF128Load(), lowerFixedVectorSegLoadIntrinsics(), llvm::SITargetLowering::LowerFormalArguments(), LowerFP16_TO_FP(), LowerFP_TO_FP16(), llvm::SITargetLowering::lowerGET_FPENV(), llvm::SITargetLowering::lowerGET_ROUNDING(), LowerI64IntToFP16(), LowerI64IntToFP_AVX512DQ(), lowerINT_TO_FP_vXi64(), LowerINTRINSIC_W_CHAIN(), lowerIntrinsicWChain(), llvm::HexagonTargetLowering::LowerLoad(), LowerLoad(), llvm::MipsTargetLowering::lowerLOAD(), lowerLoadF128(), lowerLOADi1(), lowerLoadI1(), lowerLoadVector(), LowerMGATHER(), LowerMLOAD(), LowerMLOAD(), LowerMULO(), llvm::ARMTargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), lowerPredicateInterleaveWithPackedVectors(), LowerPredicateLoad(), LowerREADCYCLECOUNTER(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerShiftParts(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerSTACKADDRESS(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), llvm::SITargetLowering::LowerSTACKSAVE(), llvm::HexagonTargetLowering::LowerUAddSubO(), llvm::HexagonTargetLowering::LowerUAddSubOCarry(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), LowerUINT_TO_FP_i32(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(), LowerVSETCC(), LowerXALUO(), llvm::RISCVTargetLowering::PerformDAGCombine(), performGatherLoadCombine(), performLD1Combine(), performLD1ReplicateCombine(), performLDNT1Combine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PerformLongShiftCombine(), performMaskedLoadToVPLoadCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), performRNDRCombine(), PerformSplittingMVEEXTToWideningLoad(), PerformVMOVRRDCombine(), SplitStrictFPVectorOp(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), tryLowerSmallVectorExtLoad(), tryMemPairCombine(), UnrollVectorOp(), llvm::SystemZTargetLowering::useLibCall(), llvm::AMDGPUTargetLowering::WidenOrSplitVectorLoad(), and widenVectorOpsToi8().

getMFAM()

MachineFunctionAnalysisManager * llvm::SelectionDAG::getMFAM ( )

inline

Definition at line 478 of file SelectionDAG.h.

getMMI()

MachineModuleInfo * llvm::SelectionDAG::getMMI ( ) const

inline

Definition at line 507 of file SelectionDAG.h.

getMMRAMetadata()

MDNode * llvm::SelectionDAG::getMMRAMetadata ( const SDNode * Node ) const

inline

Return the MMRA MDNode associated with Node, or nullptr if none exists.

Definition at line 2657 of file SelectionDAG.h.

getNegative()

SDValue SelectionDAG::getNegative	(	SDValue	Val,
		const SDLoc &	DL,
		EVT	VT )

Create negative operation as (SUB 0, Val).

Definition at line 1680 of file SelectionDAG.cpp.

References DL, getConstant(), getNode(), and llvm::ISD::SUB.

Referenced by combineAdd(), combineAddOfBooleanXor(), combineAddOrSubToADCOrSBB(), combineAnd(), combineMul(), combineSelectToBinOp(), combineSetCC(), combineVECREDUCE_LOGIC(), convertMulToShlAdd(), llvm::TargetLowering::expandABS(), llvm::TargetLowering::expandFunnelShift(), llvm::TargetLowering::expandLoopDependenceMask(), getPartialReduceMLS(), LowerABS(), lowerAtomicArith(), LowerCTTZ(), LowerRotate(), lowerSelectToBinOp(), LowerSELECTWithCmpZero(), LowerShift(), matchGenericOp(), performAddWithSBCCombine(), performCONCAT_VECTORSCombine(), performCTPOPCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performNegCMovCombine(), performNegCSelCombine(), performNegSignMaskedAndCombine(), performSIGN_EXTEND_INREGCombine(), performVECTOR_SHUFFLECombine(), and performVSELECTCombine().

getNode() [1/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		ArrayRef< EVT >	ResultTys,
		ArrayRef< SDValue >	Ops )

Definition at line 12030 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, getNode(), and getVTList().

getNode() [2/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		ArrayRef< EVT >	ResultTys,
		ArrayRef< SDValue >	Ops,
		const SDNodeFlags	Flags )

Definition at line 12038 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, getNode(), and getVTList().

getNode() [3/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT )

Gets or creates the specified node.

Definition at line 7035 of file SelectionDAG.cpp.

References AddNodeIDNode(), DL, getVTList(), N, NewSDValueDbgMsg(), and SDValue().

getNode() [4/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		ArrayRef< SDUse >	Ops )

Gets or creates the specified node.

Definition at line 11903 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, llvm::get(), and getNode().

Referenced by addBitcastHints(), AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64BitSMLAL16(), AddCombineTo64bitUMAAL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), addIPMSequence(), AddRequiredExtensionForVMULL(), addShuffleForVecExtend(), llvm::AMDGPUTargetLowering::addTokenForArgument(), adjustBitcastSrcVectorSSE1(), adjustForTestUnderMask(), adjustICmp128(), AdjustLength(), adjustLoadValueTypeImpl(), llvm::TargetLowering::annotateStackObjectPointer(), buildCallOperands(), BuildExactSDIV(), BuildExactUDIV(), buildFromShuffleMostly(), BuildIntrinsicOp(), BuildIntrinsicOp(), BuildIntrinsicOp(), buildMergeScalars(), buildPCRelGlobalAddress(), llvm::SITargetLowering::buildRSRC(), buildScalarToVector(), llvm::TargetLowering::BuildSDIV(), llvm::PPCTargetLowering::BuildSDIVPow2(), llvm::TargetLowering::buildSDIVPow2WithCMov(), buildTreeReduction(), llvm::TargetLowering::BuildUDIV(), BuildVectorFromScalar(), BuildVSLDOI(), canonicalizeBitSelect(), canonicalizeBoolMask(), canonicalizeLaneShuffleWithRepeatedOps(), canonicalizeMaskForVLPredicate(), canonicalizeShuffleMaskWithHorizOp(), canonicalizeShuffleVectorByLane(), canonicalizeShuffleWithOp(), canonicalizeVSelectTrueToOneUse(), carryFlagToValue(), carryFlagToValue(), chainLoadsAndStoresForMemcpy(), llvm::AArch64TargetLowering::changeStreamingMode(), checkIntrinsicImmArg(), checkSignTestSetCCCombine(), clampDynamicVectorIndex(), coerceLoadedValue(), coerceStoredValue(), CollectOpsToWiden(), combine_CC(), combine_CC(), combineAcrossLanesIntrinsic(), combineADC(), combineAdd(), combineAddMulh(), combineAddOfPMADDWD(), combineAddOrSubToADCOrSBB(), combineADDToADDZE(), combineADDToMAT_PCREL_ADDR(), combineADDToSUB(), combineADDX(), combineADOX(), combineAnd(), combineAndLoadToBZHI(), combineAndMaskToShift(), combineAndNotIntoANDNP(), combineAndNotIntoVANDN(), combineAndNotOrIntoAndNotAnd(), combineAndnp(), combineANDOfSETCCToCZERO(), combineAndOnGF2P8AFFINEQBOperand(), combineAndOrForCcmpCtest(), CombineANDShift(), combineAndShuffleNot(), combineAndXorSubWithBMI(), combineArithReduction(), combineAVG(), combineAVX512SetCCToKMOV(), combineBasicSADPattern(), combineBinOpOfExtractToReduceTree(), combineBinOpOfZExt(), combineBinOpToReduce(), combineBitcast(), combineBitcastToBoolVector(), combineBitcastvxi1(), combineBitOpWithMOVMSK(), combineBitOpWithPACK(), combineBitOpWithShift(), combineBrCond(), combineBTToBitOpFlag(), combineCarryDiamond(), combineCarryThroughADD(), combineCastedMaskArithmetic(), combineCMov(), combineCMP(), combineCommutableSHUFP(), combineCompareEqual(), combineConcatVectorOfCasts(), combineConcatVectorOfConcatVectors(), combineConcatVectorOfScalars(), combineConcatVectorOfShuffleAndItsOperands(), combineConcatVectorOfSplats(), combineConcatVectorOps(), combineCVTP2I_CVTTP2I(), combineCVTPH2PS(), combineDeMorganOfBoolean(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineExtractVectorElt(), combineExtractWithShuffle(), combineF16AddWithNeg(), combineFaddCFmul(), combineFAndFNotToFAndn(), combineFMA(), combineFMADDSUB(), combineFMinFMax(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacy(), llvm::AMDGPUTargetLowering::combineFMinMaxLegacyImpl(), combineFMinNumFMaxNum(), combineFMulcFCMulc(), combineFneg(), combineFP16_TO_FP(), combineFP_EXTEND(), combineFP_ROUND(), combineFP_ROUND(), combineFP_TO_xINT_SAT(), combineFPToSInt(), combineFunnelShift(), combineGatherScatter(), combineHorizOpWithShuffle(), combinei64TruncSrlConstant(), combineINSERT_SUBVECTOR(), combineIntDivRem(), combineKSHIFT(), combineLoad(), combineLogicBlendIntoConditionalNegate(), combineLRINT_LLRINT(), combineM68kBrCond(), combineMADConstOne(), combineMaskBitOp(), combineMinMaxToSat(), combineMinNumMaxNumImpl(), combineMOVMSK(), combineMul(), combineMulSelectConstOne(), combineMulSpecial(), combineMulToPMADD52(), combineMulToPMADDWD(), combineMulToPMULDQ(), combineNarrowableShiftedLoad(), combineNestedGF2P8AFFINEQB(), combineOr(), combineOrAndToBitfieldInsert(), combineOrCmpEqZeroToCtlzSrl(), combineOrOfCZERO(), combineOrOfSetCCToUSUBOCarry(), combineOrToBitfieldInsert(), combineOrWithGF2P8AFFINEQB(), combineOrXorWithSETCC(), combinePCLMULQDQ(), combinePExtTruncate(), combinePExtWideningMul(), combinePMULDQ(), combinePMULH(), combinePTESTCC(), combineRedundantDWordShuffle(), combineRotate(), combineSBB(), combineSCALAR_TO_VECTOR(), combineScalarAndWithMaskSetcc(), combineScalarMinMaxAbsStore(), combineSelect(), llvm::VETargetLowering::combineSelect(), combineSELECT_CCBitFloor(), combineSelectAndUse(), combineSelectAndUse(), combineSelectAndUse(), combineSelectAsExtAnd(), llvm::VETargetLowering::combineSelectCC(), combineSelectOfTwoConstants(), combineSelectToBinOp(), combineSelectToPseudoMinMax(), combineSetCC(), combineSetCCMOVMSK(), combineSext(), combineSextInRegCmov(), combineShiftAnd1ToBitTest(), combineShiftLeft(), combineShiftOfLogicOp(), combineShiftOfShiftedLogic(), combineShiftRightArithmetic(), combineShiftRightLogical(), combineShiftToAVG(), combineShiftToMULH(), combineShiftToPMULH(), combineShlAddIAddImpl(), combineShuffleToAddSubOrFMAddSub(), combineShuffleToAnyExtendVectorInreg(), combineShuffleToFMAddSub(), combineShuffleToZeroExtendVectorInReg(), combineSignExtendInReg(), combineSIntToFP(), combineSmallMaskReduction(), combineStore(), combineSub(), combineSubABS(), combineSubOfBoolean(), combineSubSetcc(), combineSubShiftToOrcB(), combineSUBX(), combineSVEBitSel(), combineSVEPrefetchVecBaseImmOff(), combineSVEReductionFP(), combineSVEReductionInt(), combineSVEReductionOrderedFP(), combineSZExtToMulWide(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineToExtendCMOV(), combineToFPTruncExtElt(), combineToHorizontalAddSub(), combineToVCPOP(), combineToVWMACC(), combineTruncate(), combineTruncatedArithmetic(), combineTruncateWithSat(), combineTruncOfSraSext(), combineTruncSelectToSMaxUSat(), combineTruncToVnclip(), combineUADDO_CARRYDiamond(), combineUIntToFP(), combineVdot4aAccum(), combineVECREDUCE_LOGIC(), combineVECREDUCE_MUL(), combineVectorCompareAndMaskUnaryOp(), combineVectorHADDSUB(), combineVectorInsert(), combineVectorMulToSraBitcast(), combineVectorPack(), combineVectorShiftImm(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVFMADD_VLWithVFNEG_VL(), CombineVMOVDRRCandidateWithVecOp(), combineVPDPBUSDPattern(), combineVPMADD52LH(), combineVSelectToBLENDV(), combineVSelectWithAllOnesOrZeros(), combineVTRUNC(), combineVTRUNCSAT(), combineVWADDSUBWSelect(), combineWideMaskReduction(), combineX86AddSub(), combineX86CloadCstore(), combineX86FPLogicOp(), combineX86INT_TO_FP(), combineX86ShuffleChain(), combineX86SubCmpForFlags(), combineX86XOR(), combineXor(), combineXorOnGF2P8AFFINEQBOperand(), combineXorSubCTLZ(), combineXorToBitfieldInsert(), combineXorWithGF2P8AFFINEQB(), combineXorWithTwoGF2P8AFFINEQB(), combineZext(), combineZextSetccWithZero(), CompactSwizzlableVector(), ConstantBuildVector(), constructDup(), constructRetValue(), ConvertCarryFlagToCarryValue(), ConvertCarryValueToCarryFlag(), convertFixedMaskToScalableVector(), convertFPToInt(), convertFromF16(), convertIntLogicToFPLogic(), convertIntToFP(), convertLocValType(), convertLocVTToValVT(), convertLocVTToValVT(), convertLocVTToValVT(), convertLocVTToValVT(), convertMergedOpToPredOp(), convertMulToShlAdd(), convertRMEncoding(), ConvertSelectToConcatVector(), ConvertSETCCToXori(), convertShiftLeftToScale(), convertToF16(), convertTwoLoadsAndCmpToVCMPEQUB(), convertValVTToLocVT(), convertValVTToLocVT(), convertValVTToLocVT(), convertValVTToLocVT(), correctParamType(), createCMovFP(), createFPCmp(), createLoadLR(), createMemMemNode(), createMMXBuildVector(), createPSADBW(), createSetFPEnvNodes(), createStoreLR(), createVariablePermute(), createVPDPBUSD(), llvm::TargetLowering::CTTZTableLookup(), customLegalizeToWOp(), customLegalizeToWOp(), customLegalizeToWOpWithSExt(), customLegalizeToWOpWithSExt(), CustomNonLegalBITCASTResults(), detectPMADDUBSW(), detectUSatPattern(), distributeOpThroughSelect(), DoCrossByteCLMUL(), DoubleVectorWidth(), dump(), EltsFromConsecutiveLoads(), EmitAVX512Test(), EmitCMP(), EmitCmp(), emitCmp(), emitComparison(), emitConditionalComparison(), emitConjunctionForCCMPRec(), emitConstantSizeRepmov(), emitConstantSizeRepstos(), emitFloatCompareMask(), emitIntrinsicWithCC(), emitIntrinsicWithCCAndChain(), emitMemMemReg(), llvm::AArch64SelectionDAGInfo::EmitMOPS(), emitOrXorXorTree(), emitRepmovs(), emitRepstos(), emitSETCC(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::AArch64TargetLowering::emitStackGuardMixFP(), emitStrictFPComparison(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::BPFSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemmove(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::RISCVSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::WebAssemblySelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), EmitTest(), EmitUnrolledSetTag(), emitVectorComparison(), Expand64BitShift(), llvm::TargetLowering::expandABD(), llvm::TargetLowering::expandABS(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandAVG(), expandBitCastF128ToI128(), llvm::TargetLowering::expandBITREVERSE(), llvm::TargetLowering::expandBSWAP(), ExpandBVWithShuffles(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLS(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTPOP(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandCttzElts(), expandDivFix(), expandExp(), expandExp2(), expandf64Toi32(), llvm::TargetLowering::expandFCANONICALIZE(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFMINIMUM_FMAXIMUM(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFMINNUM_FMAXNUM(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandFP_TO_UINT(), expandFP_TO_UINT_SSE(), expandFSH64(), llvm::TargetLowering::expandFunnelShift(), llvm::RISCVTargetLowering::expandIndirectJTBranch(), llvm::TargetLowering::expandIndirectJTBranch(), llvm::X86TargetLowering::expandIndirectJTBranch(), llvm::TargetLowering::expandIntMINMAX(), expandIntrinsicWChainHelper(), llvm::TargetLowering::expandIS_FPCLASS(), expandLog(), expandLog10(), expandLog2(), llvm::TargetLowering::expandLoopDependenceMask(), expandMul(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandMULO(), expandMulToAddOrSubOfShl(), expandMulToNAFSequence(), expandMulToShlAddShlAdd(), llvm::TargetLowering::expandPartialReduceMLA(), llvm::TargetLowering::expandPDEP(), llvm::TargetLowering::expandPEXT(), expandPow(), ExpandPowI(), ExpandREAD_REGISTER(), llvm::TargetLowering::expandREM(), llvm::TargetLowering::expandROT(), llvm::TargetLowering::expandRoundInexactToOdd(), llvm::TargetLowering::expandSADDSUBO(), llvm::TargetLowering::expandShiftParts(), llvm::TargetLowering::expandShlSat(), llvm::TargetLowering::expandUADDSUBO(), llvm::TargetLowering::expandUINT_TO_FP(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandV4F32ToV2F64(), expandVAArg(), llvm::TargetLowering::expandVecReduce(), llvm::TargetLowering::expandVecReduceSeq(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVectorMatch(), llvm::TargetLowering::expandVectorNaryOpBySplitting(), llvm::TargetLowering::expandVectorSplice(), llvm::TargetLowering::expandVPCTTZElements(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), ExtendSrcToDst(), ExtendToType(), ExtractBitFromMaskVector(), extractF64Exponent(), extractLOHI(), extractShiftForRotate(), extractSubVector(), fillVector(), finalizeTS1AM(), findMoreOptimalIndexType(), FixupMMXIntrinsicTypes(), foldADCToCINC(), foldAddSubBoolOfMaskedVal(), foldAddSubMasked1(), foldAddSubOfSignBit(), foldAndOrOfSETCC(), foldAndToUsubsat(), foldBinOpIntoSelectIfProfitable(), foldBinOpIntoSelectIfProfitable(), foldBitOrderCrossLogicOp(), foldBoolSelectToLogic(), FoldConstantArithmetic(), FoldConstantBuildVector(), foldCSELOfCSEL(), foldCSELofCTTZ(), foldCSELofLASTB(), foldExtendedSignBitTest(), foldExtendVectorInregToExtendOfSubvector(), foldExtractSubvectorFromShuffleVector(), foldFPToIntToFP(), llvm::AMDGPUTargetLowering::foldFreeOpFromSelect(), foldIndexIntoBase(), FoldIntToFPToInt(), foldLogicOfShifts(), foldLogicTreeOfShifts(), foldMaskAndShiftToExtract(), foldMaskAndShiftToScale(), foldMaskedMerge(), foldMaskedShiftToBEXTR(), foldMaskedShiftToScaledMask(), foldMaskedShiftToUSHL(), foldOverflowCheck(), foldReduceOperandViaVDOT4A(), foldSelectOfConstantsUsingSra(), foldSelectOfCTTZOrCTLZ(), foldSelectToUSATI(), foldSelectWithIdentityConstant(), foldSetCCWithFunnelShift(), foldSetCCWithRotate(), foldShuffleOfConcatUndefs(), foldSubCtlzNot(), foldToMaskedStore(), foldToSaturated(), foldVSelectToSignBitSplatMask(), foldXorTruncShiftIntoCmp(), llvm::TargetLowering::forceExpandMultiply(), llvm::TargetLowering::forceExpandWideMUL(), fpExtendHelper(), genConstMult(), generateComparison(), generateEquivalentSub(), GenerateFixedLengthSVETBL(), GeneratePerfectShuffle(), GeneratePerfectShuffle(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), getADAEntry(), llvm::MipsTargetLowering::getAddrGlobal(), llvm::MipsTargetLowering::getAddrGlobalLargeGOT(), llvm::MipsTargetLowering::getAddrGPRel(), llvm::MipsTargetLowering::getAddrLocal(), llvm::MipsTargetLowering::getAddrNonPIC(), llvm::MipsTargetLowering::getAddrNonPICSym64(), getAllOnesMask(), getAnyExtOrTrunc(), getAVX512Node(), getAVX512TruncNode(), getBitcast(), getBitSelect(), getBitTestCondition(), getBMIMatchingOp(), getBoolExtOrTrunc(), getBoundedStrlen(), getBT(), getBuildVector(), getBuildVector(), getBuildVectorSplat(), getCALLSEQ_END(), getCALLSEQ_START(), getCCResult(), getConstant(), getCopyFromParts(), getCopyFromPartsVector(), getCopyFromReg(), getCopyFromReg(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getCopyToReg(), getCopyToReg(), getCopyToReg(), llvm::RegsForValue::getCopyToRegs(), getCSAddressAndShifts(), getDataClassTest(), getDeinterleaveShiftAndTrunc(), llvm::MipsTargetLowering::getDllimportSymbol(), getDWordFromOffset(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getEstimate(), GetExponent(), getEXTEND_VECTOR_INREG(), GetExtendHigh(), getExtractSubvector(), getExtractVectorElt(), getExtractVectorizedValue(), getFlagsOfCmpZeroFori1(), getFLUSHW(), getFPBinOp(), getFPExtendOrRound(), getFPTernOp(), getFRAMEADDR(), getFreeze(), getGeneralPermuteNode(), getGLOBAL_OFFSET_TABLE(), llvm::AMDGPUTargetLowering::getHiHalf64(), getI128Select(), getInsertSubvector(), getInsertVectorElt(), llvm::AMDGPUTargetLowering::getIsFinite(), getJumpTableDebugInfo(), getKnownUndefForVectorBinop(), getLargeExternalSymbol(), getLargeGlobalAddress(), getLimitedPrecisionExp2(), getLoadExtOrTrunc(), getLogicalNOT(), llvm::AMDGPUTargetLowering::getLoHalf64(), getMad(), getMad64_32(), getMaskFromElementCount(), getMaskNode(), getMemBasePlusOffset(), getMemsetStores(), getMemsetStringVal(), getMemsetValue(), getMergeValues(), getMOVMSK(), getMul24(), llvm::AMDGPUTargetLowering::getNegatedExpression(), llvm::PPCTargetLowering::getNegatedExpression(), llvm::TargetLowering::getNegatedExpression(), llvm::X86TargetLowering::getNegatedExpression(), getNegative(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNode(), getNOT(), getOrderedReduction(), getPack(), getPartialReduceMLS(), getPermuteNode(), llvm::HexagonTargetLowering::getPICJumpTableRelocBase(), llvm::M68kTargetLowering::getPICJumpTableRelocBase(), llvm::PPCTargetLowering::getPICJumpTableRelocBase(), llvm::VETargetLowering::getPICJumpTableRelocBase(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), getPOISON(), getPopFromX87Reg(), getPRMT(), getPTest(), getPTrue(), getPTrueAsCounter(), llvm::AMDGPUTargetLowering::getRecipEstimate(), llvm::LoongArchTargetLowering::getRecipEstimate(), getReductionSDNode(), getRegistersForValue(), getScalarMaskingNode(), llvm::AMDGPUTargetLowering::getScaledLogInput(), getScaledOffsetForBitWidth(), getSelect(), getSelectCC(), getSETCC(), getSETCC(), getSETCC(), getSExtOrTrunc(), getShlAddShlAdd(), getShuffleHalfVectors(), getShuffleReduction(), GetSignificand(), getSplatBuildVector(), getSplatVector(), llvm::AMDGPUTargetLowering::getSqrtEstimate(), llvm::LoongArchTargetLowering::getSqrtEstimate(), llvm::NVPTXTargetLowering::getSqrtEstimate(), llvm::TargetLowering::getSqrtInputTest(), getStackArgumentTokenFactor(), getStepVector(), getSToVPermuted(), getStrictFPExtendOrRound(), getSVEPredicateBitCast(), getTargetVShiftByConstNode(), getTargetVShiftNode(), GetTLSADDR(), getTokenFactor(), getTruncatedUSUBSAT(), getUNDEF(), getv64i1Argument(), getVAArg(), getVCIXISDNodeVOID(), getVCIXISDNodeWCHAIN(), getVectorBitwiseReduce(), getVectorMaskingNode(), getVectorShuffle(), llvm::TargetLowering::getVectorSubVecPointer(), getVScale(), getVShift(), getVSlidedown(), getVSlideup(), getWideningInterleave(), getWideningSpread(), getX86XALUOOp(), getZeroExtendInReg(), getZeroPaddedAdd(), getZeroVector(), getZExtOrTrunc(), getzOSCalleeAndADA(), handleCMSEValue(), HandleMergeInputChains(), llvm::TargetLowering::IncrementMemoryAddress(), initAccumulator(), insert1BitVector(), InsertBitToMaskVector(), isFNEG(), isFusableLoadOpStorePattern(), isFusableLoadOpStorePattern(), IsNOT(), isNOT(), isSpecificZeroAfterMaybeRounding(), isUpperSubvectorUndef(), joinDwords(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), legalizeIntrinsicImmArg(), legalizeScatterGatherIndexType(), llvm::TargetLowering::LegalizeSetCCCondCode(), legalizeSVEGatherPrefetchOffsVec(), llvm::AMDGPUTargetLowering::loadInputValue(), lower1BitShuffle(), lower1BitShuffleAsKSHIFTR(), LowerABD(), LowerABS(), LowerADDRSPACECAST(), LowerADDRSPACECAST(), lowerAddrSpaceCast(), LowerADDSAT_SUBSAT(), LowerADDSUBO_CARRY(), LowerADDSUBO_CARRY(), lowerADDSUBO_CARRY(), LowerADDSUBSAT(), lowerAddSubToHorizontalOp(), LowerAndToBT(), llvm::X86TargetLowering::LowerAsmOutputForConstraint(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), llvm::VETargetLowering::lowerATOMIC_FENCE(), LowerATOMIC_STORE(), llvm::VETargetLowering::lowerATOMIC_SWAP(), lowerAtomicArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), lowerBALLOTIntrinsic(), LowerBITCAST(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), lowerBitreverseShuffle(), llvm::HexagonTargetLowering::LowerBlockAddress(), llvm::LanaiTargetLowering::LowerBlockAddress(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::LanaiTargetLowering::LowerBR_CC(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), LowerBRCOND(), lowerBSWAP(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), lowerBUILD_VECTOR(), LowerBUILD_VECTOR_i1(), lowerBUILD_VECTORAsBroadCastLoad(), LowerBUILD_VECTORToVIDUP(), LowerBUILD_VECTORvXbf16(), LowerBUILD_VECTORvXi1(), lowerBuildVectorAsBroadcast(), LowerBuildVectorAsInsert(), lowerBuildVectorOfConstants(), LowerBuildVectorOfFPExt(), LowerBuildVectorOfFPTrunc(), lowerBuildVectorToBitOp(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), lowerBuildVectorViaDominantValues(), lowerBuildVectorViaPacking(), lowerBuildVectorViaVID(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SITargetLowering::LowerCallResult(), LowerCallResult(), lowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCLMUL(), LowerClusterLaunchControlQueryCancel(), LowerCMP_SWAP(), llvm::TargetLowering::lowerCmpEqZeroToCtlzSrl(), llvm::AMDGPUTargetLowering::LowerCONCAT_VECTORS(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS_i1(), LowerCONCAT_VECTORSvXi1(), llvm::HexagonTargetLowering::LowerConstantPool(), llvm::LanaiTargetLowering::LowerConstantPool(), LowerConvertLow(), llvm::AMDGPUTargetLowering::LowerCTLS(), LowerCTLZ(), llvm::AMDGPUTargetLowering::LowerCTLZ_CTTZ(), lowerCTLZCTPOP(), llvm::AMDGPUTargetLowering::lowerCTLZResults(), LowerCTPOP(), LowerCTPOP(), LowerCTTZ(), LowerCTTZ(), lowerCttzElts(), LowerCVTPS2PH(), lowerCvtRSIntrinsics(), lowerDisjointIndicesShuffle(), llvm::AMDGPUTargetLowering::LowerDIVREMToFloat(), lowerDSPIntr(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::VETargetLowering::lowerEH_SJLJ_LONGJMP(), llvm::VETargetLowering::lowerEH_SJLJ_SETJMP(), llvm::VETargetLowering::lowerEH_SJLJ_SETUP_DISPATCH(), LowerEXTEND_VECTOR_INREG(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT(), llvm::VETargetLowering::lowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_i1(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), LowerF128Store(), LowerF64Op(), llvm::AMDGPUTargetLowering::LowerF64ToF16Safe(), LowerFABSorFNEG(), lowerFABSorFNEG(), llvm::AMDGPUTargetLowering::LowerFCEIL(), lowerFCMPIntrinsic(), LowerFCOPYSIGN(), lowerFCOPYSIGN(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), llvm::AMDGPUTargetLowering::lowerFEXP(), llvm::AMDGPUTargetLowering::lowerFEXP10Unsafe(), llvm::AMDGPUTargetLowering::lowerFEXP2(), llvm::AMDGPUTargetLowering::lowerFEXPF64(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafe(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafeImpl(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), LowerFGETSIGN(), lowerFixedVectorSegLoadIntrinsics(), lowerFixedVectorSegStoreIntrinsics(), LowerFLDEXP(), LowerFLDEXP(), llvm::AMDGPUTargetLowering::LowerFLOG2(), llvm::AMDGPUTargetLowering::LowerFLOGCommon(), llvm::AMDGPUTargetLowering::LowerFLOGUnsafe(), lowerFMAXIMUM_FMINIMUM(), llvm::HexagonTargetLowering::LowerFMINFMAX(), LowerFMINIMUM_FMAXIMUM(), llvm::AMDGPUTargetLowering::LowerFNEARBYINT(), LowerFNEGorFABS(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFP16_TO_FP(), llvm::SITargetLowering::lowerFP_EXTEND(), llvm::AMDGPUTargetLowering::LowerFP_TO_FP16(), LowerFP_TO_FP16(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT(), lowerFP_TO_INT(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT64(), llvm::AMDGPUTargetLowering::LowerFP_TO_INT_SAT(), LowerFP_TO_INT_SAT(), lowerFP_TO_INT_SAT(), LowerFP_TO_SINT(), lowerFP_TO_SINT_STORE(), lowerFPToIntToFP(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), lowerFREM(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerFROUND(), LowerFROUND(), llvm::AMDGPUTargetLowering::LowerFROUNDEVEN(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), lowerFTRUNC_FCEIL_FFLOOR_FROUND(), LowerFunnelShift(), LowerFunnelShift(), llvm::SITargetLowering::lowerGET_FPENV(), llvm::SITargetLowering::lowerGET_ROUNDING(), lowerGetVectorLength(), llvm::HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), lowerGR128Binary(), lowerGR128ToI128(), LowerHorizontalByteSum(), lowerI128ToGR128(), LowerI64IntToFP16(), LowerI64IntToFP_AVX512DQ(), lowerICMPIntrinsic(), llvm::VETargetLowering::lowerINSERT_VECTOR_ELT(), LowerINSERT_VECTOR_ELT_i1(), lowerINT_TO_FP(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP16(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP64(), lowerINT_TO_FP_vXi64(), LowerInterruptReturn(), lowerIntNeonIntrinsic(), llvm::HexagonTargetLowering::LowerINTRINSIC_VOID(), LowerINTRINSIC_W_CHAIN(), llvm::HexagonTargetLowering::LowerINTRINSIC_WO_CHAIN(), llvm::VETargetLowering::lowerINTRINSIC_WO_CHAIN(), llvm::HexagonTargetLowering::LowerJumpTable(), llvm::LanaiTargetLowering::LowerJumpTable(), llvm::MSP430TargetLowering::LowerJumpTable(), LowerLabelRef(), lowerLaneOp(), LowerLoad(), llvm::MipsTargetLowering::lowerLOAD(), lowerLoadF128(), lowerLOADi1(), lowerLoadI1(), lowerMasksToReg(), LowerMemOpCallTo(), LowerMGATHER(), LowerMINMAX(), LowerMINMAX_REDUCE(), LowerMLOAD(), LowerMLOAD(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatZExt(), lowerMSAStoreIntr(), LowerMSCATTER(), lowerMSTORE(), llvm::LanaiTargetLowering::LowerMUL(), LowerMUL(), LowerMUL(), lowerMUL_LOHI32(), LowerMULH(), LowerMULO(), llvm::AArch64TargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::R600TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperationWrapper(), lowerOverflowArithmetic(), LowerPARITY(), lowerPredCounterWhile(), lowerPredicateInterleaveWithPackedVectors(), LowerPredicateLoad(), LowerPredicateStore(), llvm::HexagonTargetLowering::LowerPREFETCH(), LowerPREFETCH(), LowerPREFETCH(), lowerPZExt(), lowerReductionSeq(), lowerRegToMasks(), llvm::AMDGPUTargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::LoongArchTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::RISCVTargetLowering::LowerReturn(), llvm::SITargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::VETargetLowering::LowerReturn(), llvm::XtensaTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::HexagonTargetLowering::LowerRETURNADDR(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), lowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLE(), LowerRotate(), LowerSaturatingConditional(), LowerSCALAR_TO_VECTOR(), lowerScalarInsert(), lowerScalarSplat(), LowerSDIV(), LowerSDIV_v4i16(), LowerSDIV_v4i8(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), lowerSELECT(), llvm::LanaiTargetLowering::LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), lowerSelectToBinOp(), LowerSELECTWithCmpZero(), llvm::SITargetLowering::lowerSET_FPENV(), llvm::SITargetLowering::lowerSET_ROUNDING(), llvm::LanaiTargetLowering::LowerSETCC(), llvm::MSP430TargetLowering::LowerSETCC(), LowerSETCCCARRY(), LowerShift(), LowerShift(), LowerShiftByScalarImmediate(), LowerShiftByScalarVariable(), llvm::MSP430TargetLowering::LowerShifts(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), lowerShuffleAsBitMask(), lowerShuffleAsBitRotate(), lowerShuffleAsBlend(), lowerShuffleAsBlendOfPSHUFBs(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsByteShiftMask(), lowerShuffleAsDecomposedShuffleMerge(), lowerShuffleAsElementInsertion(), lowerShuffleAsInsertPS(), lowerShuffleAsLanePermuteAndSHUFP(), lowerShuffleAsPermuteAndUnpack(), lowerShuffleAsShift(), lowerShuffleAsSpecificExtension(), lowerShuffleAsTruncBroadcast(), lowerShuffleAsUNPCKAndPermute(), lowerShuffleAsVALIGN(), lowerShuffleAsVTRUNC(), lowerShuffleAsVTRUNCAndUnpack(), lowerShuffleAsZeroOrAnyExtend(), lowerShuffleOfExtractsAsVperm(), lowerShufflePairAsUNPCKAndPermute(), lowerShuffleWithEXPAND(), lowerShuffleWithPACK(), lowerShuffleWithPERMV(), lowerShuffleWithPSHUFB(), lowerShuffleWithSHUFPD(), lowerShuffleWithSHUFPS(), lowerShuffleWithSSE4A(), lowerShuffleWithUndefHalf(), lowerShuffleWithUNPCK(), lowerShuffleWithUNPCK256(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSIGN_EXTEND(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerSIGN_EXTEND_Mask(), llvm::AMDGPUTargetLowering::LowerSINT_TO_FP(), LowerSINT_TO_FP(), LowerSMELdrStr(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerSTACKADDRESS(), llvm::NVPTXTargetLowering::LowerSTACKRESTORE(), llvm::NVPTXTargetLowering::LowerSTACKSAVE(), llvm::SITargetLowering::LowerSTACKSAVE(), lowerStAsyncRelease(), lowerStAsyncWithMbarrier(), LowerSTORE(), LowerStore(), lowerStoreF128(), lowerStoreI1(), lowerSTOREVector(), LowerSVEIntrinsicDUP(), LowerSVEIntrinsicEXT(), LowerSVEIntrinsicIndex(), lowerTcgen05Ld(), lowerTcgen05LdRed(), LowerTcgen05MMADisableOutputLane(), lowerTcgen05St(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::VETargetLowering::lowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerToTLSLocalDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), LowerTruncate(), LowerTruncatei1(), LowerTruncateVecI1(), LowerTruncateVecPack(), LowerTruncateVectorStore(), llvm::HexagonTargetLowering::LowerUAddSubO(), llvm::HexagonTargetLowering::LowerUAddSubOCarry(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), llvm::AMDGPUTargetLowering::LowerUINT_TO_FP(), LowerUINT_TO_FP_i32(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), lowerV16F32Shuffle(), lowerV16I32Shuffle(), lowerV16I8Shuffle(), lowerV2F64Shuffle(), lowerV2I64Shuffle(), lowerV2X128Shuffle(), lowerV4F32Shuffle(), lowerV4F64Shuffle(), lowerV4I32Shuffle(), lowerV4I64Shuffle(), lowerV4X128Shuffle(), lowerV8F32Shuffle(), lowerV8F64Shuffle(), lowerV8I16GeneralSingleInputShuffle(), lowerV8I16Shuffle(), lowerV8I32Shuffle(), lowerV8I64Shuffle(), LowerVAARG(), llvm::VETargetLowering::lowerVAARG(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), llvm::VETargetLowering::lowerVASTART(), LowerVECREDUCE(), LowerVecReduce(), LowerVecReduceMinMax(), lowerVECTOR_COMPRESS(), llvm::HexagonTargetLowering::LowerVECTOR_SHIFT(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE_i1(), lowerVECTOR_SHUFFLE_ILVEV(), lowerVECTOR_SHUFFLE_ILVL(), lowerVECTOR_SHUFFLE_ILVOD(), lowerVECTOR_SHUFFLE_ILVR(), lowerVECTOR_SHUFFLE_IsReverse(), lowerVECTOR_SHUFFLE_PCKEV(), lowerVECTOR_SHUFFLE_PCKOD(), lowerVECTOR_SHUFFLE_SHF(), lowerVECTOR_SHUFFLE_VEXTRINS(), lowerVECTOR_SHUFFLE_VILVH(), lowerVECTOR_SHUFFLE_VILVL(), lowerVECTOR_SHUFFLE_VPACKEV(), lowerVECTOR_SHUFFLE_VPACKOD(), lowerVECTOR_SHUFFLE_VPERMI(), lowerVECTOR_SHUFFLE_VPICKEV(), lowerVECTOR_SHUFFLE_VPICKOD(), lowerVECTOR_SHUFFLE_VREPLVEI(), lowerVECTOR_SHUFFLE_VSHF(), lowerVECTOR_SHUFFLE_VSHUF(), lowerVECTOR_SHUFFLE_VSHUF4I(), lowerVECTOR_SHUFFLE_XVEXTRINS(), lowerVECTOR_SHUFFLE_XVILVH(), lowerVECTOR_SHUFFLE_XVILVL(), lowerVECTOR_SHUFFLE_XVINSVE0(), lowerVECTOR_SHUFFLE_XVPERM(), lowerVECTOR_SHUFFLE_XVPERMI(), lowerVECTOR_SHUFFLE_XVPICKEV(), lowerVECTOR_SHUFFLE_XVPICKOD(), lowerVECTOR_SHUFFLE_XVREPLVEI(), lowerVECTOR_SHUFFLE_XVSHUF(), lowerVECTOR_SHUFFLE_XVSHUF4I(), lowerVECTOR_SHUFFLEAsByteRotate(), lowerVECTOR_SHUFFLEAsPPair(), lowerVECTOR_SHUFFLEAsPUnzip(), lowerVECTOR_SHUFFLEAsPZip(), lowerVECTOR_SHUFFLEAsRotate(), lowerVECTOR_SHUFFLEAsRV32PNarrowingShift(), lowerVECTOR_SHUFFLEAsShift(), lowerVECTOR_SHUFFLEAsVRGatherVX(), lowerVECTOR_SHUFFLEAsVSlide1(), lowerVECTOR_SHUFFLEAsVSlideup(), lowerVECTOR_SHUFFLEAsZeroOrAnyExtend(), LowerVECTOR_SHUFFLEUsingMovs(), LowerVECTOR_SHUFFLEUsingOneOff(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorAllEqual(), LowerVectorArith(), lowerVectorBitClear(), lowerVectorBitClearImm(), lowerVectorBitRevImm(), lowerVectorBitSetImm(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), LowerVectorCTPOPInRegLUT(), LowerVectorExtend(), LowerVectorFP_TO_INT(), lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(), LowerVectorINT_TO_FP(), lowerVectorIntrinsicScalars(), LowerVectorMatch(), lowerVectorPickVE2GR(), lowerVectorSplatImm(), lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND(), lowerVectorXRINT_XROUND(), LowerVSETCC(), LowerVSETCC(), LowerVSETCCWithSUBUS(), LowervXi8MulWithUNPCK(), lowerWaveShuffle(), LowerWRITE_REGISTER(), lowerX86CmpEqZeroToCtlzSrl(), LowerXALUO(), LowerXALUO(), LowerZERO_EXTEND_Mask(), lowerZvzipVPAIR(), lowerZvzipVUNZIP(), lowerZvzipVZIP(), llvm::SparcTargetLowering::makeAddress(), llvm::VETargetLowering::makeAddress(), makeEquivalentMemoryOrdering(), llvm::SparcTargetLowering::makeHiLoPair(), llvm::VETargetLowering::makeHiLoPair(), matchBSwapHWordOrAndAnd(), matchMergedBFX(), matchPERM(), matchPMADDWD(), matchPMADDWD_2(), matchSplatAsGather(), matchTruncateWithPACK(), MatchVectorAllEqualTest(), MergeBlocksConvert(), mergeHighParts(), moveBelowOrigChain(), narrowBitOpRMW(), narrowExtractedVectorBinOp(), narrowIndex(), narrowInsertExtractVectorBinOp(), narrowVectorSelect(), optimizeBitTest(), optimizeBrk(), optimizeLogicalImm(), optimizeLogicalImm(), overflowFlagToValue(), overflowFlagToValue(), packImage16bitOpsToDwords(), partitionShuffleOfConcats(), llvm::SITargetLowering::passSpecialInputs(), performActiveLaneMaskCombine(), performAddAddCombine(), performADDCombine(), performADDCombine(), performAddCombineForShiftedOperands(), performAddCombineSubShift(), PerformADDCombineWithOperands(), performAddCSelIntoCSinc(), PerformAddcSubcCombine(), performAddDotCombine(), PerformAddeSubeCombine(), performAddMulZextCombine(), performAddSubCarryCombine(), performAddSubIntoVectorOp(), performAddSubLongCombine(), performAddTruncShiftCombine(), performAddUADDVCombine(), PerformADDVecReduce(), performAddWithSBCCombine(), PerformANDCombine(), performANDCombine(), performANDCombine(), performANDCombine(), performANDCombine(), performANDORCSELCombine(), performANDORDUPNOTCombine(), performANDSCombine(), performANDSETCCCombine(), performAnyAllCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::performAssertSZExtCombine(), PerformBFICombine(), PerformBITCASTCombine(), performBITCASTCombine(), performBitcastCombine(), performBitmaskCombine(), performBITREV_WCombine(), performBITREVERSECombine(), performBR_CCCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), performBRCONDCombine(), performBSPExpandForSVE(), llvm::SparcTargetLowering::PerformBSWAPCombine(), PerformBUILD_VECTORCombine(), performBUILD_VECTORCombine(), performBuildShuffleExtendCombine(), performBuildVectorCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), performCMovFPCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performCONDCombine(), performConvertFPCombine(), performCSELCombine(), PerformCSETCombine(), performCTLZCombine(), performCTPOPCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::HexagonTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), performDivRemCombine(), performDSPShiftCombine(), performDUPCombine(), performDupLane128Combine(), performExtBinopLoadFold(), PerformExtendCombine(), performEXTENDCombine(), performExtendCombine(), performExtendDuplaneTruncCombine(), PerformEXTRACTCombine(), PerformExtractEltCombine(), PerformExtractEltToVMOVRRD(), performExtractLastActiveCombine(), performExtractSubvectorCombine(), performExtractVectorEltCombine(), llvm::AMDGPUTargetLowering::performFAbsCombine(), performFADDCombine(), PerformFADDVCMLACombine(), PerformFAddVSelectCombine(), performFlagSettingCombine(), PerformFMinMaxCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFP_TO_INT_SATCombine(), performFP_TO_INTCombine(), performFP_TO_INTCombine(), performFP_TO_UINTCombine(), performFPExtendCombine(), performGatherLoadCombine(), performGLD1Combine(), performGlobalAddressCombine(), performHorizWideningCombine(), PerformHWLoopCombine(), performINSERT_VECTOR_ELTCombine(), PerformInsertEltCombine(), PerformInsertSubvectorCombine(), performInsertSubvectorCombine(), performInsertVectorEltCombine(), performINTRINSIC_WO_CHAINCombine(), llvm::ARMTargetLowering::PerformIntrinsicCombine(), performIntrinsicCombine(), performIntToFpCombine(), performLD1Combine(), performLD1ReplicateCombine(), performLDNT1Combine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PerformLongShiftCombine(), performMADD_MSUBCombine(), performMaskedLoadToVPLoadCombine(), PerformMinMaxCombine(), performMINMAXCombine(), PerformMinMaxFpToSatCombine(), PerformMinMaxToSatCombine(), PerformMULCombine(), performMULCombine(), llvm::AMDGPUTargetLowering::performMulCombine(), performMulCombine(), performMulCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), llvm::AMDGPUTargetLowering::performMulLoHiCombine(), performMulRdsvlCombine(), performMulVectorCmpZeroCombine(), performMulVectorExtendCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), llvm::ARMTargetLowering::PerformMVETruncCombine(), PerformMVEVMULLCombine(), performNanGuardFpToSatCombine(), performNegCMovCombine(), performNegCSelCombine(), performNegSignMaskedAndCombine(), performNVCASTCombine(), PerformORCombine(), performORCombine(), performORCombine(), performORCombine(), PerformORCombine_i1(), PerformORCombineToBFI(), PerformORCombineToShiftInsert(), PerformORCombineToSMULWBT(), performOrXorChainCombine(), PerformPREDICATE_CASTCombine(), performPTestFirstCombine(), PerformReduceShuffleCombine(), PerformREMCombine(), performReverseEVLCombine(), performRNDRCombine(), performScalarToVectorCombine(), performScatterStoreCombine(), performSELECT_CCCombine(), performSELECT_CCCombine(), PerformSELECTCombine(), performSELECTCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSelectCombine(), PerformSELECTShiftCombine(), performSETCC_BITCASTCombine(), performSetccAddFolding(), performSETCCCARRYCombine(), PerformSETCCCombine(), performSETCCCombine(), performSETCCCombine(), performSETCCCombine(), performSETCCCombine(), performSetccMergeZeroCombine(), PerformShiftCombine(), performShiftCombine(), performSHLCombine(), performSHLCombine(), performSHLCombine(), performSHLCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), PerformSHLSimplify(), PerformShuffleVMOVNCombine(), performSIGN_EXTEND_INREGCombine(), performSignExtendCombine(), PerformSignExtendInregCombine(), performSignExtendInRegCombine(), performSignExtendSetCCCombine(), performSINT_TO_FPCombine(), PerformSplittingMVEEXTToWideningLoad(), PerformSplittingMVETruncToNarrowingStores(), PerformSplittingToNarrowingStores(), PerformSplittingToWideningLoad(), performSRACombine(), performSRACombine(), llvm::AMDGPUTargetLowering::performSraCombine(), performSRLCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), performST1Combine(), performSTNT1Combine(), llvm::SparcTargetLowering::PerformSTORECombine(), PerformSTORECombine(), performSubAddMULCombine(), PerformSUBCombine(), performSUBCombine(), PerformSubCSINCCombine(), performSubsToAndsCombine(), performSubWithBorrowCombine(), performSunpkloCombine(), performSVEAndCombine(), performSVEMulAddSubCombine(), performTBZCombine(), performTRUNCATECombine(), llvm::AMDGPUTargetLowering::performTruncateCombine(), performTruncateCombine(), performTruncateCombine(), PerformTruncatingStoreCombine(), performUADDVAddCombine(), performUADDVCombine(), performUADDVZextCombine(), PerformUMinFpToSatCombine(), PerformUMLALCombine(), performUzpCombine(), performVANDNCombine(), PerformVCMPCombine(), PerformVCVTCombine(), PerformVDUPCombine(), PerformVDUPLANECombine(), PerformVECREDUCE_ADDCombine(), performVecReduceAddCntpCombine(), performVecReduceAddCombine(), performVecReduceAddCombineWithUADDLP(), performVECREDUCECombine(), PerformVECTOR_REG_CASTCombine(), PerformVECTOR_SHUFFLECombine(), performVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), performVectorExtCombine(), performVectorExtendCombine(), performVectorExtendToFPCombine(), performVectorNonNegToFPCombine(), performVectorTruncZeroCombine(), performVEXT_VLCombine(), PerformVMOVDRRCombine(), PerformVMOVhrCombine(), PerformVMOVNCombine(), PerformVMOVrhCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), PerformVMulVCTPCombine(), performVP_STORECombine(), PerformVQDMULHCombine(), PerformVQDMULHCombine(), PerformVSELECTCombine(), PerformVSELECTCombine(), performVSELECTCombine(), performVSELECTCombine(), performVSELECTCombine(), performVSelectCombine(), performVselectPowCombine(), PerformVSetCCToVCTPCombine(), performVWABDACombine(), performVWABDACombineWV(), PerformXORCombine(), performXORCombine(), performXORCombine(), performZExtDeinterleaveShuffleCombine(), performZExtUZPCombine(), prepareDescriptorIndirectCall(), prepareIndirectCall(), PrepareTailCall(), prepareTS1AM(), PromoteBinOpToF32(), promoteExtBeforeAdd(), PromoteMaskArithmetic(), PromoteMaskArithmetic(), PromoteMaskArithmetic(), PromoteMaskArithmetic(), PromoteMVEPredVector(), llvm::TargetLoweringBase::promoteTargetBoolean(), promoteToConstantPool(), promoteVCIXScalar(), promoteXINT_TO_FP(), pushAddIntoCmovOfConsts(), reassociateCSELOperandsForCSE(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReconstructShuffleWithRuntimeMask(), ReconstructTruncateFromBuildVector(), recoverFramePointer(), reduceMaskedLoadToScalarLoad(), reduceMaskedStoreToScalarStore(), reduceVMULWidth(), refineUniformBase(), ReorganizeVector(), ReplaceAddWithADDP(), ReplaceAllUsesWith(), ReplaceAllUsesWith(), ReplaceATOMIC_LOAD_128Results(), replaceAtomicSwap128(), ReplaceBITCAST(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), replaceCMP_XCHG_128Results(), ReplaceCopyFromReg_128(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), replaceLoadVector(), ReplaceLongIntrinsic(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::LoongArchTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), replaceProxyReg(), ReplaceREADCYCLECOUNTER(), ReplaceReductionResults(), replaceVecCondBranchResults(), replaceVPICKVE2GRResults(), resolveSources(), reverseZExtICmpCombine(), SaturateWidenedDIVFIX(), scalarizeBinOpOfSplats(), scalarizeExtEltFP(), scalarizeExtractedBinOp(), llvm::TargetLowering::scalarizeExtractedVectorLoad(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), scalarizeVectorStore(), llvm::TargetLowering::ShrinkDemandedConstant(), llvm::TargetLowering::ShrinkDemandedOp(), ShrinkLoadReplaceStoreWithStore(), signExtendBitcastSrcVector(), signExtendBitcastSrcVector(), simplifyAssumingCCVal(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::ARMTargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::LoongArchTargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), simplifyMul24(), llvm::TargetLowering::SimplifySetCC(), simplifySetCCIntoEq(), simplifySetCCWithCTPOP(), sinkProxyReg(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), splatPartsI64WithVL(), llvm::AMDGPUTargetLowering::split64BitValue(), SplitAndExtendv16i1(), splitAndLowerShuffle(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), llvm::SITargetLowering::splitBinaryVectorOp(), SplitEVL(), SplitOpsAndApply(), SplitScalar(), splitStores(), splitStoreSplat(), SplitStrictFPVectorOp(), llvm::SITargetLowering::splitTernaryVectorOp(), llvm::SITargetLowering::splitUnaryVectorOp(), llvm::PPCTargetLowering::splitValueIntoRegisterParts(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), llvm::AMDGPUTargetLowering::splitVector(), splitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), SplitVectorOp(), splitVectorOp(), SplitVectorReductionOp(), llvm::AMDGPUTargetLowering::SplitVectorStore(), splitVectorStore(), splitVSETCC(), llvm::AMDGPUTargetLowering::storeStackInputValue(), stripModuloOnShift(), takeInexpensiveLog2(), llvm::RISCVTargetLowering::targetShrinkDemandedConstant(), llvm::X86TargetLowering::targetShrinkDemandedConstant(), transformAddImmMulImm(), transformAddShlImm(), translateSetCCForBranch(), translateSetCCForBranch(), truncateAVX512SetCCNoBWI(), truncateScalarIntegerArg(), truncateVecElts(), truncateVecElts(), truncateVectorWithNARROW(), truncateVectorWithPACK(), truncateVectorWithPACKSS(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), tryAdvSIMDModImm321s(), tryAdvSIMDModImm64(), tryAdvSIMDModImm8(), tryAdvSIMDModImmFP(), TryCombineBaseUpdate(), tryCombineCRC32(), tryCombineExtendRShTrunc(), tryCombineFADDReductionWithZero(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineMULLWithUZP1(), tryCombineNeonFcvtFP16ToI16(), tryCombineShiftImm(), tryCombineToREV(), tryConvertSVEWideCompare(), tryDemorganOfBooleanCondition(), TryDistrubutionADDVecReduce(), tryExtendDUPToExtractHigh(), tryFoldMADwithSRL(), tryFoldSelectIntoOp(), tryFormConcatFromShuffle(), tryLowerMultiVectorLoad(), tryLowerSmallVectorExtLoad(), tryLowerToBSL(), tryLowerToSLI(), TryMULWIDECombine(), trySimplifySrlAddToRshrnb(), trySQDMULHCombine(), trySVESplat64(), trySwapVSelectOperands(), tryToConvertShuffleOfTbl2ToTbl4(), tryToFoldExtendOfConstant(), tryToFoldExtendSelectLoad(), tryToFoldExtOfAtomicLoad(), tryToFoldExtOfExtload(), tryToFoldExtOfLoad(), tryToFoldExtOfMaskedLoad(), tryToReplaceScalarFPConversionWithSVE(), tryToWidenSetCCOperands(), TryWideExtMulCombine(), unpack64(), unpackF64OnLA32DSoftABI(), unpackF64OnRV32DSoftABI(), UnpackFromArgumentSlot(), unpackGPRVecOnRV32(), UnrollVectorOp(), UnrollVectorOverflowOp(), unrollVectorShift(), valueToCarryFlag(), valueToCarryFlag(), vectorizeExtractedCast(), visitORCommutative(), widenAbs(), widenBuildVector(), widenCtPop(), llvm::AMDGPUTargetLowering::WidenOrSplitVectorLoad(), widenPackedVectorWithZeros(), widenVec(), widenVectorOpsToi8(), widenVectorToPartType(), and WinDBZCheckDenominator().

getNode() [5/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		ArrayRef< SDValue >	Ops )

Definition at line 11919 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [6/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		ArrayRef< SDValue >	Ops,
		const SDNodeFlags	Flags )

Definition at line 11927 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::NumOps, AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::ISD::BR_CC, llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, llvm::ISD::DELETED_NODE, DL, FoldBUILD_VECTOR(), foldCONCAT_VECTORS(), getNode(), getValueType(), llvm::EVT::getVectorElementCount(), getVTList(), N, NewSDValueDbgMsg(), SDValue(), and llvm::ISD::SELECT_CC.

getNode() [7/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2 )

Definition at line 8378 of file SelectionDAG.cpp.

References DL, and getNode().

getNode() [8/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		const SDNodeFlags	Flags )

Definition at line 8407 of file SelectionDAG.cpp.

References llvm::ISD::ABDS, llvm::ISD::ABDU, AbstractManglingParser< Derived, Alloc >::Ops, llvm::ISD::ADD, AddNodeIDNode(), llvm::ISD::AND, assert(), llvm::ISD::AssertNoFPClass, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::AVGCEILS, llvm::ISD::AVGCEILU, llvm::ISD::AVGFLOORS, llvm::ISD::AVGFLOORU, llvm::EVT::bitsLE(), llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, canonicalizeCommutativeBinop(), llvm::cast(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::DELETED_NODE, DL, llvm::dyn_cast(), llvm::ISD::EntryToken, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::APInt::extractBits(), llvm::ISD::FADD, llvm::fcAllFlags, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FMUL, FoldBUILD_VECTOR(), foldCONCAT_VECTORS(), FoldConstantArithmetic(), llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT_SAT, llvm::ISD::FP_TO_UINT_SAT, llvm::ISD::FREM, llvm::ISD::FSUB, getAllOnesConstant(), getAnyExtOrTrunc(), llvm::SDNode::getAsZExtVal(), getBoolConstant(), getConstant(), llvm::SDNode::getConstantOperandAPInt(), getDataLayout(), getExtractVectorElt(), getFPExtendOrRound(), getNode(), getNOT(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), getPOISON(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), getSExtOrTrunc(), llvm::APInt::getSignedMaxValue(), llvm::APInt::getSignedMinValue(), llvm::EVT::getSizeInBits(), getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorMinNumElements(), llvm::EVT::getVectorNumElements(), getVScale(), getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::IS_FPCLASS, llvm::isa(), llvm::ConstantSDNode::isAllOnes(), llvm::isConstOrConstSplat(), llvm::EVT::isFixedLengthVector(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isScalableVector(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::ConstantSDNode::isZero(), llvm::Log2_32_Ceil(), llvm::BitmaskEnumDetail::Mask(), llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, N, NewSDValueDbgMsg(), llvm::ISD::OR, llvm::ISD::POISON, llvm::ISD::PTRADD, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDSAT, llvm::ISD::SCMP, llvm::ISD::SDIV, SDValue(), llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, simplifyFPBinop(), simplifyShift(), llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SPLAT_VECTOR, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SSHLSAT, llvm::ISD::SSUBSAT, llvm::ISD::SUB, std::swap(), llvm::ISD::TargetConstant, llvm::to_underlying(), llvm::ISD::TokenFactor, llvm::ISD::UADDSAT, llvm::ISD::UCMP, llvm::ISD::UDIV, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UNDEF, llvm::ISD::UREM, llvm::ISD::USHLSAT, llvm::ISD::USUBSAT, llvm::ISD::VSCALE, and llvm::ISD::XOR.

getNode() [9/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3 )

Definition at line 8984 of file SelectionDAG.cpp.

References DL, and getNode().

getNode() [10/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		const SDNodeFlags	Flags )

Definition at line 8992 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::ISD::BITCAST, llvm::ISD::BUILD_VECTOR, llvm::cast(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::DELETED_NODE, DL, llvm::dyn_cast(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::FMA, llvm::ISD::FMAD, FoldBUILD_VECTOR(), foldCONCAT_VECTORS(), FoldConstantArithmetic(), FoldSetCC(), llvm::ISD::FSHL, llvm::ISD::FSHR, llvm::get(), llvm::SDNode::getAsAPIntVal(), llvm::SDNode::getAsZExtVal(), llvm::APInt::getBitsSet(), llvm::APInt::getBitWidth(), getDataLayout(), llvm::APInt::getOneBitSet(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorMinNumElements(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::hasKnownScalarFactor(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::isa(), llvm::EVT::isFixedLengthVector(), llvm::EVT::isFloatingPoint(), isGuaranteedNotToBePoison(), llvm::EVT::isInteger(), llvm::isNullConstant(), llvm::EVT::isScalableVector(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm_unreachable, N, NewSDValueDbgMsg(), llvm::ISD::PARTIAL_REDUCE_FMLA, llvm::ISD::PARTIAL_REDUCE_SMLA, llvm::ISD::PARTIAL_REDUCE_SUMLA, llvm::ISD::PARTIAL_REDUCE_UMLA, llvm::ISD::POISON, SDValue(), llvm::ISD::SELECT, llvm::ISD::SETCC, simplifySelect(), llvm::ISD::UNDEF, llvm::ISD::VECTOR_COMPRESS, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VECTOR_SPLICE_LEFT, llvm::ISD::VECTOR_SPLICE_RIGHT, and llvm::ISD::VSELECT.

getNode() [11/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		SDValue	N4 )

Definition at line 9255 of file SelectionDAG.cpp.

References DL, and getNode().

getNode() [12/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		SDValue	N4,
		const SDNodeFlags	Flags )

Definition at line 9248 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [13/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		SDValue	N4,
		SDValue	N5 )

Definition at line 9270 of file SelectionDAG.cpp.

References DL, and getNode().

getNode() [14/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		SDValue	N4,
		SDValue	N5,
		const SDNodeFlags	Flags )

Definition at line 9263 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [15/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	Operand )

Definition at line 7052 of file SelectionDAG.cpp.

References DL, and getNode().

getNode() [16/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	Operand,
		const SDNodeFlags	Flags )

Definition at line 7060 of file SelectionDAG.cpp.

References llvm::ISD::ABS, llvm::ISD::ABS_MIN_POISON, AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, assert(), llvm::ISD::BF16_TO_FP, llvm::ISD::BITCAST, llvm::ISD::BITREVERSE, llvm::EVT::bitsGT(), llvm::EVT::bitsLE(), llvm::EVT::bitsLT(), llvm::ISD::BSWAP, llvm::ISD::BUILD_VECTOR, ComputeNumSignBits(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::CTLS, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_POISON, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_POISON, llvm::ISD::DELETED_NODE, DL, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FABS, llvm::ISD::FCEIL, llvm::ISD::FFLOOR, llvm::ISD::FNEG, FoldBUILD_VECTOR(), FoldConstantArithmetic(), llvm::ISD::FP16_TO_FP, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_BF16, llvm::ISD::FP_TO_FP16, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FREEZE, llvm::ISD::FTRUNC, llvm::APInt::getBitsSetFrom(), getConstant(), getConstantFP(), llvm::SDValue::getConstantOperandAPInt(), llvm::SDValue::getConstantOperandVal(), llvm::SDNode::getFlags(), llvm::SDValue::getNode(), getNode(), getNOT(), llvm::SDNode::getOpcode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), getPOISON(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::SDValue::getScalarValueSizeInBits(), llvm::EVT::getSizeInBits(), getUNDEF(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorMinNumElements(), getVScale(), getVTList(), llvm::SDNodeFlags::hasNonNeg(), llvm::isa(), llvm::EVT::isFloatingPoint(), isGuaranteedNotToBeUndefOrPoison(), llvm::EVT::isInteger(), llvm::EVT::isScalableVector(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm_unreachable, MaskedValueIsZero(), llvm::ISD::MERGE_VALUES, N, NewNodesMustHaveLegalTypes, NewSDValueDbgMsg(), llvm::ISD::POISON, llvm::ISD::SCALAR_TO_VECTOR, SDValue(), llvm::SDNodeFlags::setNonNeg(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SPLAT_VECTOR, llvm::ISD::STEP_VECTOR, llvm::ISD::TargetConstant, llvm::ISD::TokenFactor, transferDbgValues(), llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::UndefOrPoison, llvm::ISD::VECREDUCE_ADD, llvm::ISD::VECREDUCE_AND, llvm::ISD::VECREDUCE_MUL, llvm::ISD::VECREDUCE_OR, llvm::ISD::VECREDUCE_SMAX, llvm::ISD::VECREDUCE_SMIN, llvm::ISD::VECREDUCE_UMAX, llvm::ISD::VECREDUCE_UMIN, llvm::ISD::VECREDUCE_XOR, llvm::ISD::VSCALE, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

getNode() [17/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList )

Definition at line 12225 of file SelectionDAG.cpp.

References DL, and getNode().

getNode() [18/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops )

Definition at line 12044 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [19/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		const SDNodeFlags	Flags )

Definition at line 12052 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::ISD::AND, assert(), llvm::EVT::bitsLT(), C(), canonicalizeCommutativeBinop(), llvm::ISD::DELETED_NODE, DL, llvm::dyn_cast(), llvm::APInt::extractBits(), llvm::ISD::FFREXP, llvm::frexp(), getConstant(), getConstantFP(), getFreeze(), getNode(), getNOT(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), getSignedConstant(), getValueType(), llvm::EVT::getVectorElementCount(), llvm::Hi, llvm::isConstOrConstSplat(), llvm::APFloat::isFinite(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isVector(), llvm::ConstantSDNode::isZero(), llvm::Lo, llvm::ISD::MERGE_VALUES, llvm::Mul, N, NewSDValueDbgMsg(), llvm::SDVTList::NumVTs, llvm::APFloatBase::rmNearestTiesToEven, llvm::ISD::SADDO, llvm::ISD::SADDO_CARRY, SDValue(), llvm::APInt::sext(), llvm::ISD::SMUL_LOHI, llvm::ISD::SSUBO, llvm::ISD::SSUBO_CARRY, llvm::ISD::STRICT_FP_EXTEND, llvm::ISD::STRICT_FP_ROUND, llvm::ISD::TargetConstant, llvm::APInt::trunc(), llvm::ISD::UADDO, llvm::ISD::UADDO_CARRY, llvm::ISD::UMUL_LOHI, llvm::ISD::USUBO, llvm::ISD::USUBO_CARRY, llvm::SDVTList::VTs, llvm::ISD::XOR, and llvm::APInt::zext().

getNode() [20/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		SDValue	N )

Definition at line 12230 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [21/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		SDValue	N1,
		SDValue	N2 )

Definition at line 12236 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [22/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3 )

Definition at line 12242 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [23/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		SDValue	N4 )

Definition at line 12248 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNode() [24/24]

SDValue SelectionDAG::getNode	(	unsigned	Opcode,
		const SDLoc &	DL,
		SDVTList	VTList,
		SDValue	N1,
		SDValue	N2,
		SDValue	N3,
		SDValue	N4,
		SDValue	N5 )

Definition at line 12254 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, DL, and getNode().

getNodeIfExists() [1/2]

SDNode * SelectionDAG::getNodeIfExists	(	unsigned	Opcode,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		bool	AllowCommute = false )

getNodeIfExists - Get the specified node if it's already available, or else return NULL.

Definition at line 12785 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, and getNodeIfExists().

getNodeIfExists() [2/2]

SDNode * SelectionDAG::getNodeIfExists	(	unsigned	Opcode,
		SDVTList	VTList,
		ArrayRef< SDValue >	Ops,
		const SDNodeFlags	Flags,
		bool	AllowCommute = false )

Get the specified node if it's already available, or else return NULL.

Definition at line 12794 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), Lookup(), llvm::SDVTList::NumVTs, and llvm::SDVTList::VTs.

Referenced by combineBitcastToBoolVector(), combineSetCC(), getInvertedVectorForFMA(), getNodeIfExists(), matchGenericOp(), performDUPCombine(), PerformExtractFpToIntStores(), performFlagSettingCombine(), performScalarToVectorCombine(), and tryToWidenSetCCOperands().

getNoMergeSiteInfo()

bool llvm::SelectionDAG::getNoMergeSiteInfo ( const SDNode * Node ) const

inline

Return NoMerge info associated with Node.

Definition at line 2679 of file SelectionDAG.h.

References I.

getNOT()

SDValue SelectionDAG::getNOT	(	const SDLoc &	DL,
		SDValue	Val,
		EVT	VT )

Create a bitwise NOT operation as (XOR Val, -1).

getNOT - Create a bitwise NOT operation as (XOR Val, -1).

Definition at line 1685 of file SelectionDAG.cpp.

References DL, getAllOnesConstant(), getNode(), and llvm::ISD::XOR.

Referenced by combineAndNotOrIntoAndNotAnd(), combineAndnp(), combineAndXorSubWithBMI(), combineAVX512SetCCToKMOV(), combineMOVMSK(), combineSelect(), combineSelectOfTwoConstants(), combineSetCC(), combineSub(), combineSVEBitSel(), combineVectorPack(), combineVSelectWithAllOnesOrZeros(), combineXor(), emitFloatCompareMask(), emitVectorComparison(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandFunnelShift(), llvm::TargetLowering::expandPDEP(), llvm::TargetLowering::expandPEXT(), foldAndOrOfSETCC(), foldExtendedSignBitTest(), foldToMaskedStore(), foldVSelectToSignBitSplatMask(), getDataClassTest(), getI128Select(), getNode(), getNode(), getNode(), llvm::TargetLowering::LegalizeSetCCCondCode(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), lowerMSABitClear(), lowerSELECT(), LowerVectorAllEqual(), lowerVectorBitClear(), LowerVSETCC(), LowerVSETCC(), narrowBitOpRMW(), performANDORDUPNOTCombine(), performBSPExpandForSVE(), performConcatVectorsCombine(), performINTRINSIC_WO_CHAINCombine(), performSETCCCombine(), performVANDNCombine(), performXORCombine(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), and visitORCommutative().

getObjectPtrOffset() [1/2]

SDValue llvm::SelectionDAG::getObjectPtrOffset ( const SDLoc & SL, SDValue Ptr, SDValue Offset )

inline

Definition at line 1106 of file SelectionDAG.h.

References getMemBasePlusOffset(), llvm::SDNodeFlags::InBounds, llvm::SDNodeFlags::NoUnsignedWrap, and llvm::Offset.

getObjectPtrOffset() [2/2]

SDValue llvm::SelectionDAG::getObjectPtrOffset ( const SDLoc & SL, SDValue Ptr, TypeSize Offset )

inline

Create an add instruction with appropriate flags when used for addressing some offset of an object.

i.e. if a load is split into multiple components, create an add nuw (or ptradd nuw inbounds) from the base pointer to the offset.

Definition at line 1101 of file SelectionDAG.h.

References getMemBasePlusOffset(), llvm::SDNodeFlags::InBounds, llvm::SDNodeFlags::NoUnsignedWrap, and llvm::Offset.

Referenced by llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), llvm::NVPTXTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerReturn(), performExtractVectorEltCombine(), PerformSplittingMVEEXTToWideningLoad(), PerformSplittingMVETruncToNarrowingStores(), PerformSplittingToNarrowingStores(), PerformSplittingToWideningLoad(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), llvm::TargetLowering::SimplifySetCC(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), and llvm::AMDGPUTargetLowering::SplitVectorStore().

getOpcode_EXTEND()

unsigned llvm::SelectionDAG::getOpcode_EXTEND ( unsigned Opcode )

inlinestatic

Convert *_EXTEND_VECTOR_INREG to *_EXTEND opcode.

Definition at line 976 of file SelectionDAG.h.

References llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, llvm_unreachable, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

Referenced by combineEXTEND_VECTOR_INREG(), and foldExtendVectorInregToExtendOfSubvector().

getOpcode_EXTEND_VECTOR_INREG()

unsigned llvm::SelectionDAG::getOpcode_EXTEND_VECTOR_INREG ( unsigned Opcode )

inlinestatic

Convert *_EXTEND to *_EXTEND_VECTOR_INREG opcode.

Definition at line 992 of file SelectionDAG.h.

References llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, llvm_unreachable, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

Referenced by combineEXTRACT_SUBVECTOR(), getEXTEND_VECTOR_INREG(), LowerAVXExtend(), and matchUnaryShuffle().

getOptLevel()

CodeGenOptLevel llvm::SelectionDAG::getOptLevel ( ) const

inline

Definition at line 482 of file SelectionDAG.h.

Referenced by llvm::FunctionLoweringInfo::set().

getORE()

OptimizationRemarkEmitter & llvm::SelectionDAG::getORE ( ) const

inline

Definition at line 504 of file SelectionDAG.h.

getPartialReduceMLS()

SDValue SelectionDAG::getPartialReduceMLS	(	unsigned	Opc,
		const SDLoc &	DL,
		SDValue	Acc,
		SDValue	LHS,
		SDValue	RHS )

Get an expression that implements a partial multiply-subtract reduction.

In practice this means that parts of the expression are negated, e.g.

partial_reduce_fmls acc, lhs, rhs

<=> partial_reduce_fmla acc, lhs, -rhs

 partial_reduce_umls acc, lhs, rhs

<=> -partial_reduce_umla -acc, lhs, rhs

Definition at line 15223 of file SelectionDAG.cpp.

References assert(), DL, llvm::ISD::FNEG, getNegative(), getNode(), llvm::SDValue::getValueType(), llvm::EVT::isFloatingPoint(), Opc, llvm::ISD::PARTIAL_REDUCE_FMLA, llvm::ISD::PARTIAL_REDUCE_SMLA, and llvm::ISD::PARTIAL_REDUCE_UMLA.

getPass()

const Pass * llvm::SelectionDAG::getPass ( ) const

inline

Definition at line 477 of file SelectionDAG.h.

getPCSections()

MDNode * llvm::SelectionDAG::getPCSections ( const SDNode * Node ) const

inline

Return PCSections associated with Node, or nullptr if none exists.

Definition at line 2651 of file SelectionDAG.h.

getPOISON()

SDValue llvm::SelectionDAG::getPOISON ( EVT VT )

inline

Return a POISON node. POISON does not have a useful SDLoc.

Definition at line 1156 of file SelectionDAG.h.

References getNode(), and llvm::ISD::POISON.

Referenced by adjustLoadValueTypeImpl(), buildFromShuffleMostly(), CollectOpsToWiden(), combineConcatVectorOfConcatVectors(), combineConcatVectorOfExtracts(), combineConcatVectorOfShuffleAndItsOperands(), combineConcatVectorOfShuffles(), combineShuffleOfScalars(), combineSVEReductionOrderedFP(), combineVectorInsert(), convertToScalableVector(), DoubleVectorWidth(), emitFloatCompareMask(), emitNonHSAIntrinsicError(), emitRemovedIntrinsicError(), emitVectorComparison(), ExpandBVWithShuffles(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandVecReduce(), FoldBUILD_VECTOR(), foldCONCAT_VECTORS(), FoldConstantArithmetic(), foldExtractSubvectorFromShuffleVector(), getBuildDwordsVector(), getErrorMergeValues(), getExtLoad(), getExtLoad(), getExtLoadVP(), getExtLoadVP(), getExtStridedLoadVP(), getLegalMaskAndStepVector(), getLoad(), getLoad(), getLoadVP(), getLoadVP(), getNode(), getNode(), getStore(), getStridedLoadVP(), getTruncStore(), getTruncStore(), getTruncStoreVP(), getTruncStridedStoreVP(), getVectorShuffle(), LowerBUILD_VECTORvXi1(), llvm::SITargetLowering::LowerCall(), lowerFCMPIntrinsic(), LowerFLDEXP(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), lowerICMPIntrinsic(), LowerINTRINSIC_W_CHAIN(), llvm::AArch64TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), LowerTruncateVectorStore(), llvm::AMDGPUTargetLowering::lowerUnhandledCall(), lowerWaveShuffle(), NormalizeBuildVector(), padEltsToUndef(), partitionShuffleOfConcats(), llvm::SITargetLowering::passSpecialInputs(), performBuildShuffleExtendCombine(), performBuildVectorCombine(), performConcatVectorsCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performDUPCombine(), performDupLane128Combine(), performLDNT1Combine(), PerformSplittingMVEEXTToWideningLoad(), PerformSplittingToWideningLoad(), performSTNT1Combine(), performUzpCombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReconstructShuffleWithRuntimeMask(), ReplaceAddWithADDP(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), tryCombineMULLWithUZP1(), tryCombineToREV(), tryToReplaceScalarFPConversionWithSVE(), WidenVector(), and WidenVector().

getPseudoProbeNode()

SDValue SelectionDAG::getPseudoProbeNode	(	const SDLoc &	Dl,
		SDValue	Chain,
		uint64_t	Guid,
		uint64_t	Index,
		uint32_t	Attr )

Creates a PseudoProbeSDNode with function GUID Guid and the index of the block Index it is probing, as well as the attributes attr of the probe.

Definition at line 10669 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), llvm::Guid, N, NewSDValueDbgMsg(), llvm::ISD::PSEUDO_PROBE, and SDValue().

getPSI()

ProfileSummaryInfo * llvm::SelectionDAG::getPSI ( ) const

inline

Definition at line 505 of file SelectionDAG.h.

getPtrExtendInReg()

SDValue SelectionDAG::getPtrExtendInReg	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Return the expression required to extend the Op as a pointer value assuming it was the smaller SrcTy value.

This may be either a zero extend or a sign extend.

Definition at line 1674 of file SelectionDAG.cpp.

References DL, and getZeroExtendInReg().

getPtrExtOrTrunc()

SDValue SelectionDAG::getPtrExtOrTrunc	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of integer type, to the integer type VT, by either truncating it or performing either zero or sign extension as appropriate extension for the pointer's semantics.

Definition at line 1668 of file SelectionDAG.cpp.

References DL, and getZExtOrTrunc().

Referenced by getLoadStackGuard().

getReducedAlign()

Align SelectionDAG::getReducedAlign	(	EVT	VT,
		bool	UseABI )

In most cases this function returns the ABI alignment for a given type, except for illegal vector types where the alignment exceeds that of the stack.

In such cases we attempt to break the vector down to a legal type and return the ABI alignment for that instead.

Definition at line 2627 of file SelectionDAG.cpp.

References DL, getContext(), getDataLayout(), getMachineFunction(), llvm::TargetFrameLowering::getStackAlign(), llvm::EVT::getTypeForEVT(), and llvm::EVT::isVector().

Referenced by llvm::TargetLowering::expandVECTOR_COMPRESS(), and llvm::TargetLowering::expandVectorSplice().

getRegister()

SDValue SelectionDAG::getRegister	(	Register	Reg,
		EVT	VT )

Definition at line 2424 of file SelectionDAG.cpp.

References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), getVTList(), N, llvm::ISD::Register, and SDValue().

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), buildCallOperands(), createCMovFP(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), emitLockedStackOp(), EmitUnrolledSetTag(), extractPtrauthBlendDiscriminators(), extractPtrauthBlendDiscriminators(), getADAEntry(), llvm::MipsTargetLowering::getAddrGPRel(), getCopyFromReg(), getCopyFromReg(), getCopyToReg(), getCopyToReg(), getDefaultScalableVLOps(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), llvm::MipsTargetLowering::getGlobalReg(), llvm::MipsTargetLowering::getOpndList(), getPopFromX87Reg(), getPrefetchNode(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallResult(), llvm::LanaiTargetLowering::LowerConstantPool(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::SparcTargetLowering::LowerINTRINSIC_WO_CHAIN(), llvm::LanaiTargetLowering::LowerJumpTable(), LowerMemOpCallTo(), lowerMSTORE(), llvm::HexagonTargetLowering::LowerReturn(), llvm::LoongArchTargetLowering::LowerReturn(), llvm::RISCVTargetLowering::LowerReturn(), llvm::SITargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::VETargetLowering::LowerReturn(), llvm::XtensaTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerVASTART(), llvm::VETargetLowering::lowerVASTART(), lowerVectorIntrinsicScalars(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), llvm::SITargetLowering::PostISelFolding(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImm34(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), selectConstantAddr(), llvm::PPCTargetLowering::SelectForceXFormMode(), selectImmSeq(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), selectSOffset(), and splatPartsI64WithVL().

getRegisterMask()

SDValue SelectionDAG::getRegisterMask

(

const uint32_t *

RegMask

)

Definition at line 2440 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), getVTList(), N, llvm::ISD::RegisterMask, and SDValue().

Referenced by buildCallOperands(), llvm::AArch64TargetLowering::changeStreamingMode(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), llvm::MipsTargetLowering::getOpndList(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), and llvm::VETargetLowering::lowerToTLSGeneralDynamicModel().

getRoot()

const SDValue & llvm::SelectionDAG::getRoot ( ) const

inline

Return the root tag of the SelectionDAG.

Definition at line 570 of file SelectionDAG.h.

Referenced by llvm::checkForCycles(), determineConstraints(), dump(), Legalize(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), RemoveDeadNode(), RemoveDeadNodes(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), ReplaceAllUsesWith(), and ReplaceAllUsesWith().

getRuntimeLibcallInfo()

const RTLIB::RuntimeLibcallsInfo & llvm::SelectionDAG::getRuntimeLibcallInfo ( ) const

inline

Definition at line 494 of file SelectionDAG.h.

getScatterVP()

SDValue SelectionDAG::getScatterVP	(	SDVTList	VTs,
		EVT	VT,
		const SDLoc &	dl,
		ArrayRef< SDValue >	Ops,
		MachineMemOperand *	MMO,
		ISD::MemIndexType	IndexType )

Definition at line 11448 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::isa(), llvm::details::FixedOrScalableQuantity< ElementCount, unsigned >::isKnownGE(), N, NewSDValueDbgMsg(), and SDValue().

Referenced by llvm::RISCVTargetLowering::PerformDAGCombine().

getSelect()

SDValue llvm::SelectionDAG::getSelect ( const SDLoc & DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS, SDNodeFlags Flags = SDNodeFlags() )

inline

Helper function to make it easier to build Select's if you just have operands and don't want to check for vector.

Definition at line 1342 of file SelectionDAG.h.

References assert(), Cond, DL, getNode(), LHS, RHS, llvm::ISD::SELECT, and llvm::ISD::VSELECT.

Referenced by llvm::TargetLowering::BuildUDIV(), combineAnd(), combineAndnp(), combineConcatVectorOps(), combineFMinNumFMaxNum(), combineLogicBlendIntoPBLENDV(), combineMaskedLoadConstantMask(), combineSelect(), combineTargetShuffle(), commuteSelect(), llvm::TargetLowering::CTTZTableLookup(), llvm::TargetLowering::expandABD(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandCttzElts(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFMINIMUM_FMAXIMUM(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_UINT(), llvm::TargetLowering::expandIntMINMAX(), llvm::TargetLowering::expandLoopDependenceMask(), llvm::TargetLowering::expandRoundInexactToOdd(), llvm::TargetLowering::expandShlSat(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVPCTTZElements(), foldBinOpIntoSelectIfProfitable(), foldBinOpIntoSelectIfProfitable(), foldSelectOfSelectCmp(), foldSelectWithIdentityConstant(), llvm::TargetLowering::getNegatedExpression(), LowerADDSAT_SUBSAT(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), LowerBUILD_VECTORvXi1(), lowerCttzElts(), llvm::AMDGPUTargetLowering::lowerFEXPF64(), lowerFMAXIMUM_FMINIMUM(), LowerFMINIMUM_FMAXIMUM(), lowerFREM(), llvm::AMDGPUTargetLowering::LowerFROUNDEVEN(), lowerINT_TO_FP_vXi64(), llvm::RISCVTargetLowering::LowerOperation(), LowerRotate(), lowerSELECT(), LowerShift(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), lowerShuffleAsBlend(), LowerSIGN_EXTEND_Mask(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), llvm::HexagonTargetLowering::LowerVSELECT(), lowerWaveShuffle(), LowerZERO_EXTEND_Mask(), narrowExtractedVectorSelect(), PerformADDCombineWithOperands(), llvm::RISCVTargetLowering::PerformDAGCombine(), performSelectCombine(), performVSelectCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), signExtendBitcastSrcVector(), signExtendBitcastSrcVector(), takeInexpensiveLog2(), tryFoldSelectIntoOp(), tryToFoldExtendOfConstant(), tryToFoldExtendSelectLoad(), UnrollVectorOverflowOp(), and useInversedSetcc().

getSelectCC()

SDValue llvm::SelectionDAG::getSelectCC ( const SDLoc & DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond, SDNodeFlags Flags = SDNodeFlags() )

inline

Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an SDValue.

Definition at line 1352 of file SelectionDAG.h.

References Cond, DL, getCondCode(), getNode(), llvm::SDValue::getValueType(), LHS, RHS, and llvm::ISD::SELECT_CC.

Referenced by llvm::TargetLowering::createSelectForFMINNUM_FMAXNUM(), createVariablePermute(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL_LOHI(), llvm::AMDGPUTargetLowering::LowerF64ToF16Safe(), lowerFP_TO_INT_SAT(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), llvm::R600TargetLowering::PerformDAGCombine(), and performFP_TO_INT_SATCombine().

getSelectionDAGInfo()

const SelectionDAGTargetInfo & llvm::SelectionDAG::getSelectionDAGInfo ( ) const

inline

Definition at line 498 of file SelectionDAG.h.

Referenced by combineCVTP2I_CVTTP2I(), combineFMA(), combineToVWMACC(), combineVFMADD_VLWithVFNEG_VL(), and performVFMADD_VLCombine().

getSetCC()

SDValue llvm::SelectionDAG::getSetCC ( const SDLoc & DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond, SDValue Chain = SDValue(), bool IsSignaling = false, SDNodeFlags Flags = {} )

inline

Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue.

Definition at line 1324 of file SelectionDAG.h.

References Cond, DL, LHS, and RHS.

Referenced by llvm::TargetLowering::buildSDIVPow2WithCMov(), llvm::TargetLowering::BuildUDIV(), canonicalizeMaskForVLPredicate(), canonicalizeVSelectTrueToOneUse(), combineAdd(), combineAnd(), combineBitcast(), combineConcatVectorOps(), combineExtractVectorElt(), combineExtSetcc(), combineFMinNumFMaxNum(), combineOr(), combineSelect(), combineSetCC(), combineShiftAnd1ToBitTest(), combineShiftRightLogical(), combineSubOfBoolean(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineVECREDUCE_LOGIC(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVectorSizedSetCCEquality(), combineVSelectWithAllOnesOrZeros(), commuteSelect(), ConvertCarryFlagToCarryValue(), convertIntLogicToFPLogic(), convertTwoLoadsAndCmpToVCMPEQUB(), llvm::TargetLowering::CTTZTableLookup(), emitOrXorXorTree(), llvm::TargetLowering::expandABD(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLZ(), llvm::TargetLowering::expandCTTZ(), llvm::TargetLowering::expandCttzElts(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFMINIMUM_FMAXIMUM(), llvm::TargetLowering::expandFMINIMUMNUM_FMAXIMUMNUM(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandFP_TO_INT_SAT(), llvm::TargetLowering::expandFP_TO_UINT(), llvm::TargetLowering::expandIntMINMAX(), llvm::TargetLowering::expandIS_FPCLASS(), llvm::TargetLowering::expandLoopDependenceMask(), llvm::TargetLowering::expandMULO(), llvm::TargetLowering::expandRoundInexactToOdd(), llvm::TargetLowering::expandSADDSUBO(), llvm::TargetLowering::expandShiftParts(), llvm::TargetLowering::expandShlSat(), llvm::TargetLowering::expandUADDSUBO(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorMatch(), llvm::TargetLowering::expandVPCTTZElements(), foldAndOrOfSETCC(), FoldSetCC(), foldSetCCWithFunnelShift(), foldSetCCWithRotate(), foldVectorXorShiftIntoCmp(), foldVectorXorShiftIntoCmp(), foldXorTruncShiftIntoCmp(), getDataClassTest(), llvm::AMDGPUTargetLowering::getIsFinite(), llvm::AMDGPUTargetLowering::getIsLtSmallestNormal(), llvm::AMDGPUTargetLowering::getScaledLogInput(), llvm::TargetLowering::getSqrtInputTest(), llvm::TargetLowering::LegalizeSetCCCondCode(), lower1BitShuffle(), LowerADDSAT_SUBSAT(), lowerBUILD_VECTOR(), LowerBUILD_VECTORvXi1(), lowerCttzElts(), LowerEXTEND_VECTOR_INREG(), llvm::AMDGPUTargetLowering::LowerFCEIL(), llvm::AMDGPUTargetLowering::lowerFEXP(), llvm::AMDGPUTargetLowering::lowerFEXP10Unsafe(), llvm::AMDGPUTargetLowering::lowerFEXP2(), llvm::AMDGPUTargetLowering::lowerFEXPF64(), llvm::AMDGPUTargetLowering::lowerFEXPUnsafe(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), lowerFMAXIMUM_FMINIMUM(), llvm::HexagonTargetLowering::LowerFMINFMAX(), LowerFMINIMUM_FMAXIMUM(), llvm::HexagonTargetLowering::LowerFormalArguments(), lowerFREM(), llvm::AMDGPUTargetLowering::LowerFROUND(), llvm::AMDGPUTargetLowering::LowerFROUNDEVEN(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::SITargetLowering::lowerGET_ROUNDING(), lowerINT_TO_FP_vXi64(), LowerIntVSETCC_AVX512(), LowerMULH(), LowerMULO(), llvm::NVPTXTargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), lowerPredicateInterleaveWithPackedVectors(), LowerRotate(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), LowerShiftByScalarImmediate(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerTruncateVecI1(), llvm::HexagonTargetLowering::LowerUAddSubO(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), LowerVectorAllEqual(), LowerVectorCTLZInRegLUT(), LowerVSETCC(), lowerWaveShuffle(), performBitcastCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performMulVectorCmpZeroCombine(), performOrXorChainCombine(), performSELECTCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSETCCCARRYCombine(), performSETCCCombine(), performSETCCCombine(), performSETCCCombine(), performSignExtendSetCCCombine(), performSubNegAndOneCombine(), performVSelectCombine(), performXORCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), reverseZExtICmpCombine(), scalarizeExtractedBinOp(), llvm::TargetLowering::SimplifySetCC(), simplifySetCCWithCTPOP(), llvm::TargetLowering::softenSetCCOperands(), truncateAVX512SetCCNoBWI(), tryDemorganOfBooleanCondition(), trySwapVSelectOperands(), useInversedSetcc(), and widenVectorOpsToi8().

getSetFPEnv()

SDValue SelectionDAG::getSetFPEnv	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Ptr,
		EVT	MemVT,
		MachineMemOperand *	MMO )

Definition at line 11774 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), getVTList(), N, NewSDValueDbgMsg(), SDValue(), and llvm::ISD::SET_FPENV_MEM.

getSExtOrTrunc()

SDValue SelectionDAG::getSExtOrTrunc	(	SDValue	Op,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or truncating it.

Definition at line 1578 of file SelectionDAG.cpp.

References llvm::EVT::bitsGT(), DL, getNode(), llvm::ISD::SIGN_EXTEND, and llvm::ISD::TRUNCATE.

Referenced by combineAdd(), combineGatherScatter(), combineIntDivRem(), combineShuffleOfScalars(), combineSmallMaskReduction(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), combineWideMaskReduction(), createVPDPBUSD(), llvm::TargetLowering::CTTZTableLookup(), llvm::TargetLowering::expandAddSubSat(), llvm::TargetLowering::expandCMP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandFP_TO_SINT(), foldCONCAT_VECTORS(), getBitcastedSExtOrTrunc(), getExtOrTrunc(), getExtOrTrunc(), getNode(), LowerADDSUBSAT(), LowerBITCAST(), LowerFLDEXP(), llvm::HexagonTargetLowering::LowerLoad(), LowerMULO(), llvm::HexagonTargetLowering::LowerSETCC(), llvm::HexagonTargetLowering::LowerVECTOR_SHIFT(), LowerVectorAllEqual(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), performCTPOPCombine(), llvm::AMDGPUTargetLowering::performMulCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), and llvm::AMDGPUTargetLowering::performMulLoHiCombine().

getShiftAmountConstant() [1/2]

SDValue SelectionDAG::getShiftAmountConstant	(	const APInt &	Val,
		EVT	VT,
		const SDLoc &	DL )

Definition at line 1863 of file SelectionDAG.cpp.

References assert(), DL, llvm::EVT::getScalarSizeInBits(), getShiftAmountConstant(), llvm::APInt::getZExtValue(), and llvm::APInt::ult().

getShiftAmountConstant() [2/2]

SDValue SelectionDAG::getShiftAmountConstant	(	uint64_t	Val,
		EVT	VT,
		const SDLoc &	DL )

Definition at line 1856 of file SelectionDAG.cpp.

References assert(), DL, getConstant(), getDataLayout(), and llvm::EVT::isInteger().

Referenced by llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::buildSDIVPow2WithCMov(), llvm::TargetLowering::BuildUDIV(), combineExtractWithShuffle(), combineINSERT_SUBVECTOR(), combineNarrowableShiftedLoad(), combinePMULH(), combineTruncate(), combineVectorInsert(), combineVSelectWithAllOnesOrZeros(), combineXorToBitfieldInsert(), llvm::TargetLowering::CTTZTableLookup(), EltsFromConsecutiveLoads(), llvm::TargetLowering::expandABS(), llvm::TargetLowering::expandAVG(), llvm::TargetLowering::expandCLMUL(), llvm::TargetLowering::expandCONVERT_FROM_ARBITRARY_FP(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), llvm::TargetLowering::expandCTLS(), llvm::TargetLowering::expandCTPOP(), llvm::TargetLowering::expandFixedPointDiv(), llvm::TargetLowering::expandFixedPointMul(), llvm::TargetLowering::expandFP_ROUND(), llvm::TargetLowering::expandIS_FPCLASS(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandMULO(), expandMulToNAFSequence(), llvm::TargetLowering::expandPDEP(), llvm::TargetLowering::expandPEXT(), llvm::TargetLowering::expandUINT_TO_FP(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), extractShiftForRotate(), foldSubCtlzNot(), foldVSelectToSignBitSplatMask(), llvm::TargetLowering::forceExpandMultiply(), llvm::TargetLowering::forceExpandWideMUL(), getCopyFromParts(), getCopyToParts(), GetExponent(), getLimitedPrecisionExp2(), getShiftAmountConstant(), llvm::AMDGPUTargetLowering::loadInputValue(), LowerCTPOP(), LowerFunnelShift(), LowerINTRINSIC_W_CHAIN(), llvm::RISCVTargetLowering::LowerOperation(), LowerRotate(), lowerWaveShuffle(), matchBSwapHWordOrAndAnd(), narrowBitOpRMW(), llvm::SITargetLowering::passSpecialInputs(), performBITCASTCombine(), performBitcastCombine(), performCONDCombine(), llvm::SparcTargetLowering::PerformSTORECombine(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeVectorLoad(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), and visitORCommutative().

getShiftAmountOperand()

SDValue SelectionDAG::getShiftAmountOperand	(	EVT	LHSTy,
		SDValue	Op )

Return the specified value casted to the target's desired shift amount type.

getShiftAmountOperand - Return the specified value casted to the target's desired shift amount type.

Definition at line 2571 of file SelectionDAG.cpp.

References getDataLayout(), and getZExtOrTrunc().

Referenced by combineExtractVectorElt(), LowerCTPOP(), and UnrollVectorOp().

getSignedConstant()

SDValue SelectionDAG::getSignedConstant	(	int64_t	Val,
		const SDLoc &	DL,
		EVT	VT,
		bool	isTarget = false,
		bool	isOpaque = false )

Definition at line 1839 of file SelectionDAG.cpp.

References DL, getConstant(), llvm::EVT::getScalarSizeInBits(), and Size.

Referenced by llvm::TargetLowering::BuildSDIV(), combineOrAndToBitfieldInsert(), combineOrToBitfieldInsert(), combineSetCC(), combineShlAddIAddImpl(), constantFoldBFE(), EmitCMP(), emitMemMemReg(), llvm::TargetLowering::expandCONVERT_TO_ARBITRARY_FP(), expandVAArg(), foldMaskedShiftToScaledMask(), getAArch64Cmp(), getCSAddressAndShifts(), getNode(), llvm::AVRTargetLowering::getPreIndexedAddressParts(), getSignedTargetConstant(), isBLACompatibleAddress(), lowerBuildVectorOfConstants(), lowerBuildVectorViaVID(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), LowerFP_TO_INT_SAT(), llvm::RISCVTargetLowering::LowerOperation(), lowerShuffleAsBlend(), llvm::VETargetLowering::lowerVAARG(), lowerVECTOR_SHUFFLE_VSHUF(), LowerVECTOR_SHUFFLEv8i8(), narrowBitOpRMW(), performCONCAT_VECTORSCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performMulRdsvlCombine(), performORCombine(), performORCombine(), performReverseEVLCombine(), performSELECT_CCCombine(), performSETCCCombine(), performSETCCCombine(), performVP_STORECombine(), transformAddImmMulImm(), translateSetCCForBranch(), tryCombineShiftImm(), and tryConvertSVEWideCompare().

getSignedTargetConstant()

SDValue llvm::SelectionDAG::getSignedTargetConstant ( int64_t Val, const SDLoc & DL, EVT VT, bool isOpaque = false )

inline

Definition at line 711 of file SelectionDAG.h.

References DL, and getSignedConstant().

Referenced by accumulateOffset(), llvm::PPC::get_VSPLTI_elt(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::M68kTargetLowering::LowerAsmOperandForConstraint(), llvm::RISCVTargetLowering::LowerAsmOperandForConstraint(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), lowerSelectToBinOp(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImm34(), selectConstantAddr(), selectImm(), selectImmSeq(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), and selectVSplatImmHelper().

getSplat()

SDValue llvm::SelectionDAG::getSplat ( EVT VT, const SDLoc & DL, SDValue Op )

inline

Returns a node representing a splat of one value into all lanes of the provided vector type.

This is a utility which returns either a BUILD_VECTOR or SPLAT_VECTOR depending on the scalability of the desired vector type.

Definition at line 915 of file SelectionDAG.h.

References assert(), DL, getSplatBuildVector(), getSplatVector(), llvm::EVT::isScalableVector(), and llvm::EVT::isVector().

Referenced by canonicalizeMaskForVLPredicate(), combineToExtendBoolVectorInReg(), combineToExtendBoolVectorInReg(), llvm::TargetLowering::expandCttzElts(), llvm::TargetLowering::expandVPCTTZElements(), getConstant(), getConstantFP(), isNOT(), lowerVECTOR_SHUFFLE(), performANDORDUPNOTCombine(), performCONCAT_VECTORSCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performVANDNCombine(), refineUniformBase(), llvm::X86TargetLowering::ReplaceNodeResults(), scalarizeBinOpOfSplats(), and takeInexpensiveLog2().

getSplatBuildVector()

SDValue llvm::SelectionDAG::getSplatBuildVector ( EVT VT, const SDLoc & DL, SDValue Op )

inline

Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements.

VT must be a vector type. Op's type must be the same as (or, for integers, a type wider than) VT's element type.

Definition at line 882 of file SelectionDAG.h.

References AbstractManglingParser< Derived, Alloc >::Ops, assert(), llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, DL, getNode(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isInteger(), and llvm::ISD::UNDEF.

Referenced by combineGatherScatter(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemset(), getMemsetValue(), getSplat(), getVectorShuffle(), lowerBUILD_VECTOR(), lowerBuildVectorAsBlend(), lowerBuildVectorViaDominantValues(), and llvm::X86TargetLowering::ReplaceNodeResults().

getSplatSourceVector()

SDValue SelectionDAG::getSplatSourceVector	(	SDValue	V,
		int &	SplatIndex )

If V is a splatted value, return the source vector and its splat index.

Definition at line 3164 of file SelectionDAG.cpp.

References assert(), llvm::cast(), llvm::countr_one(), llvm::APInt::getAllOnes(), getUNDEF(), llvm::EVT::getVectorNumElements(), llvm::EVT::isScalableVector(), isSplatValue(), llvm::APInt::isSubsetOf(), llvm::peekThroughExtractSubvectors(), SDValue(), llvm::ISD::SPLAT_VECTOR, and llvm::ISD::VECTOR_SHUFFLE.

Referenced by getSplatValue(), LowerFunnelShift(), LowerRotate(), LowerShiftByScalarVariable(), and scalarizeBinOpOfSplats().

getSplatValue()

SDValue SelectionDAG::getSplatValue	(	SDValue	V,
		bool	LegalTypes = false )

If V is a splat vector, return its scalar source operand by extracting that element from the source vector.

If LegalTypes is true, this method may only return a legally-typed splat value. If it cannot legalize the splatted value it will return SDValue().

Definition at line 3216 of file SelectionDAG.cpp.

References llvm::EVT::bitsLT(), getContext(), getExtractVectorElt(), llvm::EVT::getScalarType(), getSplatSourceVector(), llvm::EVT::isInteger(), and SDValue().

Referenced by canLowerSRLToRoundingShiftForVT(), canonicalizeMaskForVLPredicate(), foldIndexIntoBase(), llvm::RISCVTargetLowering::PerformDAGCombine(), performInsertSubvectorCombine(), performMaskedLoadToVPLoadCombine(), PerformVSetCCToVCTPCombine(), and refineUniformBase().

getSplatVector()

SDValue llvm::SelectionDAG::getSplatVector ( EVT VT, const SDLoc & DL, SDValue Op )

inline

Definition at line 899 of file SelectionDAG.h.

References assert(), llvm::EVT::bitsLE(), DL, getNode(), llvm::EVT::getVectorElementType(), llvm::EVT::isInteger(), llvm::ISD::SPLAT_VECTOR, and llvm::ISD::UNDEF.

Referenced by BuildExactSDIV(), BuildExactUDIV(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), FoldConstantArithmetic(), getSplat(), getWideningInterleave(), lowerBUILD_VECTOR(), and LowerVectorMatch().

GetSplitDestVTs()

std::pair< EVT, EVT > SelectionDAG::GetSplitDestVTs

(

const EVT &

VT

)

const

Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.

GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.

Definition at line 14560 of file SelectionDAG.cpp.

References getContext(), llvm::EVT::getHalfNumVectorElementsVT(), and llvm::EVT::isVector().

Referenced by llvm::TargetLowering::expandVectorFindLastActive(), llvm::TargetLowering::expandVectorNaryOpBySplitting(), LowerCVTPS2PH(), LowerMULO(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceReductionResults(), SplitStrictFPVectorOp(), llvm::SITargetLowering::splitTernaryVectorOp(), llvm::SITargetLowering::splitUnaryVectorOp(), SplitVector(), SplitVectorOp(), splitVectorOp(), and splitVSETCC().

getSrcValue()

SDValue SelectionDAG::getSrcValue

(

const Value *

v

)

Construct a node to track a Value* through the backend.

Definition at line 2499 of file SelectionDAG.cpp.

References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), getVTList(), N, SDValue(), and llvm::ISD::SRCVALUE.

getStackArgumentTokenFactor()

SDValue SelectionDAG::getStackArgumentTokenFactor

(

SDValue

Chain

)

Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.

getStackArgumentTokenFactor - Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.

This is used in tail call lowering to protect stack arguments from being clobbered.

Definition at line 9281 of file SelectionDAG.cpp.

References llvm::dyn_cast(), getEntryNode(), getNode(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), SDValue(), llvm::ISD::TokenFactor, and users.

getStepVector() [1/2]

SDValue SelectionDAG::getStepVector	(	const SDLoc &	DL,
		EVT	ResVT )

Returns a vector of type ResVT whose elements contain the linear sequence <0, 1, 2, 3, ...>

Definition at line 2210 of file SelectionDAG.cpp.

References DL, llvm::EVT::getScalarSizeInBits(), and getStepVector().

getStepVector() [2/2]

SDValue SelectionDAG::getStepVector	(	const SDLoc &	DL,
		EVT	ResVT,
		const APInt &	StepVal )

Returns a vector of type ResVT whose elements contain the linear sequence <0, Step, Step * 2, Step * 3, ...>

Definition at line 2215 of file SelectionDAG.cpp.

References assert(), DL, llvm::APInt::getBitWidth(), getBuildVector(), getConstant(), getNode(), llvm::EVT::getScalarSizeInBits(), getTargetConstant(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isScalableVector(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::ISD::STEP_VECTOR.

Referenced by canonicalizeMaskForVLPredicate(), llvm::TargetLowering::expandVPCTTZElements(), findMoreOptimalIndexType(), FoldConstantArithmetic(), getLegalMaskAndStepVector(), getStepVector(), and LowerSVEIntrinsicIndex().

getStore() [1/5]

SDValue SelectionDAG::getStore	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Val,
		SDValue	Ptr,
		MachineMemOperand *	MMO )

Definition at line 10888 of file SelectionDAG.cpp.

References getPOISON(), getStore(), llvm::SDValue::getValueType(), llvm::Undef, and llvm::ISD::UNINDEXED.

getStore() [2/5]

SDValue SelectionDAG::getStore	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Val,
		SDValue	Ptr,
		MachinePointerInfo	PtrInfo,
		Align	Alignment,
		MachineMemOperand::Flags	MMOFlags = MachineMemOperand::MONone,
		const MMOMetadata &	Metadata = MMOMetadata() )

Helper function to build ISD::STORE nodes.

This function will set the MOStore flag on MMOFlags, but you can set it if you want. The MOLoad and MOInvariant flags must not be set.

Definition at line 10867 of file SelectionDAG.cpp.

References assert(), getMachineFunction(), getStore(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PTs >::isNull(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, Size, and llvm::MachinePointerInfo::V.

Referenced by combineScalarMinMaxAbsStore(), combineStore(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), expandVACopy(), llvm::TargetLowering::expandVECTOR_COMPRESS(), llvm::TargetLowering::expandVectorSplice(), getIndexedStore(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getStore(), getStore(), getStore(), getTruncStore(), getTruncStore(), LowerATOMIC_STORE(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), LowerF128Store(), llvm::LoongArchTargetLowering::LowerFormalArguments(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::XtensaTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), lowerFP_TO_SINT_STORE(), LowerMemOpCallTo(), lowerMSAStoreIntr(), llvm::RISCVTargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerReturn(), LowerSTORE(), LowerStore(), lowerStoreF128(), lowerStoreI1(), LowerTruncateVectorStore(), LowerVAARG(), llvm::VETargetLowering::lowerVAARG(), llvm::HexagonTargetLowering::LowerVASTART(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), LowerVASTART(), LowerVASTART(), LowerVASTART(), llvm::VETargetLowering::lowerVASTART(), memsetStore(), narrowBitOpRMW(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformMVEExtCombine(), PerformSTORECombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformTruncatingStoreCombine(), reduceMaskedStoreToScalarStore(), llvm::TargetLowering::scalarizeVectorStore(), scalarizeVectorStore(), ShrinkLoadReplaceStoreWithStore(), splitStores(), splitStoreSplat(), splitVectorStore(), llvm::AMDGPUTargetLowering::storeStackInputValue(), and StoreTailCallArgumentsToStackSlot().

getStore() [3/5]

SDValue llvm::SelectionDAG::getStore ( SDValue Chain, const SDLoc & dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, MaybeAlign Alignment = MaybeAlign(), MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone, const MMOMetadata & Metadata = MMOMetadata() )

inline

Definition at line 1515 of file SelectionDAG.h.

References getEVTAlign(), getStore(), llvm::SDValue::getValueType(), and llvm::MachineMemOperand::MONone.

getStore() [4/5]

SDValue SelectionDAG::getStore	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Val,
		SDValue	Ptr,
		SDValue	Offset,
		EVT	SVT,
		MachineMemOperand *	MMO,
		ISD::MemIndexedMode	AM,
		bool	IsTruncating = false )

Definition at line 10895 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::EVT::bitsLT(), llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::EVT::getScalarType(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), getVTList(), Indexed, llvm::EVT::isInteger(), llvm::EVT::isVector(), N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), llvm::ISD::STORE, and llvm::ISD::UNINDEXED.

getStore() [5/5]

LLVM_ABI SDValue llvm::SelectionDAG::getStore	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Val,
		SDValue	Ptr,
		SDValue	Offset,
		MachineMemOperand *	MMO )

References LLVM_ABI, llvm::MachineMemOperand::MONone, and llvm::Offset.

getStoreVP()

SDValue SelectionDAG::getStoreVP	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Val,
		SDValue	Ptr,
		SDValue	Offset,
		SDValue	Mask,
		SDValue	EVL,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		ISD::MemIndexedMode	AM,
		bool	IsTruncating = false,
		bool	IsCompressing = false )

Definition at line 11124 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::MachineMemOperand::getFlags(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementCount(), getVTList(), Indexed, N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

Referenced by getTruncStoreVP(), and llvm::RISCVTargetLowering::PerformDAGCombine().

getStrcmp()

std::pair< SDValue, SDValue > SelectionDAG::getStrcmp	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	S0,
		SDValue	S1,
		const CallInst *	CI )

Lower a strcmp operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.

Definition at line 10012 of file SelectionDAG.cpp.

References getContext(), getRuntimeCallSDValueHelper(), llvm::PointerType::getUnqual(), and S1.

Referenced by llvm::PPCSelectionDAGInfo::EmitTargetCodeForStrcmp().

getStrcpy()

std::pair< SDValue, SDValue > SelectionDAG::getStrcpy	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Dst,
		SDValue	Src,
		const CallInst *	CI )

Lower a strcpy operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.

Definition at line 10060 of file SelectionDAG.cpp.

References getContext(), getRuntimeCallSDValueHelper(), and llvm::PointerType::getUnqual().

Referenced by llvm::PPCSelectionDAGInfo::EmitTargetCodeForStrcpy().

getStrictFPExtendOrRound()

std::pair< SDValue, SDValue > SelectionDAG::getStrictFPExtendOrRound	(	SDValue	Op,
		SDValue	Chain,
		const SDLoc &	DL,
		EVT	VT )

Convert Op, which must be a STRICT operation of float type, to the float type VT, by either extending or rounding (by truncation).

Definition at line 1559 of file SelectionDAG.cpp.

References assert(), llvm::EVT::bitsEq(), llvm::EVT::bitsGT(), DL, getIntPtrConstant(), llvm::SDValue::getNode(), getNode(), SDValue(), llvm::ISD::STRICT_FP_EXTEND, and llvm::ISD::STRICT_FP_ROUND.

Referenced by llvm::RISCVTargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperationWrapper(), and LowerUINT_TO_FP_i32().

getStridedLoadVP() [1/2]

SDValue SelectionDAG::getStridedLoadVP	(	EVT	VT,
		const SDLoc &	DL,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Stride,
		SDValue	Mask,
		SDValue	EVL,
		MachineMemOperand *	MMO,
		bool	IsExpanding = false )

Definition at line 11300 of file SelectionDAG.cpp.

References DL, getPOISON(), getStridedLoadVP(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::Undef, and llvm::ISD::UNINDEXED.

getStridedLoadVP() [2/2]

SDValue SelectionDAG::getStridedLoadVP	(	ISD::MemIndexedMode	AM,
		ISD::LoadExtType	ExtType,
		EVT	VT,
		const SDLoc &	DL,
		SDValue	Chain,
		SDValue	Ptr,
		SDValue	Offset,
		SDValue	Stride,
		SDValue	Mask,
		SDValue	EVL,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		bool	IsExpanding = false )

Definition at line 11265 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), DL, llvm::MachinePointerInfo::getAddrSpace(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), getVTList(), Indexed, N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

Referenced by getExtStridedLoadVP(), getStridedLoadVP(), performCONCAT_VECTORSCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), and performReverseEVLCombine().

getStridedStoreVP()

SDValue SelectionDAG::getStridedStoreVP	(	SDValue	Chain,
		const SDLoc &	DL,
		SDValue	Val,
		SDValue	Ptr,
		SDValue	Offset,
		SDValue	Stride,
		SDValue	Mask,
		SDValue	EVL,
		EVT	MemVT,
		MachineMemOperand *	MMO,
		ISD::MemIndexedMode	AM,
		bool	IsTruncating = false,
		bool	IsCompressing = false )

Definition at line 11319 of file SelectionDAG.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, AddNodeIDNode(), assert(), llvm::cast(), DL, llvm::MachinePointerInfo::getAddrSpace(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDValue::getValueType(), getVTList(), Indexed, N, NewSDValueDbgMsg(), llvm::Offset, llvm::ISD::POISON, SDValue(), and llvm::ISD::UNINDEXED.

Referenced by getTruncStridedStoreVP(), and performVP_STORECombine().

getStrlen()

std::pair< SDValue, SDValue > SelectionDAG::getStrlen	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	Src,
		const CallInst *	CI )

Lower a strlen operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.

Definition at line 10070 of file SelectionDAG.cpp.

References getContext(), getRuntimeCallSDValueHelper(), and llvm::PointerType::getUnqual().

Referenced by llvm::PPCSelectionDAGInfo::EmitTargetCodeForStrlen().

getStrstr()

std::pair< SDValue, SDValue > SelectionDAG::getStrstr	(	SDValue	Chain,
		const SDLoc &	dl,
		SDValue	S0,
		SDValue	S1,
		const CallInst *	CI )

Lower a strstr operation into a target library call and return the resulting chain and call result as SelectionDAG SDValues.

Definition at line 10022 of file SelectionDAG.cpp.

References getContext(), getRuntimeCallSDValueHelper(), llvm::PointerType::getUnqual(), and S1.

Referenced by llvm::PPCSelectionDAGInfo::EmitTargetCodeForStrstr().

getSubtarget() [1/2]

const TargetSubtargetInfo & llvm::SelectionDAG::getSubtarget ( ) const

inline

Definition at line 485 of file SelectionDAG.h.

Referenced by adjustICmp128(), buildPCRelGlobalAddress(), combineAddOrSubToADCOrSBB(), combineCommutableSHUFP(), emitComparison(), emitConditionalComparison(), emitStrictFPComparison(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::RISCVSelectionDAGInfo::EmitTargetCodeForMemset(), findMoreOptimalIndexType(), GenerateFixedLengthSVETBL(), getPTrue(), GetTLSADDR(), init(), llvm::AMDGPUTargetLowering::isInt64ImmLegal(), llvm::PPC::isVPKUDUMShuffleMask(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), lowerMSASplatZExt(), lowerTensormapReplaceElemtype(), lowerTensormapReplaceSwizzleMode(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), optimizeIncrementingWhile(), patchMatchingInput(), performBuildVectorCombine(), performPredicateLoadCombine(), performSVEMulAddSubCombine(), recoverFramePointer(), truncateVecElts(), tryAdvSIMDModImm16(), tryAdvSIMDModImm32(), tryLowerSmallVectorExtLoad(), tryLowerToBSL(), unpackF64OnRV32DSoftABI(), and llvm::SDNodeInfo::verifyNode().

getSubtarget() [2/2]

template<typename STC>

const STC & llvm::SelectionDAG::getSubtarget ( ) const

inline

Definition at line 486 of file SelectionDAG.h.

getSymbolFunctionGlobalAddress()

SDValue SelectionDAG::getSymbolFunctionGlobalAddress	(	SDValue	Op,
		Function **	TargetFunction = nullptr )

Return a GlobalAddress of the function from the current module with name matching the given ExternalSymbol.

Additionally can provide the matched function. Panic if the function doesn't exist.

Definition at line 13731 of file SelectionDAG.cpp.

References assert(), llvm::cast(), llvm::GlobalValue::getAddressSpace(), getDataLayout(), llvm::Module::getFunction(), getGlobalAddress(), llvm::GlobalValue::getParent(), llvm::isa(), and llvm::report_fatal_error().

Referenced by llvm::NVPTXTargetLowering::LowerCall().

getTarget()

const TargetMachine & llvm::SelectionDAG::getTarget ( ) const

inline

Definition at line 484 of file SelectionDAG.h.

Referenced by canOptimizeTLSDFormToXForm(), llvm::RISCVTargetLowering::expandIndirectJTBranch(), llvm::TargetLowering::expandIndirectJTBranch(), llvm::X86TargetLowering::expandIndirectJTBranch(), getMemset(), GetTLSADDR(), llvm::SITargetLowering::isEligibleForTailCallOptimization(), isEligibleToFoldADDIForFasterLocalAccesses(), isInTailCallPositionWrapper(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::VETargetLowering::lowerINTRINSIC_WO_CHAIN(), and transformCallee().

getTargetBlockAddress()

SDValue llvm::SelectionDAG::getTargetBlockAddress ( const BlockAddress * BA, EVT VT, int64_t Offset = 0, unsigned TargetFlags = 0 )

inline

Definition at line 805 of file SelectionDAG.h.

References getBlockAddress(), and llvm::Offset.

Referenced by getTargetNode(), getTargetNode(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::AMDGPUTargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::SparcTargetLowering::withTargetFlags(), and llvm::VETargetLowering::withTargetFlags().

getTargetConstant() [1/3]

SDValue llvm::SelectionDAG::getTargetConstant ( const APInt & Val, const SDLoc & DL, EVT VT, bool isOpaque = false )

inline

Definition at line 703 of file SelectionDAG.h.

References DL, and getConstant().

getTargetConstant() [2/3]

SDValue llvm::SelectionDAG::getTargetConstant ( const ConstantInt & Val, const SDLoc & DL, EVT VT, bool isOpaque = false )

inline

Definition at line 707 of file SelectionDAG.h.

References DL, and getConstant().

getTargetConstant() [3/3]

SDValue llvm::SelectionDAG::getTargetConstant ( uint64_t Val, const SDLoc & DL, EVT VT, bool isOpaque = false )

inline

Definition at line 699 of file SelectionDAG.h.

References DL, getConstant(), and uint64_t.

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), buildGPRPair(), buildPCRelGlobalAddress(), llvm::SITargetLowering::buildRSRC(), buildSMovImm32(), canonicalizeBitSelect(), llvm::AArch64TargetLowering::changeStreamingMode(), checkCVTFixedPointOperandWithFBits(), checkCVTFixedPointOperandWithFBitsForVectors(), llvm::SITargetLowering::CollectTargetIntrinsicOperands(), combineADC(), combineAddOrSubToADCOrSBB(), combineAndOnGF2P8AFFINEQBOperand(), combineAndOrForCcmpCtest(), combineBitcastToBoolVector(), combineBrCond(), combineCMov(), combineCommutableSHUFP(), combineCompareEqual(), combineConcatVectorOps(), combineEXTRACT_SUBVECTOR(), combineExtractWithShuffle(), combineFP16_TO_FP(), combineFP_ROUND(), combineFunnelShift(), combineINSERT_SUBVECTOR(), combineIntDivRem(), combineKSHIFT(), combineMinMaxToSat(), combineNestedGF2P8AFFINEQB(), combineOrWithGF2P8AFFINEQB(), combinePCLMULQDQ(), combineRotate(), combineShlAddIAddImpl(), combineStore(), combineSVEPrefetchVecBaseImmOff(), combineTargetShuffle(), llvm::VETargetLowering::combineTRUNCATE(), combineVectorShiftImm(), combineX86CloadCstore(), combineX86ShuffleChain(), combineX86SubCmpForFlags(), combineXorOnGF2P8AFFINEQBOperand(), combineXorWithGF2P8AFFINEQB(), combineXorWithTwoGF2P8AFFINEQB(), createGPRPairNode(), createGPRPairNode2xi32(), createMMXBuildVector(), createSetFPEnvNodes(), createVariablePermute(), determineConstraints(), DoCrossByteCLMUL(), EmitAVX512Test(), emitCmp(), emitConjunctionForCCMPRec(), emitLockedStackOp(), emitSETCC(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::RISCVSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForSetTag(), expandBitCastI128ToF128(), expandMul(), expandMulToShlAddShlAdd(), ExtractBitFromMaskVector(), extractPtrauthBlendDiscriminators(), extractPtrauthBlendDiscriminators(), foldMaskedShiftToUSHL(), foldSelectToUSATI(), GenerateFixedLengthSVETBL(), GenerateTBL(), llvm::PPC::get_VSPLTI_elt(), getADAEntry(), getAL(), getAVX2GatherNode(), getCopyFromParts(), getDataClassTest(), getGatherNode(), getGeneralPermuteNode(), getIntOperandsFromRegisterString(), getJumpTableDebugInfo(), getLeftShift(), getPack(), getPermuteNode(), getPrefetchNode(), getPTrue(), getScatterNode(), getSETCC(), getShlAddShlAdd(), getSHUFPDImmForMask(), getSPDenormModeValue(), getStepVector(), getTargetExtractSubreg(), getTargetInsertSubreg(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getUniformBase(), getV4X86ShuffleImm8ForMask(), getVAArg(), getVShift(), getVSlidedown(), getVSlideup(), getZeroVector(), insert1BitVector(), InvertCarryFlag(), isSpecificZeroAfterMaybeRounding(), isVMOVModifiedImm(), isWorthFoldingIntoOrrWithShift(), lower1BitShuffle(), lower1BitShuffleAsKSHIFTR(), LowerABD(), LowerABS(), LowerADDRSPACECAST(), llvm::AVRTargetLowering::LowerAsmOperandForConstraint(), llvm::LanaiTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::RISCVTargetLowering::LowerAsmOperandForConstraint(), llvm::SITargetLowering::LowerAsmOperandForConstraint(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::VETargetLowering::lowerATOMIC_FENCE(), LowerBITREVERSE(), LowerBuildVectorv4x32(), llvm::SITargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), LowerCLMUL(), LowerCMP_SWAP(), LowerCONCAT_VECTORSvXi1(), llvm::AMDGPUTargetLowering::LowerCTLS(), LowerCTLZ(), LowerCTTZ(), LowerCTTZ(), llvm::NVPTXTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SITargetLowering::LowerDYNAMIC_STACKALLOC(), LowerEXTRACT_SUBVECTOR(), llvm::VETargetLowering::lowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128Load(), LowerF128Store(), llvm::AMDGPUTargetLowering::lowerFEXP(), llvm::AMDGPUTargetLowering::lowerFEXP2(), lowerFixedVectorSegLoadIntrinsics(), lowerFixedVectorSegStoreIntrinsics(), LowerFLDEXP(), llvm::AMDGPUTargetLowering::LowerFLOG2(), llvm::AMDGPUTargetLowering::LowerFLOGCommon(), LowerFMINIMUM_FMAXIMUM(), llvm::SITargetLowering::LowerFormalArguments(), llvm::VETargetLowering::LowerFormalArguments(), LowerFP_TO_FP16(), lowerFP_TO_INT_SAT(), lowerFTRUNC_FCEIL_FFLOOR_FROUND(), llvm::SITargetLowering::lowerGET_FPENV(), llvm::SITargetLowering::lowerGET_ROUNDING(), lowerGetVectorLength(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), LowerINTRINSIC_W_CHAIN(), lowerLaneOp(), lowerLoadF128(), lowerLoadI1(), LowerMLOAD(), LowerMUL(), llvm::AArch64TargetLowering::LowerOperation(), llvm::RISCVTargetLowering::LowerOperation(), lowerPredCounterWhile(), LowerPREFETCH(), LowerPtrAuthGlobalAddressStatically(), lowerReductionSeq(), llvm::SITargetLowering::LowerReturn(), llvm::VETargetLowering::LowerReturn(), LowerRotate(), lowerSelectToBinOp(), LowerSELECTWithCmpZero(), llvm::SITargetLowering::lowerSET_FPENV(), llvm::SITargetLowering::lowerSET_ROUNDING(), LowerShift(), LowerShiftByScalarImmediate(), lowerShuffleAsBitRotate(), lowerShuffleAsBlend(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsByteShiftMask(), lowerShuffleAsElementInsertion(), lowerShuffleAsInsertPS(), lowerShuffleAsShift(), lowerShuffleAsSpecificExtension(), lowerShuffleAsVALIGN(), lowerShufflePairAsUNPCKAndPermute(), lowerShuffleWithSHUFPD(), lowerShuffleWithSSE4A(), LowerSMELdrStr(), lowerStAsyncRelease(), lowerStoreF128(), lowerStoreI1(), lowerUINT_TO_FP_vXi32(), lowerV16I8Shuffle(), lowerV2F64Shuffle(), lowerV2X128Shuffle(), lowerV4F64Shuffle(), lowerV8F64Shuffle(), lowerV8I16Shuffle(), lowerVECTOR_SHUFFLE_SHF(), lowerVECTOR_SHUFFLE_VSHF(), lowerVECTOR_SHUFFLE_XVSHUF(), lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND(), lowerVectorIntrinsicScalars(), LowerVectorMatch(), lowerVectorXRINT_XROUND(), LowerVSETCC(), lowerWaveShuffle(), optimizeBrk(), optimizeLogicalImm(), parseTexFail(), performActiveLaneMaskCombine(), performAddTruncShiftCombine(), performConcatVectorsCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), performFP_TO_INT_SATCombine(), performFP_TO_INTCombine(), PerformHWLoopCombine(), performVANDNCombine(), performVecReduceAddCntpCombine(), performVectorDeinterleaveCombine(), performZExtUZPCombine(), prepareDAGLevelOperands(), PromoteMVEPredVector(), ReconstructShuffleWithRuntimeMask(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::SITargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), llvm::PPCTargetLowering::SelectAddressRegImm(), selectConstantAddr(), selectI64Imm(), selectI64Imm(), selectI64ImmDirect(), selectI64ImmDirectPrefix(), selectImm(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), llvm::TargetLowering::SimplifySetCC(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), transformAddShlImm(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), tryCombineShiftImm(), tryLowerToSLI(), tryOrrWithShift(), trySimplifySrlAddToRshrnb(), tryToConvertShuffleOfTbl2ToTbl4(), llvm::X86TargetLowering::visitMaskedLoad(), llvm::X86TargetLowering::visitMaskedStore(), and llvm::SITargetLowering::wrapAddr64Rsrc().

getTargetConstantFP() [1/3]

SDValue llvm::SelectionDAG::getTargetConstantFP ( const APFloat & Val, const SDLoc & DL, EVT VT )

inline

Definition at line 738 of file SelectionDAG.h.

References DL, and getConstantFP().

getTargetConstantFP() [2/3]

SDValue llvm::SelectionDAG::getTargetConstantFP ( const ConstantFP & Val, const SDLoc & DL, EVT VT )

inline

Definition at line 741 of file SelectionDAG.h.

References DL, and getConstantFP().

getTargetConstantFP() [3/3]

SDValue llvm::SelectionDAG::getTargetConstantFP ( double Val, const SDLoc & DL, EVT VT )

inline

Definition at line 735 of file SelectionDAG.h.

References DL, and getConstantFP().

getTargetConstantPool() [1/2]

SDValue llvm::SelectionDAG::getTargetConstantPool ( const Constant * C, EVT VT, MaybeAlign Align = std::nullopt, int Offset = 0, unsigned TargetFlags = 0 )

inline

Definition at line 770 of file SelectionDAG.h.

References C(), getConstantPool(), and llvm::Offset.

Referenced by getLargeExternalSymbol(), getLargeGlobalAddress(), getTargetNode(), getTargetNode(), getTargetNode(), llvm::XtensaTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerConstantPool(), llvm::LanaiTargetLowering::LowerConstantPool(), promoteToConstantPool(), llvm::SparcTargetLowering::withTargetFlags(), and llvm::VETargetLowering::withTargetFlags().

getTargetConstantPool() [2/2]

SDValue llvm::SelectionDAG::getTargetConstantPool ( MachineConstantPoolValue * C, EVT VT, MaybeAlign Align = std::nullopt, int Offset = 0, unsigned TargetFlags = 0 )

inline

Definition at line 779 of file SelectionDAG.h.

References C(), getConstantPool(), and llvm::Offset.

getTargetExternalSymbol() [1/2]

SDValue SelectionDAG::getTargetExternalSymbol	(	const char *	Sym,
		EVT	VT,
		unsigned	TargetFlags = 0 )

Definition at line 2134 of file SelectionDAG.cpp.

References getVTList(), N, and SDValue().

Referenced by determineConstraints(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), getTagSymNode(), getTargetExternalSymbol(), GetTLSADDR(), llvm::WebAssembly::getTLSBase(), getzOSCalleeAndADA(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::XtensaTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::VETargetLowering::lowerDYNAMIC_STACKALLOC(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::VETargetLowering::lowerINTRINSIC_WO_CHAIN(), selectBaseADDR(), transformCallee(), llvm::SparcTargetLowering::withTargetFlags(), and llvm::VETargetLowering::withTargetFlags().

getTargetExternalSymbol() [2/2]

SDValue SelectionDAG::getTargetExternalSymbol	(	RTLIB::LibcallImpl	LCImpl,
		EVT	VT,
		unsigned	TargetFlags = 0 )

Definition at line 2144 of file SelectionDAG.cpp.

References llvm::StringRef::data(), llvm::RTLIB::RuntimeLibcallsInfo::getLibcallImplName(), and getTargetExternalSymbol().

getTargetExtractSubreg()

SDValue SelectionDAG::getTargetExtractSubreg	(	int	SRIdx,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	Operand )

A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.

getTargetExtractSubreg - A convenience function for creating TargetOpcode::EXTRACT_SUBREG nodes.

Definition at line 12765 of file SelectionDAG.cpp.

References DL, getMachineNode(), getTargetConstant(), and SDValue().

Referenced by llvm::SITargetLowering::buildRSRC(), convertToF16(), expandBitCastF128ToI128(), extractGPRPair(), LowerF64Op(), LowerFNEGorFABS(), lowerGR128Binary(), lowerGR128ToI128(), narrowIfNeeded(), NarrowVector(), ReplaceCMP_SWAP_128Results(), and ReplaceCMP_SWAP_64Results().

getTargetFrameIndex()

SDValue llvm::SelectionDAG::getTargetFrameIndex ( int FI, EVT VT )

inline

Definition at line 756 of file SelectionDAG.h.

References getFrameIndex().

Referenced by addStackMapLiveVars(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForSetTag(), EmitUnrolledSetTag(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegImm34(), selectBaseADDR(), llvm::PPCTargetLowering::SelectOptimalAddrMode(), and SelectSAddrFI().

getTargetGlobalAddress()

SDValue llvm::SelectionDAG::getTargetGlobalAddress ( const GlobalValue * GV, const SDLoc & DL, EVT VT, int64_t offset = 0, unsigned TargetFlags = 0 )

inline

Definition at line 750 of file SelectionDAG.h.

References DL, and getGlobalAddress().

Referenced by buildPCRelGlobalAddress(), combineADDToMAT_PCREL_ADDR(), foldADDIForFasterLocalAccesses(), getADAEntry(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getTargetNode(), getTargetNode(), GetTLSADDR(), getzOSCalleeAndADA(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::HexagonTargetLowering::LowerCall(), llvm::LoongArchTargetLowering::LowerCall(), llvm::RISCVTargetLowering::LowerCall(), llvm::SITargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::VETargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerToTLSLocalDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), prepareDAGLevelOperands(), selectBaseADDR(), transformCallee(), llvm::SparcTargetLowering::withTargetFlags(), and llvm::VETargetLowering::withTargetFlags().

getTargetInsertSubreg()

SDValue SelectionDAG::getTargetInsertSubreg	(	int	SRIdx,
		const SDLoc &	DL,
		EVT	VT,
		SDValue	Operand,
		SDValue	Subreg )

A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.

getTargetInsertSubreg - A convenience function for creating TargetOpcode::INSERT_SUBREG nodes.

Definition at line 12775 of file SelectionDAG.cpp.

References DL, getMachineNode(), getTargetConstant(), and SDValue().

Referenced by convertFromF16(), LowerF64Op(), LowerFNEGorFABS(), and Widen().

getTargetJumpTable()

SDValue llvm::SelectionDAG::getTargetJumpTable ( int JTI, EVT VT, unsigned TargetFlags = 0 )

inline

Definition at line 761 of file SelectionDAG.h.

References getJumpTable().

Referenced by llvm::HexagonTargetLowering::getPICJumpTableRelocBase(), getTargetNode(), getTargetNode(), getTargetNode(), llvm::HexagonTargetLowering::LowerJumpTable(), llvm::LanaiTargetLowering::LowerJumpTable(), llvm::MSP430TargetLowering::LowerJumpTable(), and llvm::VETargetLowering::withTargetFlags().

getTargetLoweringInfo()

const TargetLowering & llvm::SelectionDAG::getTargetLoweringInfo ( ) const

inline

Definition at line 489 of file SelectionDAG.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), llvm::RegsForValue::AddInlineAsmOperands(), buildFromShuffleMostly(), canonicalizeBoolMask(), canonicalizeShuffleWithOp(), combineAdd(), combineAddMulh(), combineAddOrSubToADCOrSBB(), combineAnd(), combineAndNotOrIntoAndNotAnd(), combineAndnp(), combineAndShuffleNot(), combineBinOpOfZExt(), combineBitcast(), combineBitcastToBoolVector(), combineBITREVERSE(), combineBMI(), combineBT(), combineCMP(), combineCONCAT_VECTORS(), combineConcatVectorOfCasts(), combineConcatVectorOfConcatVectors(), combineConcatVectorOfExtracts(), combineConcatVectorOfScalars(), combineConcatVectorOps(), combineCVTPH2PS(), combineEXTEND_VECTOR_INREG(), combineEXTRACT_SUBVECTOR(), combineExtractFromVectorLoad(), combineExtractVectorElt(), combineFMA(), combineFMADDSUB(), combineFMinNumFMaxNum(), combineFneg(), combineFunnelShift(), combineGatherScatter(), combineINSERT_SUBVECTOR(), combineIntDivRem(), combineKSHIFT(), combineLoad(), combineLogicBlendIntoConditionalNegate(), combineLRINT_LLRINT(), combineMaskBitOp(), combineMaskedLoad(), combineMaskedStore(), combineMOVMSK(), combineOr(), combinePCLMULQDQ(), combinePMULDQ(), combinePTESTCC(), combineRotate(), combineScalarAndWithMaskSetcc(), combineScalarMinMaxAbsStore(), combineSelect(), combineSelectAsExtAnd(), combineSelectCCToPseudoMinMax(), combineSelectOfTwoConstants(), combineSetCC(), combineShiftAnd1ToBitTest(), combineShiftRightLogical(), combineShuffle(), combineShuffleToFMAddSub(), combineStore(), combineTargetShuffle(), combineTESTP(), combineToVCPOP(), combineTruncate(), combineTruncatedArithmetic(), combineTruncateWithSat(), combineTruncSelectToSMaxUSat(), combineVECREDUCE_LOGIC(), combineVectorInsert(), combineVectorMulToSraBitcast(), combineVectorShiftImm(), combineVectorShiftVar(), combineVEXTRACT_STORE(), combineVPMADD(), combineVPMADD52LH(), combineVSelectToBLENDV(), combineVTRUNC(), combineX86FPLogicOp(), combineX86GatherScatter(), combineX86INT_TO_FP(), combineX86ShuffleChain(), combineX86ShuffleChainWithExtract(), combineX86ShufflesConstants(), combineX86ShufflesRecursively(), combineXor(), createMMXBuildVector(), createSetFPEnvNodes(), detectEvenOddMultiplyOperand(), EltsFromConsecutiveLoads(), expandBitCastF128ToI128(), expandBitCastI128ToF128(), ExpandPowI(), expandVAArg(), expandVACopy(), foldAndOrOfSETCC(), foldCONCAT_VECTORS(), foldExtendedSignBitTest(), foldExtractSubvectorFromShuffleVector(), foldMaskedShiftToUSHL(), foldSelectWithIdentityConstant(), foldShuffleOfConcatUndefs(), foldToMaskedStore(), foldVSelectToSignBitSplatMask(), foldXorTruncShiftIntoCmp(), formSplatFromShuffles(), getADAEntry(), getAddressForMemoryInput(), getAVX2GatherNode(), getAVX512Node(), getAVX512TruncNode(), getBT(), getConstVector(), getConstVector(), getContainerForFixedLengthVector(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), getGatherNode(), getJumpTableDebugInfo(), getKnownUndefForVectorBinop(), getLegalMaskAndStepVector(), getLifetimeNode(), getLoadStackGuard(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getMemsetValue(), getPredicateForFixedLengthVector(), getPredicateForScalableVector(), getPrefetchNode(), getPTest(), getRegistersForValue(), getScatterNode(), getSVEPredicateBitCast(), getTagSymNode(), getUniformBase(), getZeroVector(), getzOSCalleeAndADA(), isAddSubOrSubAdd(), isBLACompatibleAddress(), isConsecutiveLSLoc(), IsNOT(), isNOT(), isPackedPredicateType(), isPackedVectorType(), LowerABD(), LowerADDRSPACECAST(), LowerADDSAT_SUBSAT(), LowerADDSUBO_CARRY(), LowerATOMIC_STORE(), LowerBUILD_VECTORvXi1(), lowerBuildVectorAsBroadcast(), lowerBuildVectorToBitOp(), LowerCTPOP(), LowerCTPOP(), LowerCTTZ(), LowerFABSorFNEG(), LowerFCOPYSIGN(), LowerFMINIMUM_FMAXIMUM(), lowerGR128ToI128(), lowerI128ToGR128(), LowerMemOpCallTo(), LowerMSCATTER(), LowerMULH(), LowerMULO(), LowerRotate(), LowerShiftParts(), lowerShuffleAsElementInsertion(), lowerShuffleAsShift(), LowerStore(), LowerUINT_TO_FP_i64(), lowerUINT_TO_FP_vXi32(), LowerVASTART(), LowerVASTART(), LowerVECREDUCE(), lowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLEAsShift(), LowerVectorAllEqual(), LowerVSETCC(), LowerXALUO(), matchLSNode(), matchRotateSub(), matchSplatAsGather(), mayFoldIntoVector(), narrowExtractedVectorBinOp(), narrowExtractedVectorLoad(), narrowInsertExtractVectorBinOp(), narrowShuffle(), patchMatchingInput(), peekThroughDemandedElts(), performADDCombine(), performAddCSelIntoCSinc(), performAddSubIntoVectorOp(), PerformANDCombine(), performANDCombine(), PerformARMBUILD_VECTORCombine(), performBICiCombine(), performBuildVectorCombine(), performConcatVectorsCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), performDemandedBitsCombine(), performExtBinopLoadFold(), PerformExtendCombine(), performEXTENDCombine(), PerformExtractEltToVMOVRRD(), performExtractLastActiveCombine(), performFP_TO_INT_SATCombine(), performFP_TO_INTCombine(), performG