LLVM 24.0.0git
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llvm::HexagonRegisterInfo Class Reference

#include "Target/Hexagon/HexagonRegisterInfo.h"

Inheritance diagram for llvm::HexagonRegisterInfo:
[legend]

Public Member Functions

 HexagonRegisterInfo (unsigned HwMode)
const MCPhysReg * getCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods...
const uint32_t * getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
BitVector getReservedRegs (const MachineFunction &MF) const override
Register computeStackAlignBaseRegister (const MachineFunction &MF) const
 Compute the first available callee-saved register to use as the aligned-stack base register when this function needs dynamic stack realignment.
bool eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 Returns true since we may need scavenging for a temporary register when generating hardware loop instructions.
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 Returns true.
bool useFPForScavengingIndex (const MachineFunction &MF) const override
 Returns true if the frame pointer is valid.
bool shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
Register getFrameRegister (const MachineFunction &MF) const override
Register getFrameRegister () const
Register getStackRegister () const
unsigned getHexagonSubRegIndex (const TargetRegisterClass &RC, unsigned GenIdx) const
const MCPhysReg * getCallerSavedRegs (const MachineFunction *MF, const TargetRegisterClass *RC) const
const TargetRegisterClass * getPointerRegClass (unsigned Kind=0) const override
bool isGlobalReg (MCPhysReg Reg) const
 Returns true if the given reserved physical register is live across function calls/returns.
bool isFakeReg (MCPhysReg Reg) const
 Returns true if the given reserved physical register Reg is live across function calls/returns.
bool isEHReturnCalleeSaveReg (Register Reg) const

Detailed Description

Definition at line 29 of file HexagonRegisterInfo.h.

Constructor & Destructor Documentation

◆ HexagonRegisterInfo()

HexagonRegisterInfo::HexagonRegisterInfo ( unsigned HwMode)

Definition at line 52 of file HexagonRegisterInfo.cpp.

Member Function Documentation

◆ computeStackAlignBaseRegister()

Register HexagonRegisterInfo::computeStackAlignBaseRegister ( const MachineFunction & MF) const

Compute the first available callee-saved register to use as the aligned-stack base register when this function needs dynamic stack realignment.

This does not update the machine function info.

Definition at line 171 of file HexagonRegisterInfo.cpp.

References computeStackAlignBaseRegister().

Referenced by computeStackAlignBaseRegister(), and getReservedRegs().

◆ eliminateFrameIndex()

bool HexagonRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator II,
int SPAdj,
unsigned FIOperandNum,
RegScavenger * RS = nullptr ) const
override

Definition at line 257 of file HexagonRegisterInfo.cpp.

References llvm::LiveRegUnits::accumulateUsedDefed(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), DL, FrameIndexReuseLimit, FrameIndexSearchRange, llvm::HexagonSubtarget::getInstrInfo(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), I, II, llvm::SmallSet< T, N, C >::insert(), llvm::MachineInstr::isCall(), MI, llvm::Offset, Opc, llvm::MachineInstr::operands(), llvm::MachineBasicBlock::rend(), llvm::SmallSet< T, N, C >::size(), and Uses.

◆ getCalleeSavedRegs()

const MCPhysReg * HexagonRegisterInfo::getCalleeSavedRegs ( const MachineFunction * MF) const
override

Code Generation virtual methods...

Definition at line 134 of file HexagonRegisterInfo.cpp.

References llvm::MachineFunction::getInfo().

Referenced by llvm::HexagonFrameLowering::determineCalleeSaves().

◆ getCallerSavedRegs()

const MCPhysReg * HexagonRegisterInfo::getCallerSavedRegs ( const MachineFunction * MF,
const TargetRegisterClass * RC ) const

Definition at line 82 of file HexagonRegisterInfo.cpp.

References llvm::dbgs(), DenseMapInfo< LocallyHashedType >::Empty, llvm::MCRegisterClass::getID(), llvm_unreachable, R2, R4, R6, llvm::V1, and llvm::V3.

Referenced by needToReserveScavengingSpillSlots().

◆ getCallPreservedMask()

const uint32_t * HexagonRegisterInfo::getCallPreservedMask ( const MachineFunction & MF,
CallingConv::ID  ) const
override

Definition at line 156 of file HexagonRegisterInfo.cpp.

Referenced by llvm::HexagonTargetLowering::LowerCall().

◆ getFrameRegister() [1/2]

Register HexagonRegisterInfo::getFrameRegister ( ) const

Definition at line 460 of file HexagonRegisterInfo.cpp.

Referenced by getFrameRegister().

◆ getFrameRegister() [2/2]

Register HexagonRegisterInfo::getFrameRegister ( const MachineFunction & MF) const
override

Definition at line 451 of file HexagonRegisterInfo.cpp.

References getFrameRegister(), getStackRegister(), and llvm::TargetFrameLowering::hasFP().

Referenced by llvm::HexagonInstrInfo::expandPostRAPseudo(), and llvm::HexagonTargetLowering::LowerFRAMEADDR().

◆ getHexagonSubRegIndex()

unsigned HexagonRegisterInfo::getHexagonSubRegIndex ( const TargetRegisterClass & RC,
unsigned GenIdx ) const

Definition at line 470 of file HexagonRegisterInfo.cpp.

References assert(), llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::empty(), getHexagonSubRegIndex(), llvm::MCRegisterClass::getID(), getRegClass(), llvm_unreachable, llvm::Hexagon::ps_sub_hi, llvm::Hexagon::ps_sub_lo, and llvm::MCRegisterClass::superclasses().

Referenced by getHexagonSubRegIndex().

◆ getPointerRegClass()

const TargetRegisterClass * HexagonRegisterInfo::getPointerRegClass ( unsigned Kind = 0) const
override

Definition at line 501 of file HexagonRegisterInfo.cpp.

◆ getReservedRegs()

BitVector HexagonRegisterInfo::getReservedRegs ( const MachineFunction & MF) const
override

Definition at line 162 of file HexagonRegisterInfo.cpp.

References computeStackAlignBaseRegister(), and llvm::Reserved.

◆ getStackRegister()

Register HexagonRegisterInfo::getStackRegister ( ) const

Definition at line 465 of file HexagonRegisterInfo.cpp.

Referenced by llvm::HexagonInstrInfo::getDuplexCandidateGroup(), getFrameRegister(), and llvm::HexagonTargetLowering::LowerCall().

◆ isEHReturnCalleeSaveReg()

bool HexagonRegisterInfo::isEHReturnCalleeSaveReg ( Register Reg) const

Definition at line 76 of file HexagonRegisterInfo.cpp.

◆ isFakeReg()

bool HexagonRegisterInfo::isFakeReg ( MCPhysReg Reg) const

Returns true if the given reserved physical register Reg is live across function calls/returns.

This function should not be used for non-reserved registers, instead register liveness information should be checked

Definition at line 66 of file HexagonRegisterInfo.cpp.

◆ isGlobalReg()

bool HexagonRegisterInfo::isGlobalReg ( MCPhysReg Reg) const

Returns true if the given reserved physical register is live across function calls/returns.

Definition at line 56 of file HexagonRegisterInfo.cpp.

◆ requiresFrameIndexScavenging()

bool llvm::HexagonRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction & MF) const
inlineoverride

Returns true.

Spill code for predicate registers might need an extra register.

Definition at line 57 of file HexagonRegisterInfo.h.

◆ requiresRegisterScavenging()

bool llvm::HexagonRegisterInfo::requiresRegisterScavenging ( const MachineFunction & MF) const
inlineoverride

Returns true since we may need scavenging for a temporary register when generating hardware loop instructions.

Definition at line 51 of file HexagonRegisterInfo.h.

◆ shouldCoalesce()

bool HexagonRegisterInfo::shouldCoalesce ( MachineInstr * MI,
const TargetRegisterClass * SrcRC,
unsigned SubReg,
const TargetRegisterClass * DstRC,
unsigned DstSubReg,
const TargetRegisterClass * NewRC,
LiveIntervals & LIS ) const
override

Definition at line 402 of file HexagonRegisterInfo.cpp.

References llvm::any_of(), llvm::MCRegisterClass::getID(), llvm::SlotIndexes::getInstructionFromIndex(), llvm::LiveIntervals::getInterval(), llvm::LiveIntervals::getSlotIndexes(), llvm::MachineFunction::getSubtarget(), I, MI, and llvm::HexagonSubtarget::useHVXOps().

◆ useFPForScavengingIndex()

bool HexagonRegisterInfo::useFPForScavengingIndex ( const MachineFunction & MF) const
override

Returns true if the frame pointer is valid.

Definition at line 495 of file HexagonRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget().

The documentation for this class was generated from the following files:
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