LLVM 24.0.0git
Macros | Functions
R600InstrInfo.cpp File Reference

R600 Implementation of TargetInstrInfo. More...

#include "R600InstrInfo.h"
#include "MCTargetDesc/R600MCTargetDesc.h"
#include "R600Defines.h"
#include "R600Subtarget.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "R600GenDFAPacketizer.inc"
#include "R600GenInstrInfo.inc"

Go to the source code of this file.

Macros

#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRINFO_CTOR_DTOR
#define GET_INSTRMAP_INFO
#define GET_INSTRINFO_NAMED_OPS
#define OPERAND_CASE(Label)

Functions

static std::vector< std::pair< int, unsigned > > Swizzle (std::vector< std::pair< int, unsigned > > Src, R600InstrInfo::BankSwizzle Swz)
static unsigned getTransSwizzle (R600InstrInfo::BankSwizzle Swz, unsigned Op)
static bool NextPossibleSolution (std::vector< R600InstrInfo::BankSwizzle > &SwzCandidate, unsigned Idx)
 Given a swizzle sequence SwzCandidate and an index Idx, returns the next (in lexicographic term) swizzle sequence assuming that all swizzles after Idx can be skipped.
static bool isConstCompatible (R600InstrInfo::BankSwizzle TransSwz, const std::vector< std::pair< int, unsigned > > &TransOps, unsigned ConstCount)
 Instructions in Trans slot can't read gpr at cycle 0 if they also read a const, and can't read a gpr at cycle 1 if they read 2 const.
static bool isPredicateSetter (unsigned Opcode)
static MachineInstr * findFirstPredicateSetterFrom (MachineBasicBlock &MBB, MachineBasicBlock::iterator I)
static bool isJump (unsigned Opcode)
static bool isBranch (unsigned Opcode)
static MachineBasicBlock::iterator FindLastAluClause (MachineBasicBlock &MBB)
static R600::OpName getSlotedOps (R600::OpName Op, unsigned Slot)

Detailed Description

R600 Implementation of TargetInstrInfo.

Definition in file R600InstrInfo.cpp.

Macro Definition Documentation

◆ GET_INSTRINFO_CTOR_DTOR [1/2]

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 22 of file R600InstrInfo.cpp.

◆ GET_INSTRINFO_CTOR_DTOR [2/2]

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 22 of file R600InstrInfo.cpp.

◆ GET_INSTRINFO_NAMED_OPS

#define GET_INSTRINFO_NAMED_OPS

Definition at line 27 of file R600InstrInfo.cpp.

◆ GET_INSTRMAP_INFO

#define GET_INSTRMAP_INFO

Definition at line 26 of file R600InstrInfo.cpp.

◆ OPERAND_CASE

#define OPERAND_CASE ( Label)
Value:
case Label: { \
static const R600::OpName Ops[] = {Label##_X, Label##_Y, Label##_Z, \
Label##_W}; \
return Ops[Slot]; \
}
Ops
const AbstractManglingParser< Derived, Alloc >::OperatorInfo AbstractManglingParser< Derived, Alloc >::Ops[]
Definition ItaniumDemangle.h:3392

Definition at line 1240 of file R600InstrInfo.cpp.

Referenced by getSlotedOps().

Function Documentation

◆ findFirstPredicateSetterFrom()

MachineInstr * findFirstPredicateSetterFrom ( MachineBasicBlock & MBB,
MachineBasicBlock::iterator I )
static

Definition at line 614 of file R600InstrInfo.cpp.

References I, isPredicateSetter(), MBB, and MI.

Referenced by llvm::R600InstrInfo::insertBranch(), and llvm::R600InstrInfo::removeBranch().

◆ FindLastAluClause()

MachineBasicBlock::iterator FindLastAluClause ( MachineBasicBlock & MBB)
static

Definition at line 709 of file R600InstrInfo.cpp.

References E(), and MBB.

Referenced by llvm::R600InstrInfo::insertBranch(), and llvm::R600InstrInfo::removeBranch().

◆ getSlotedOps()

R600::OpName getSlotedOps ( R600::OpName Op,
unsigned Slot )
static

Definition at line 1247 of file R600InstrInfo.cpp.

References llvm_unreachable, and OPERAND_CASE.

Referenced by llvm::R600InstrInfo::buildSlotOfVectorInstruction().

◆ getTransSwizzle()

unsigned getTransSwizzle ( R600InstrInfo::BankSwizzle Swz,
unsigned Op )
static

Definition at line 367 of file R600InstrInfo.cpp.

References llvm::R600InstrInfo::ALU_VEC_012_SCL_210, llvm::R600InstrInfo::ALU_VEC_021_SCL_122, llvm::R600InstrInfo::ALU_VEC_102_SCL_221, llvm::R600InstrInfo::ALU_VEC_120_SCL_212, assert(), and llvm_unreachable.

Referenced by isConstCompatible(), and llvm::R600InstrInfo::isLegalUpTo().

◆ isBranch()

bool isBranch ( unsigned Opcode)
static

Definition at line 631 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::analyzeBranch(), decodePCDBLOperand(), llvm::HexagonShuffler::GetPacketSummary(), llvm::HexagonMCInstrInfo::isConstExtended(), llvm::HexagonInstrInfo::isPredictedTaken(), llvm::MCInstrAnalysis::mayAffectControlFlow(), llvm::HexagonInstrInfo::reverseBranchCondition(), translateImmediate(), tryAddingSymbolicOperand(), tryAddingSymbolicOperand(), and tryAddingSymbolicOperand().

◆ isConstCompatible()

bool isConstCompatible ( R600InstrInfo::BankSwizzle TransSwz,
const std::vector< std::pair< int, unsigned > > & TransOps,
unsigned ConstCount )
static

Instructions in Trans slot can't read gpr at cycle 0 if they also read a const, and can't read a gpr at cycle 1 if they read 2 const.

Definition at line 480 of file R600InstrInfo.cpp.

References getTransSwizzle().

Referenced by llvm::R600InstrInfo::fitsReadPortLimitations().

◆ isJump()

bool isJump ( unsigned Opcode)
static

Definition at line 627 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::analyzeBranch().

◆ isPredicateSetter()

bool isPredicateSetter ( unsigned Opcode)
static

Definition at line 604 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::analyzeBranch(), llvm::R600InstrInfo::ClobbersPredicate(), and findFirstPredicateSetterFrom().

◆ NextPossibleSolution()

bool NextPossibleSolution ( std::vector< R600InstrInfo::BankSwizzle > & SwzCandidate,
unsigned Idx )
static

Given a swizzle sequence SwzCandidate and an index Idx, returns the next (in lexicographic term) swizzle sequence assuming that all swizzles after Idx can be skipped.

Definition at line 444 of file R600InstrInfo.cpp.

References llvm::R600InstrInfo::ALU_VEC_012_SCL_210, llvm::R600InstrInfo::ALU_VEC_210, and assert().

Referenced by llvm::R600InstrInfo::FindSwizzleForVectorSlot().

◆ Swizzle()

std::vector< std::pair< int, unsigned > > Swizzle ( std::vector< std::pair< int, unsigned > > Src,
R600InstrInfo::BankSwizzle Swz )
static

Definition at line 339 of file R600InstrInfo.cpp.

References llvm::R600InstrInfo::ALU_VEC_012_SCL_210, llvm::R600InstrInfo::ALU_VEC_021_SCL_122, llvm::R600InstrInfo::ALU_VEC_102_SCL_221, llvm::R600InstrInfo::ALU_VEC_120_SCL_212, llvm::R600InstrInfo::ALU_VEC_201, llvm::R600InstrInfo::ALU_VEC_210, and std::swap().

Referenced by llvm::R600InstrInfo::isLegalUpTo().

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