The ZipCPU blog, featuring how to discussions of FPGA and soft-core CPU design. This site will be focused on Verilog solutions, using exclusively OpenSource IP products for FPGA design. Particular focus areas include topics often left out of more mainstream FPGA design courses such as how to debug an FPGA design.
Last year, I competed against several other projects for a European grant to build an open source UHS-II hardware controller for higher speed access to SD cards. After winning the award, but before the grant, I was asked to sign a statement committing myself to following the IEEE Code of Ethics. I wrote the following in response, dated 14 January, 2026, to their request. Two things happened as a…
I often enjoy posting a “bug-of-the week” on X . Following a recent bug post , someone asked me how I found such bugs: So I thought I might share the following story, in illustration of how a bug can be found. It started a couple weeks ago, when a friend recently pointed me to an Open Source eMMC controller posted by Lattice Semiconductor on GitHub . He asked me for my thoughts. My first response…
After building a CPU , utilities for handling bus interconnects , several DMAs and memory controllers, I often find my time focused on building interfaces between designs and external peripherals. This seems to be where most of the business has landed for me. Often, these peripherals require a clock output, coming from the design, and so I’d like to spend some time describing how to generate such…
This quiz is brought to you courtesy of Xilinx’s AXI slave template . Thankfully, they’ve since (sort-of) fixed this bug since I wrote that . I say “sort-of” because … the bug just got pushed around. It’s still broken, just not in the same way.
Last year, I had the wonderful opportunity of mentoring Angelo as he built an open source DDR3 SDRAM controller . Today, I have the opportunity to compare this controller with AMD (Xilinx)’s Memory Interface Generator (MIG) solution to the same problem. Let’s take a look to see which one is faster, better, and/or cheaper. Design differences Before diving into the comparison, it’s worth…
Welcome to the ZipCPU blog. I started it years ago after building my own soft core CPU, the ZipCPU , and dedicated this blog to helping individuals stay out of FPGA Hell . I then transitioned from working on the ZipCPU , to building bus components that might be used by every project–crossbars, bridges, DMAs and such. Since that time, my time is primarily spent not on the CPU, but rather its…
The following was a request for help from my inbox. It illustrates a common problem students have. Indeed, the problem is common enough that this blog was dedicated to its solution. Let me repeat the question here for reference: I’ve read some of your articles and old comments on forums in trying to get something resembling Xilinx’ AXI4 Peripheral to work with my current project in VIVADO for my…
This week, I’ve been testing a CI/CD pipeline. This has been my opportunity to shake the screws and kick the tires on what should become a new verification product shortly. I thought that a good design to check might be my SDIO project . It has roughly all the pieces in place, and so makes sense for an automated testing pipeline. This weekend, the CI project engineer shared with me: It’s literally…
I’ve come across two approaches to video synchronization. The first, used by a lot of the Xilinx IP I’ve come across, is to hold the video pipeline in reset until everything is ready and then release the resets (in the right and proper order) to get the design started. If something goes wrong, however, there’s no room for recovery. The second approach is the approach I like to use, which is to…
Ever had one of those problems where you were stuck for weeks? It’s not supposed to happen, but … it does. Let me tell you about the Kimos story so far. What is Kimos? Kimos is the name of one of the current open source projects I’m working on. The project is officially named the “Kintex-7 Memory controller, Open Source toolchain”, but the team shortened that to “KiMOS” and I’ve gotten to the…