# mbp (blogs) — RSS Amplifier Recent posts from the 1 feeds in the RSS Amplifier directory that cover mbp. Page: Feed: --- ## [25 Mbps discrete logic transceiver – TX prototype debugging](https://helentronica.com/2025/09/19/25-mbps-discrete-logic-transceiver-tx-prototype-debugging/) _2025-09-19 · Pero · HELENTRONICA_ Introduction In my previous post, I talked about the design of a simple 25 Mbps transmitter with PRBS generator, encoding and pre-emphasis. I designed the circuit using the discrete logic components in order to get a better understanding of modern transceiver circuits. Since the standard (25 Gbps and higher) transceivers are implemented in the silicon ## [25 Mbps discrete logic transceiver: Building a 25 MHz PLL with 74HC4046](https://helentronica.com/2025/08/21/25-mbps-discrete-logic-transceiver-building-a-25-mhz-pll-with-74hc4046/) _2025-08-21 · Pero · HELENTRONICA_ Introduction In the receiver portion of my 25 Mbps discrete logic transceiver project, I will eventually need a functional phase-locked loop (PLL) for one reason or another, but certainly for the clock data recovery circuit (CDR). Browsing the suitable components, that is, 5V CMOS, able to work with 25 MHz, not being super clunky and ## [25 Mbps discrete logic transceiver for learning purposes](https://helentronica.com/2025/05/27/25-mbps-discrete-logic-transceiver-for-learning-purposes/) _2025-05-27 · Pero · HELENTRONICA_ Introduction I am about to build a full PHY (physical, duh) layer for data transmission that simulates the multi-Gbps transceiver circuits usually seen in high-end FPGAs and ASICs. The reason I m doing that is to get a closer understanding of the inner architecture of these advanced circuits, so ubiquitous in modern communication systems. To really