Getting to the Heart of Unikernels

A ‘Hidden’ Hierarchy In Plain Sight graph LR ROOT['Sealed artifact
one image, self-contained'] ROOT --> SEQ['Braided Parallelism
instruction stream'] ROOT --> SIMT['SIMT
lockstep thread groups'] ROOT --> DF['Dataflow
compiled graph'] ROOT --> FIX['Fixed fabric
synthesized logic'] SEQ --> MCU['SoC/MCU
reset vector,
register direct'] SEQ --> UVM['CPU…