# euv (blogs) — RSS Amplifier Recent posts from the 2 feeds in the RSS Amplifier directory that cover euv. Page: Feed: --- ## [Chips, Mergers and Acquisitions Are on the Rise Again!](https://chippub.substack.com/p/chips-mergers-and-acquisitions-are) _2026-08-21 · Meng Li · ChipPub_ How generative AI reshapes semiconductor M&A, EDA tools, cloud‑edge chips, and advanced packaging through 2026. ## [Marvell Lands Major Deal with Google](https://chippub.substack.com/p/marvell-lands-major-deal-with-google) _2026-08-20 · Meng Li · ChipPub_ Marvell wins Google custom chip deal, TPU expansion, and up to $12B warrant stake in AI infrastructure race. ## [U6G "Golden Spectrum" Debuts, RadRock Strengthens RF Core](https://chippub.substack.com/p/u6g-golden-spectrum-debuts-radrock) _2026-08-19 · Meng Li · ChipPub_ U6G golden spectrum RF solution by RadRock boosts 6G connectivity and device performance. ## [Meta's First Training Chip Makes Official Debut](https://chippub.substack.com/p/metas-first-training-chip-makes-official) _2026-08-18 · Meng Li · ChipPub_ Meta MTIA 300 training chip with built‑in NICs, collective offload, and near‑memory compute delivers superior DLRM performance and cost advantages over GPUs. ## [Fiberglass Cloth Shortage: Exceptionally Severe!](https://chippub.substack.com/p/fiberglass-cloth-shortage-exceptionally) _2026-08-17 · Meng Li · ChipPub_ PCB material costs surge as Nan Ya raises CCL and PP prices 20–25%. Fiberglass cloth shortage worsens, supply tight through 2027, driving downstream price hikes. ## [Intel: A Return to Storage?](https://chippub.substack.com/p/intel-a-return-to-storage) _2026-08-16 · Meng Li · ChipPub_ Intel rethinks memory strategy with new architectures, advanced packaging, and foundry services, aiming to redefine computing and storage integration in the AI era. ## [Chips: Getting Bigger and Bigger!](https://chippub.substack.com/p/chips-getting-bigger-and-bigger) _2026-08-14 · Meng Li · ChipPub_ How TSMC, Intel, and Samsung scale AI chips from nanometers to 14× reticle size with CoWoS, EMIB, and 3D stacking—yield, thermal, and system challenges explained. ## [SerDes: The Decisive Factor](https://chippub.substack.com/p/serdes-the-decisive-factor) _2026-08-13 · Meng Li · ChipPub_ How SerDes high speed interconnect IP drives AI ASIC competition, with 448G adoption reshaping data center chips and cloud vendor strategies. ## [TSMC Advanced Packaging: Latest Insights](https://chippub.substack.com/p/tsmc-advanced-packaging-latest-insights) _2026-08-12 · Meng Li · ChipPub_ TSMC reveals latest advanced packaging progress including CoWoS capacity, 5.5x reticle mass production with 98% yield, SoIC hybrid bonding, and ABF substrate challenges in the AI era. ## [Next-Gen EUV Lithography: Samsung Decides](https://chippub.substack.com/p/next-gen-euv-lithography-samsung) _2026-08-11 · Meng Li · ChipPub_ Samsung targets 1nm chip mass production with High-NA EUV by 2030, challenging TSMC and Intel in next-gen lithography. ## [CLI-first decentralized GPU compute (Sponsored)](https://crawlproof.com/a/PPtj1I0djGWS) _2026-08-11 · **Sponsored**_ Pay workers or run your GPU for FFmpeg transcode and AI inference. ## [All Eyes Are on EUV Lithography Machines](https://chippub.substack.com/p/all-eyes-are-on-euv-lithography-machines) _2026-08-10 · Meng Li · ChipPub_ EUV lithography is expanding beyond top five chipmakers as second-tier fabs adopt it, while new challengers target ASML's dominance. ## [Is Musk About to Disrupt EUV Lithography?](https://chippub.substack.com/p/is-musk-about-to-disrupt-euv-lithography) _2026-08-09 · Meng Li · ChipPub_ Elon Musk may disrupt EUV lithography using FEL technology. Explore the potential and challenges of this next generation light source. ## [America Bets on the "Post-GPU Era"](https://chippub.substack.com/p/america-bets-on-the-post-gpu-era) _2026-08-07 · Meng Li · ChipPub_ US shifts chip strategy from factory subsidies to equity stakes in seven disruptive tech firms, betting on CPO, ferroelectric memory, and post-GPU innovations. ## [Atomic Layer Etching as a Scaling Enabler: From Isotropic Chemistry to Selective, Directional, and Geometry-Driven Patterning](https://www.blog.baldengineering.com/2025/12/atomic-layer-etching-as-scaling-enabler.html) _2025-12-23 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Continued scaling in semiconductor manufacturing increasingly relies on atomic-scale control of etching for complex 3D material stacks, making patterning precision a growing industrial bottleneck. Atomic layer etching (ALE) has emerged as a key enabler, with plasma-driven anisotropy and surface-chemistry control allowing improved selectivity and profile fidelity for advanced logic and memory… ## [Intel Foundry Advances Future Logic Scaling with Manufacturable 2D Transistors and High NA EUV Integration](https://www.blog.baldengineering.com/2025/12/intel-foundry-advances-future-logic.html) _2025-12-21 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Intel Foundry has demonstrated concrete momentum in de-risking 2D field-effect transistors as a future scaling path beyond silicon, through long-term collaboration with Imec . Results presented at IEDM show a world-first, 300 mm fab-compatible integration of key 2DFET modules, including source/drain contacts and gate stacks, using transition-metal dichalcogenide channels (WS₂ and MoS₂ for n-type,… ## [Nanexa and Moderna partner on ALD-based PharmaShell drug delivery platform in licensing deal with USD 3 million upfront payment](https://www.blog.baldengineering.com/2025/12/nanexa-and-moderna-partner-on-ald-based.html) _2025-12-12 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Nanexa and Moderna have entered into a license and option agreement covering the development of up to five undisclosed drug compounds using Nanexa’s PharmaShell® drug delivery platform. The agreement includes an upfront payment of USD 3 million to Nanexa, with the potential for up to USD 500 million in development and commercial milestone payments, as well as tiered single-digit royalties on… ## [Capacitive memory built on a TSMC CMOS chip (reported in Nature)](https://www.blog.baldengineering.com/2025/12/capacitive-memory-built-on-tsmc-cmos.html) _2025-12-09 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Researchers led by Junmo Lee from Georgia Institute of Technology in collaboration with Taiwan Semiconductor Manufacturing Company (TSMC) have demonstrated a new type of capacitive memory integrated directly on a CMOS chip. The work uses atomic layer deposition (ALD) and a dual-gated device architecture, pointing toward higher-density, low-power memory that can be integrated into advanced logic… ## [The 2026 Area Selective Deposition Workshop (ASD 2026)](https://www.blog.baldengineering.com/2025/11/the-2026-area-selective-deposition.html) _2025-11-12 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ The ASD Workshop was initiated in 2016 to provide a scientific communication channel to learn and exchange about selective deposition techniques. It has since offered a forum for open discussions between researchers from academia and industry. The meeting will include one day of Tutorials followed by the Workshop at ETEC Building (University at Albany). The last day of the workshop will highlight… ## [Samsung Researchers Achieve Near-Perfect Grain Orientation in Atomic Layer Deposited Ruthenium for Next-Generation Interconnects](https://www.blog.baldengineering.com/2025/11/samsung-researchers-achieve-near.html) _2025-11-10 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Researchers at the Samsung Advanced Institute of Technology (SAIT) have unveiled a breakthrough in interconnect materials at IEDM 2025 with their paper “Grain-Orientation-Engineering of Atomic Layer Deposited Ruthenium Interconnect Technology.” As semiconductor scaling pushes below 10 nm, conventional copper wiring faces mounting resistance and reliability challenges. The SAIT team demonstrated… ## [IEDM2025 Tutorial - Atomic layer deposited atomically thin In₂O₃ transistors for BEOL logic and memory applications](https://www.blog.baldengineering.com/2025/11/iedm2025-tutorial-atomic-layer.html) _2025-11-10 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ The IEDM 2025 T3 tutorial session titled “Atomic-layer-deposited atomically thin In₂O₃ transistors for BEOL logic and memory applications” will focus on recent progress in oxide semiconductor thin-film transistor (TFT) technologies designed for back-end-of-line (BEOL) 3D integration. The work is closely associated with Professor Peide (Peter) Ye’s group at Purdue University, which has been leading… ## [Stream Torrents and IPTV Instantly (Sponsored)](https://crawlproof.com/a/79MLei2BTklc) _2025-11-10 · **Sponsored**_ Search, index, and play music, movies, books, and live TV in your browser. ## [Applied Materials Deepens Partnership with Besi and Launches Kinex™ – the Industry’s First Fully Integrated Die-to-Wafer Hybrid Bonding System for Next-Gen AI and Memory Chips](https://www.blog.baldengineering.com/2025/11/applied-materials-deepens-partnership.html) _2025-11-08 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Applied Materials announced it has acquired a 9% stake in BE Semiconductor Industries (Besi) to strengthen their ongoing collaboration on hybrid bonding technology for advanced semiconductor packaging. Building on a partnership that began in 2020, the two companies recently extended their agreement to co-develop the industry’s first fully integrated die-based hybrid bonding system—combining… ## [Plasma-Based Deposition Refines ALD for Next-Gen DRAM: 30% Higher k, 40× Lower Leakage](https://www.blog.baldengineering.com/2025/10/plasma-based-deposition-refines-ald-for.html) _2025-10-27 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ Researchers from POSTECH and UNIST in Korea have unveiled a new atomic-layer process using plasma-based deposition (PDP) to significantly improve DRAM capacitors. This innovation addresses a critical challenge in semiconductor manufacturing: enhancing the performance of high-k dielectric materials without introducing defects that cause electrical leakage. The PDP process refines the deposition of… ## [AlixLabs presents HAR narrow-fin patterning at ECS 248](https://www.blog.baldengineering.com/2025/10/alixlabs-presents-har-narrow-fin.html) _2025-10-26 · Jonas Sundqvist · BALD Engineering - Born in Finland, Born to ALD_ AlixLabs is pleased to announce that Dr. Dmitry Suyatin, CIPO and Co-Founder, has presented the company’s latest advances in APS™ (Atomic Layer Etching Pitch Splitting) at the 248th Electrochemical Society (ECS) Meeting held in Chicago, October 12–16, 2025. During the session, Dr. Suyatin highlighted new experimental results demonstrating high-aspect-ratio (HAR), narrow-fin patterning on bulk…