FPGAs, electronics, programming & retrocomputing
A while back, I accidentally came across a (beautiful!) guitar rendition of a C64’s Last Ninja game music, and boy, did that bring back childhood memories. The MOS6581 – SID was always my favourite sound chip of that generation, and I’ve wanted to build something around it for a long time. Luckily, I had some spare time, so I finally started a project. The plan was simple: get a SID playing on an…
Like a lot of people I know, I really got into baking during COVID. Started with sourdough of course, didn’t really work out. The love of baking stuck though. Over the years, many great breads made from a mix of buckwheat, rye and whole wheat were baked and eaten, usually while still hot. Also, many, many failed attempts – I even managed to make a normally leavened bread that was flatter than the…
In the previous post, I introduced my idea of implementing the Mandelbrot set on an FPGA and described the Mandelbrot set equation and the Escape-time coloring algorithm. This post will talk about the implementation. Modeling the Mandelbrot set I consider it a good idea to start any FPGA implementation work with some planning, and in the case of an algorithm, the first thing you’d want to do is…
Introduction to the Mandelbrot set Like I mentioned in the previous post, I wanted to familiarize myself with the HDMI output on the DE10-nano FPGA board, and there is no harm in getting some pretty graphics along the way, so I decided to implement a Mandelbrot set viewer on FPGA. If you are not familiar with the Mandelbrot set, it is a type of a fractal, which is simply put an infinitely –…
Just got this board a few days ago! Thank yous go to mahen, who was kind enough to sponsor the board for me (thanks again man, I really appreciate it!). For those not familiar with it, this board is the basis of MiSTer, which is a project that aims to recreate various classic computers, game consoles, and arcade machines on FPGA hardware – and as the name implies, you could say it is a…
I know there wasn’t much updates on the minimig status, but with good (;)) reason: I’ve been pretty busy, so I had little time to work on minimig updates. I did spend quite some time on rewriting the CPU <-> minimig interface, which will hopefully reduce timing problems and enable me to finally add the ethernet Zorro interface. The CPU clock will also be reduced to 28MHz, hopefully that won’t…
QMEM bus specification This post describes the QMEM bus, the different cycles allowed, the bus elements and different bus configurations supported. 1. Introduction 2. Features 3. Signals Description 4. Cycles Description 5. Bus Elements 6. Bus Configurations Introduction QMEM (abbreviated from quick memory), is a flexible, portable, simple and fast system interconnect bus, specifically targeted at…
The OR1200 is a RISC-type, Harvard architecture (separate instruction and data buses) synthesizable CPU core, written by the OpenCores community. It can be configured with a number of optional components, such as cache, MMU, FPU, timer, programmable interrupt controller, debug unit, etc. For sake of simplicity, I decided to disable most of the optional components, except the hardware multiplier…
Introduction I’d like to talk about how to build a fast, lean, clean SoC machine. What is an SoC? An SoC, or a System On a Chip, is, simply put, a microprocessor with some common peripherals attached, like ROM, RAM, SDRAM controller, UART, SPI, GPIO, and other I/O ports or protocols, all tied up into a system. An SoC is not unlike a microcontroller, which also has a microprocessor bundled with…
Meet my new Border Collie puppy, Pen Playmaker Spirit of Freedom!