Recent content on PRBS23
I recently released FreeFall 800, open source firmware for the Gravity 800 smoker/grill from Masterbuilt. The project started because I needed to open the controller to fix a broken wire. That is when I noticed that inside was a standard ESP32 module, with a plainly visible programming header. This made me very surprised to find that there were little to no details online about the…
Today I’m publicly releasing a project I’ve been working on for a while: FreeFall 800. FreeFall 800 is a local first, open source firmware project, that replaces the factory firmware that comes on the Masterbuilt Gravity 800 smoker grill. A year ago I was in the market for a new grill, and ended up purchasing a Masterbuilt Gravity 800 charcoal smoker grill. The grill itself has been…
I have recently started experimenting with LoRa radios, and the LoRaWAN network protocol. Interestingly it seems that the LoRa ecosystem is simultaneously surprisingly open (both in specifications and implementations), while also having very little definitive documentation on how to actually get started as an indvidual hacker. As such I found the process of learning enough of the protocol to set…
Basic Distribution Constraints In SystemVerilog, almost all constraints are some form of boolean expression. The constraint solver’s job is to satisfy all these boolean expression when choosing random values. The two exceptions to this are solve before constraints, which control the order of value resolution, and dist constraints, witch control the distribution of values chosen. This latter…
Note: Since publishing this post, ChirpStack released their version 4 LoRaWAN network server, which significantly changes the architecture and configuration. This post goes through setting up a network with ChirpStack v3, for an updated version of this post using ChirpStack v4, see Getting Started With a Private LoRaWAN Network Using ChirpStack v4 . I have recently started experimenting with LoRa…
From the perspective your more traditional software programming languages, multi-tasking in SystemVerilog is weird. On one hand, the language includes a special syntax ( fork and join ) that make it really easy to write code that “runs” in parallel. On the other hand, SystemVerilog “processes” aren’t really processes, or even threads, in the traditional sense. Even if…
I have recently been thinking a lot about tagged unions in SystemVerilog, since I discovered them a few months ago. In this post I present some of the ideal use cases for tagged unions, and why I think no one actually uses them. Despite being initially proposed in 2003 , and officially part of the language since the SystemVerilog 1800-2005 standard was released, at this point tagged unions appear…
This whole project started when I happened across the NASA Perseverance Raw Image Library one day. Something about the constantly varying combination of images: some with scientific purposes, some for navigation, and some of the rover itself, along with the fact that they were FROM MARS kept me coming back to the page to see what Curiosity had been up to lately. This eventually lead to the idea of…
I recently wrote about detecting driver strength in SystemVerilog . That work actually came out of solving a larger problem: How do you build a bidirectional digital wire model that includes propagation delay? Motivation The problem I had was how to model, in a digital simulation, the behavior of a “channel” (wire) for a high speed SerDes link. At the symbol rates used for modern high…
From time to time I will run across small problems or challenges in my day job which seem as though they should be simple enough but get stuck in my mind until they are fully investigated. This is one such issue I ran into a while ago: How can a verilog model determine the drive strength of a net value in SystemVerilog? When I initially ran into this problem, I thought it would require a quick…
I am a full time ASIC verification engineer, and part time electronics and software tinkerer. This blog is a place for me to write about pretty much any topic that piques my interest. Usually this ends up being a deep dive into a niche topic related to my work in ASIC design. However, I will be trying to post some content related to my non-professional software, firmware, and hardware projects. My…