I am very tired so I will get away with as much quoting myself as possible. This is probably one of the most important parts of my ~philosophy of Computer~. From resources for improving as a software engineer : Get really comfortable with using your VCS. Learn to do black magic with git, and learn to do it fast. This will probably take a lot of aliases — scroll down to the “Git aliases” section on…
I recently saw and liked Judy2k’s “Using fortune to reinforce habits” — building effective habits is an under-appreciated part of learning any discipline. (And xh is one I had the exact same trouble with .) Let’s implement it in our Nix setup. Step 0: don’t install fortune You don’t have to do this. That’s probably one of the neatest parts of Nix right there — you can have fortune embedded in your…
Here’s a video of the TextMode Designer in use, fixing the control order of a dialog used in the ADC , and one of designing a new dialog.
Busy working on the ADC lately, but I just happened upon this kind-of-follow-up to the non-intrusive vtable . I have methods implemented by only some “subtypes”, and usually “do nothing” is the correct default, or perhaps “return null ”. They end up looking like this: pub fn handleMouseDown ( self : Control , b : SDL . MouseButton , clicks : u8 , cm : bool , ) Allocator . Error !? Control { switch…
This was written up while working on Ava BASIC ’s IDE, the Amateur Development Client (ADC) . macOS 🔗 ↩ We set .allow_high_dpi = true when creating the window with SDL, which does the right thing on macOS. We classify this situation as “native hidpi”; we recognise it by noting the created renderer has an output size 2x that of the window in both dimenisons. We only need set the renderer scale…
Last night in bed, I realised we’d encountered a scenario at work during the day where something happened so fluidly in jujutsu that it’d make a good case story! Let’s compare, step by step, how it’d look with git. The stage is set: you’re working on a big, old, legacy codebase , and you’re 10 commits deep in a branch where you’re adding a new parsing component which will, by the time the branch…
I finally got bothered to try jujutsu . It’s often hard to convey just how fast I’m accustomed to moving with git, and so while there are many valid complaints about its interface, object model design, etc., I’m really super fluent with it! So for a long time I was happy to let jujutsu just be a thing people were talking about; simpler or better than git and so on, I didn’t ever quite hear…
const Control = union ( enum ) { button : * Controls . Button , menubar : * Controls . Menubar , menu : * Controls . Menu , menu_item : * Controls . MenuItem , editor : * Controls . Editor , fn generation ( self : Control ) usize { return switch ( self ) { inline else => | c | c . generation , }; } fn setGeneration ( self : Control , n : usize ) void { switch ( self ) { inline else => | c | c .…
Just a little note to say that I’ve published VyxOS , my Nix configuration. It’s just over a year old at this point, and at one point supported a large mesh of eccentric servers with its own dynamic mesh and DNS and all sorts of nonsense, but the config and infra has been hugely condensed to make it friendly to my brain, and the history scrubbed to make it friendly to publishing. Hope it’s…
Raw log from my notes re: Time travel follows. Sae RV32I with some RV32C/refactoring WIP from long ago. The WIP probably feels way too magic for me now, but we should take a look at it. Now uses Niar. TODOs 🔗 ↩ Decombing RV32C and associated refactor Then add RV32E, RV64I? The entire test infra could be so much more robust. M extension A extension “Zicsr” extension BMC (WHAT DID THIS MEAN)…
The typical hypothetical “who are you coding for” example meant to shock you into writing better code is “yourself in six months”, but it turns out four is completely adequate to get lost. Start 🔗 ↩ In February I started writing my first RV32 core, Sae . By the end of the month, I had enough of one going to run some sample code compiled with GCC for RV32I, interacting with UART via MMIO, which…
edit: A lot of the following doesn’t apply any more, though it’s all been very helpful in learning. My days of using Amaranth are over. I don’t feel able — nor do I want — to depend on something I’m not allowed(!) to contribute to, so I need a way to continue on with my FPGA studies without it. I don’t really view just trying to cobble together Verilog as viable for me right now; I’m rather…
First up: I’ve never done more than toy with Elixir before, and never with Nix or Rust, so this “simply stuff Nix, Elixir and Rust into a magic hat” trick was guaranteed to be at least a little bit Fun™. And it was! :) Stock Akkoma uses Earmark , which looks like a lovely library, but maybe a lil out of date and out of step with CommonMark/GFM. We deserve Comrak . Happily enough, a Google search…
Have it your way. (Content note for just about everything.) Further to fish fun in Nix refisited , today I wanted my git log to work a little different. I have l as an alias for: (I’m going to add a bunch of newlines) git log --show-notes = '*' --abbrev-commit --pretty = format: ' %Cred%h %Cgreen(%aD)%Creset -%C(bold red)%d%Creset %s %C(bold blue)<%an>%Creset ' --graph The output looks like this:…
I’m writing a little hardware I²C clock stretcher ( I²C, oh! Big stretch ) to help me make my I²C controller implementation actually support it. These are some moments I’ve had while doing so. Out-of-band experience 🔗 ↩ I added a tiny UART module to help me debug it. First I emitted a < character when starting a big stretch, and a > character once we’re all relaxed. I was going to then write the…
I realized I was in error in not using Nix , and have been addressing that. (The primary artifact so far that is public is hdx , a response to Installing an HDL toolchain from source .) I have some knowledge of it from previous experiments. Some observations: You must thread the needle between “properly sitting down and reading the language guide” and “actively replacing…
This is straight from my journal, so it starts without warning. The bit packing is turning out to be surprisingly tricky! Memory is synchronous but our uses of addr[0] were all comb, so they didn’t align with the actual target in the cycle it got transmitted from memory when we were advancing addr every cycle. This was a really good exercise in Being Confused As Heck. Going to try to explicate the…
It occurred to me while writing up § Requirements in the README for some 1 gateware that getting the whole beginner’s open-source FPGA toolchain set up can be a serious stumbling block, as I imagine it probably was for me once. The main pre-packaged solution that comes to mind is OSS CAD Suite . It’s excellent, but common to “all-in-one” solutions, it makes assumptions that mean it’s prone to…