Recent content on kate's lab notebook
If you’re just interested in the how-to – you can jump past my context . 
 If you’re just looking for the formula function reference, you can jump to that, too . 
 Tana Outliner is a pretty cool piece of note-taking/“personal knowledge management " software – despite their heavy advertisement of AI interactivity – which manages mostly to deliver on the…
I’ve recently been checking out a few options for inexpensive, DMM-form-factor oscilloscopes – mostly out of a desire to be able to work on hardware from anywhere with just my tiny laptop, a tiny projector, and some minimal equipment. 
 Options like the Analog Discovery 2 are nice; but their readouts take up screen space; and they’re often limited bandwidth – so I…
A common question in the #amaranth-lang Libera.Chat channel asks how one can include a non-Amaranth component—e.g. a library cell or a component from a Verilog design—so it seemed worth writing up a quick note we can link to answer that. 
 Invoking a Component 
 The key is to create an amaranth.Instance component, as in the following example: 
 m . submodules . my_component…
A common question in the #nMigen Libera.Chat channel asks how one can include a non-nMigen component—e.g. a library cell or a component from a Verilog design—so it seemed worth writing up a quick note we can link to answer that. 
 Invoking a Component 
 The key is to create an nmigen.Instance component, as in the following example: 
 m . submodules . my_component =…
A few people on twitter have asked me to explain why the USB3 winds up being much harder to implement than USB2.
The answer is more than will fit in a single tweet, so I thought I’d put a quick-but-rough answer, here. This is
by no means comprehensive; consider it a longer tweet what a tweet would be given I had more than 240 characters and a proclivity to babble. (I do.)
The MindShare book USB 3.0 Technology: Comprehensive Guide to SuperSpeed USB (ISBN-13: 978-0983646518) is a pretty decent reference for implementers of USB 3.0 / Gen1;
but is published with a few factual mistakes – places where their tables incorrectly copy the standard. This notebook post is here to gather the mistakes I’ve found, so I can report them the publisher all at once.…
I’ve written a bit about my look at “commercial off-the-shelf” USB3 PHY boards; and have been
taking a look recently at the Design Gateway AB07-USBFMC module . It turns out that my unit has what seems to be a pretty
embarrassing defect. 
 I’ve been testing my in-progress USB3 gateware with this PHY; and I’ve been running into an
interesting issue:…
If you’re looking to play with commercial USB3 PHY evaluation hardware – that is, if you’re looking to get a
board someone else has designed and built, rather than soldering up your own or experimenting with 
 5G SerDes – there seem
to be two options available: the HiTech Global FMC_USB3 ($795 USD),
or the Design Gateway AB07-USBFMC ($1,650 USD). 
 
…
This post is a summary of the findings from my look at using the ECP5 SerDes for USB3 LFPS for quick reference of how to use the ECP5 SerDes semi-documented out-of-band I/O features. 
 Quick summary: 
 
 In addition to using the ECP5’s SerDes pins to drive the SerDes; the SerDes Tx/Rx pins can also be used as Low-Data-Rate (LDR) outputs/inputs while the SerDes is in use. 
…
Lately, I’ve been developing a USB3 stack, and a USB3 frontend using the ECP5 SerDes. The ECP5 SerDes seems almost 
perfect for USB3, which shares many of its implementation details with PCIe. However, there are a couple of hitches. 
 The more difficult to deal with is support for USB3’s Low Frequency Periodic Signaling (LFPS) . LFPS carries small bursts
of information via…