Computational storage has its first set of official specifications following the publication of version 1.0 of The Storage Networking Industry Association’s Computational Storage Architecture and Programming Model. As reported by The Register, the model is aimed at developing this promising new tech by allowing different manufacturers’ designs to operate together. For the latest VHDL projects,…
Dr. Gordon Moore was the Director of Research and Development at Fairchild when he wrote the paper, “Cramming More Components onto Integrated Circuits” which was published in the April 19, 1965 issue of Electronics. Following this publication, Dr. Carver Mead of Caltech declared Dr. Moore’s predictions as “Moore’s Law”. For the latest VHDL projects, code snippets, Continue reading Moore s Law is…
(We just changed our website address). The new blog has several new articles and features, in addition to actualizations of articles that were hosted in the past on this website. Examples: A series of articles and projects for Digilent s Basys 3 board (using an Artix-7 FPGA from Xilinx) New technical articles and code snippets, among Continue reading FPGA er is alive and kicking!
Introduction This is meant to be the first among a series of articles about image processing on FPGA. As it is usual on FPGA er website, articles will include sample code and test benches. Basic concepts Let s define some common technology. A digital image is a frame. For starters, we will analyze grayscale images (as opposed Continue reading Image processing on FPGA (1)
Keras is a high-level neural networks API, written in Python and capable of running on top of TensorFlow, CNTK, or Theano. I have recently installed Anaconda, TensorFlow, and Keras in my laptop PC as part of my Deep Machine Learning (DML) plan. I am reading two books in for my learning effort in parallel: MIT s Deep Learning book Continue reading Keras and IMDB: Love, hate, sex and money
There have been many announcements about what would be the next generation Intel Xeon platform with integrated FPGA, also on this blog. Now Intel has finally announced that they are shipping their Xeon 6138P Gold with integrated FPGA accelerator to selected customers. The Intel Xeon 6138P includes ane Arria10 GX 1150 FPGA core, with up to Continue reading Intel Xeon processor with FPGA now…
The first in the projects for the Cyclone V GX Starter kit will be a HW LED flasher. Although the design is very easy, it is a complete design including absolutely all the elements needed to achieve a reliable design with timing closure. For an introduction about the Cyclone V GX Starter kit evaluation board, Continue reading Cyclone V GX Starter kit HW LED flasher
The comics strip says it all or maybe not. There are so many missing: Ethernet, Fast Ethernet, Gigabit Ethernet The diverse Windows versions and Unix, and Linux Serial Rapid IO, Infiniband PDAs, disc-man, MP3-player, tablets, digital cameras ADSL, optic fiber, and so many others
The Cyclone V GX Starter kit is an Evaluation Board (EVB) from Terasic based on Altera s Cyclone V GX FPGA. The Cyclone V Starter Kit development board includes hardware such as Arduino Header, on-board USB Blaster, audio and video capabilities and much more On further entries of the blog, I will be including several Continue reading Cyclone V GX Starter Kit Introduction
For me, and for many other designers, the first time we saw the internal memory blocks in an FPGA came as a little shock. Some of us were used to RAM devices used in Board Design. These devices use bidirectional data buses. Even the fastest memories, DDRn DRAMs, use bidirectional data buses (‘n’ has changed Continue reading FPGA internal tri-state buses