Recent content on Daniel Mangum
I’ve recently been working on a mechatronics project that involves constructing an X-Y cartesian motion system. I opted to use stepper motors to drive each axis, and timing belts and pulleys for translating the rotational torque of the steppers into linear motion. The timing belts need to be anchored to the component that is being actuated, which in this case is the carriage on the linear…
Disclaimer: this post contains spoilers for Christopher Nolan’s 2026 depiction of The Odyssey. If you are planning to watch the movie, I would recommend doing so prior to reading, even if you are already familiar with the story. I’ve spent most of my career leading teams, including serving as CTO at Golioth prior to our acquisition by Canonical. Over the years I’ve tried to…
It has been more than two years since I bought a Pinecil soldering iron and wrote about soldering the breakout board and accessing the UART. I’ve been doing more work with the Pinecil as of late following the addition of upstream support for the Bouffalo Lab BL706 MCU in Zephyr (big shout out to @VynDragon, @will-tm, @josuah, and everyone else who has been contributing to the upstream…
In my recent post on the PSA Crypto API, I demonstrated the use of the API on two different MCUs: the nRF52840 and the ESP32-S3. In the case of the former, the ECDSA signature operation was eventually executed in a closed source library that manages communication between the Arm Cortex-M4 processor and the Arm TrustZone CryptoCell 310 security subsytem. Readers that ventured down the rabbit hole…
Arm’s Platform Security Architecture (PSA) was released in 2017, but it was two years until the first beta release of the PSA Cryptography API in 2019, and another year until the 1.0 specification in 2020. Aimed at securing connected devices and originally targeting only Arm-based systems, PSA has evolved with the donation of the PSA Certified program to GlobalPlatform in 2025, allowing…
Below are two X.509 certificates. The first is the Certificate Authority (CA) root certificate, and the second is a leaf certifcate signed by the private key of the CA. ca.crt.pem -----BEGIN CERTIFICATE----- MIIBejCCASGgAwIBAgIUda4UvlFzwQEO/fD0f4hAnj+ydPYwCgYIKoZIzj0EAwIw EjEQMA4GA1UEAxMHUm9vdCBDQTAgFw0yNjAyMjcxOTQ3NDZaGA8yMTI2MDIwMzE5…
I have recently been working on tuning circuits, which typically consist of an inductor and a capacitor (i.e. an LC circuit). For those not familiar with inductors, they are passive components that store energy in a magnetic field. They oppose changes in current, meaning that they pass direct current (DC) and block alternating current (AC). While there are many types of inductors, ferrite core…
A few months ago I wrote Make it Possible, Then Make it Normal, in which I described unceremoniously running my 3,000th mile of 2025 nearly two months before the year concluded. While I didn’t have a total mileage goal for the year, after hitting 3,000 with time to spare I naturally locked on to trying to reach 3,500. I crossed the threshold on December 30th, 2025 and finished with a final tally…
Minutes before a recent video call where I was slated to give a demo, I initiated a reboot on my System76 Oryx Pro laptop, but it did not come back up after seemingly powering off. I attempted to manually power on and found it unresponsive. The machine was connected to power, so I saw the familiar power and battery LEDs illuminated on the front of the machine. Given that the machine appeared to…
In my day job and free time I frequently find myself debugging Arm Cortex-M microcontrollers (MCUs). In recent years, it has become more and more common for the cores in these MCUs to implement Armv8-M, with the Arm Cortex-M33 being a very popular variant. Armv8-M includes an optional security extension (Cortex-M Security Extension or “CMSE”), which is more commonly known by its…
This past Saturday I went out for a 12 mile run with a few friends. Absent the beautiful fall colors on display this time of year in North Carolina, there was nothing especially notable about this particular run. However, the fact that it was not notable is notable itself. Two years ago I set a goal to run 2,023 miles in 2023. After reaching that goal with time to spare, I revised the goal to…
A few weeks ago I posted about how much fun I was having with the Fomu FPGA development board while travelling. This project from Tim ‘mithro’ Ansell and Sean ‘xobs’ Cross is not new, but remains a favorite of mine because of how portable it is — the entire board can fit in your USB port! The Fomu includes a Lattice Semiconductor iCE40 UltraPlus 5K, which has been a popular…
Though I spend the majority of my time working with microcontroller class devices, I also have an embarassingly robust collection of single board computers (SBC), including a few different Raspberry Pi models, the BeagleV Starlight Beta (RIP), and more. Typically when setting up these devices for whatever automation task I have planned for them, I’ll use “headless mode” and…
We started this series with a look at operators and kernels, the “instructions” used by models and the implementation of those instructions on the available hardware. We then explored the computation graph, which defines the sequence of operators for a given model, and explored how different model formats opt to include the explicit computation graph in the distributed file, or defer…
In our last post we explored operators and kernels in Tensorflow Lite, and how the ability to swap out kernels depending on the hardware capabilities available can lead to dramatic performance improvements when performing inference. We made an analogy of operators to instruction set architectures (ISAs), and kernels to the hardware implementation of instructions in a processor. Just like in…
The buzz around “edge AI”, which means something slightly different to almost everyone you talk to, is well past reaching a fever pitch. Regardless of what edge AI means to you, the one commonality is typically that the hardware on which inference is being performed is constrained in one or more dimensions, whether it be compute, memory, or network bandwidth. Perhaps the most constrained of these…
In my last post on the Nordic Semiconductor Thingy:91 X IoT prototyping platform, I outlined the features and architecture of the device. The combination of wireless protocols on the Thingy:91 X (Bluetooth LE, LTE-M, Wi-Fi) make it a compelling foundation for a wide variety of applications. However, there are a few intricacies to the protocol support. Namely, the primary stated purpose of the…
I have recently been working with the RAKwireless RAK5010 development board. It includes the popular Nordic nRF52840 MCU for running applications on its Cortex-M4 CPU that can leverage the integrated 2.4 GHz multiprotocol support, as well as the LTE and GNSS support offered by the on-board Quectel BG95-M3 module. The micro-USB port on the board is connected to USB on the nRF52840, which allows for…
In our last post, we explored the Nordic VPR RISC-V processor through the lens of the peripheral processor (PPR) on the nRF54H20. While we demonstrated how the application processor can configure and start a VPR processor, we stopped short of demonstrating any further communication between them. Most meaningful use-cases of the PPR and the FLPR, involve communicating with the controlling…
VPR (pronounced “Viper”) is Nordic Semiconductor’s first RISC-V processor, landing in the new nRF54H and nRF54L lines of SoCs after their initial announcements in April and October of 2023 respectively. Readers of this blog are familiar with my long-running obsession interest in RISC-V (see my RISC-V Tips and RISC-V Bytes series). However, Nordic’s introduction of a RISC-V…
Nordic Semiconductor recently made their new IoT prototyping platform, the Thingy:91 X, generally available. The Thingy:91 X is an upgrade to their existing prototyping platform, the Thingy:91, replacing the nRF9160 System-in-Package (SiP) with an nRF9151 SiP, the nRF52840 System-on-Chip (SoC) with an nRF5340 SoC, and adding the nRF7002 integrated circuit (IC). Each of these components enables a…
Well, not this one. But this one is! How? Let’s take a closer look at Bluesky and the AT Protocol that underpins it. Note: I communicated with the Bluesky team prior to the publishing of this post. While the functionality described is not the intended use of the application, it is known behavior and does not constitue a vulnerability disclosure process. My main motivation for reaching out to…
The ESP32-S3 is a popular microcontroller (MCU) for a variety of reasons, such as its support for external pseudostatic RAM (PSRAM). One of its lesser known features is its Universal Serial Bus (USB) On-The-Go (OTG) controller. The previously released ESP32-S2, as well as the new ESP32-P4, also have USB OTG support, with the latter having two controllers. USB OTG devices can act as a device or as…
Three weeks ago I wrote the following draft of a blog post entitled “Is It Better to Fail Spectacularly?”. I am having a lot of doubts. I’ve been training for the Chicago Marathon in earnest since June, but in reality the preparations began a year ago when I was accepted based on my qualifying time from the 2023 Ventura Marathon. I don’t have doubt that I can run a marathon. I have run…
Isolating sensitive data and operations is a fundamental issue in computing. Ideally, we want to minimize the possibility of a software defect compromising the security of a device. However, in order for the software we write to be useful, it typically needs to interact with that sensitive data in some form or fashion. So how do we interact with sensitive data without being able to access it? The…
Paul Graham’s Founder Mode essay, based on a recent talk from AirBnB founder Brian Chesky, has been getting quite a lot of attention over the past few days. It has prompted many a quote tweet, and founders, such as Bryan Cantrill of Oxide Computer, have started contributing their own thoughts to what founder mode means to them. Having held positions of influence at a few companies, but never…
I frequently work with ESP32 microcontrollers (MCU), both at my day job and in my free time. These devices are very flexible, but like any microcontroller they are quite resource constrained in comparison to anything equivalent to or larger than a single-board computer. There are a few different variants of the ESP32 these days, but one of the newer and most popular is the ESP32-S3. Compared to…
I have spent the majority of my career in engineering roles at startups. Both at companies I have worked at, and in the general startup ecosystem, I have frequently heard some variation of the refrain “engineers are expensive, but wireframes are cheap”. While I align with the underlying sentiment that doing the least amount of work to get customer signal is optimal, the phrase has always bothered…
I have been very fortunate to have both worked alongside some incredible engineering leaders, as well as lead engineering teams myself. These experiences have primarily been in the context of startups that are growing rapidly in terms of both customers and employees. The longer I have worked in these environments, the more convinced I have become that there is a singular skill that ultimately…
This post is the second in a RISC-V Bytes subseries on the PINE64 Pinecil soldering iron and development board. Previous and subsequent posts can be found under the RISC-V Bytes category. In the most recent Pinecil post, we walked through how to solder the header pins on the Pinecil breakout board. With the headers attached, we can now communicate with the Pinecil’s microcontroller via a…
This post is the first in a RISC-V Bytes subseries on the PINE64 Pinecil soldering iron and development board. Subsequent posts can be found under the RISC-V Bytes category. I’ve been using the Pinecil as my primary soldering iron for a few months now. The neat thing about the Pinecil is that it is not only a highly portable USB-C powered iron, but it is also an interesting RISC-V…
I spent the final week of 2022 feeling extremely sick, mostly confined to a bed. I was particularly disappointed in getting sick at that point in the year given that I was wrapping up the best running year of my life. I was very consistent with training, ran a few races, and was closing in on 1,400 miles. I am a big proponent of setting ambitious goals, and will go to pretty extreme lengths to…
In my last post, we explored how to build WASM modules, both with and without WASI support, using Clang. In a comment on Reddit, it was mentioned that much of the setup I walked through in that post could be avoided by just leveraging Zig’s WASI supprt. This is a great point, and I would recommend doing the same. The following command is inarguably simpler than what I described. $ zig cc…
I am currently working on a few projects that involve leveraging WebAssembly (WASM) modules, particularly with WebAssembly System Interface (WASI) support. While WASI is still in its early stages, support has already been added to the Rust compiler and Clang, as well as runtimes such as wasmtime and WAMR. However, getting an environment setup to compile arbitrary C programs to WASM can still be…
Screenshot of Badgecase gallery page. The final day of Supercon 2023 had more great talks, including an incredible recollection of Restoring the Apollo Guidance Computer. However, the real highlight was seeing all of the various badge hacks starting to take their final form, ultimately culminating with the Badge Hacking Ceremony at the end of the day. Mike and I had made enough progress on…
The energy from Friday at Supercon 2023 carried over into Saturday, and adding a stream of ongoing talks to the badge hacking and hallway track made it feel like even more was going on. The setup today was the traditional Supercon “hacker alley”, with the two talk venues connected by a long, narrow corridor packed with people, parts, and soldering irons. Space was at a premium, but…
Just a few minutes after arriving at Hackaday Supercon 2023, I decided that I needed to document my experience. Working with two longtime Supercon veterans (they literally started the thing!), I had been adequately prepared for experiencing the event for the first time, but there is nothing quite like actually being there in-person. Even at 9 AM on Friday, the energy and activity was already…
I have been using Vivado for moss RTL development, which, despite its notoriously large install size, offers a fairly decent developer experience. Or maybe I have just been using it for too long. I’m not sure I would have said this a few months ago. However, I still prefer to write Verilog in Neovim, as it allows me to use vim motions, as well as switch between RTL and software code without…
Most seasoned Go programmers are familiar with the memory representation of an interface. In fact, A Tour of Go, the canonical starting point for new Go programmers, makes sure to describe how interface values contain a value and a type (for a more specific description, see Russ Cox’s blog post on how interfaces are implemented), and even goes so far as to distinguish between interface values with…
If you are interested in what went into writing this blog post, you can view a replay of the livestream here. In a recent post we explored when Vivado inferred Block RAM (BRAM) for memories in FPGA designs, and when it used distributed RAM instead. While it is somewhat obvious why BRAM can be used for memory in an FPGA (i.e. it is literally a discrete memory element), distributed RAM is a bit more…
This is less of a blog post, and more of a collection of Friday thoughts that occurred to me on my morning run. Last night I was livestreaming some work on a new moss blog post in which I describe the use of Look-Up Tables (LUTs) as storage elements on an FPGA (this will be published in a few days). However, I ended up spending the majority of the time scouring the internet for documentation on…
If you are interested in what went into writing this blog post, you can view a replay of the livestream here. As I’ve been working on the logic design for moss, I have been regularly investigating how Vivado translates the Verilog RTL (Register Transfer Level) source into Basic Elements of Logic (BELs), a process known as synthesis. BELs represent the physical components on an FPGA that can…
I have not been able to make as much progress on moss over the last 14 days or so as I would like, in large part because of limited time due to getting some exciting work across the finish line at $dayjob. However, whenever I find myself limited in the amount of “hands on keyboard” time I have to spend on a project, I try to invest more of my idle brain time (IBT, if you will) thinking about the…
As I work on moss and research modern processor design patterns and techniques, I am also looking for patterns and techniques from the past that, for one reason or another, have not persisted into our modern machines. While on a run this week, I was listening to an old Oxide and Friends episode where Bryan, Adam, and crew were reminiscing on the SPARC instruction set architecture (ISA). SPARC is a…
Note: while I was writing this post, Julia Evans published a wonderful entry on her blog entitled Some tactics for writing in public. I highly recommend reading as it includes some wonderful guidance about how to preempt some of the discussion I reference in this post, as well as a short but highly relevant section on analyzing negative comments. You can think of this post as putting some of that…
It’s a simple question really: how can you read and write to the same register in a single-cycle processor? If you have spent most of your life working with software, it is tempting to think of all events as happening sequentially. However, that sequential model that we have become so familiar with as software engineers is really an abstraction that hardware offers to us to help our simple brains…
If you read most literature about processor design, you’ll inevitably be presented with three broad categories of CPU architectures: Single-Cycle Multicycle Pipelined We’ll just be focusing on the first two for today. In fact, my favorite introductory book on computer architecture, Computer Organization and Design (Patterson & Hennessy) progresses through Chapter 4: The Processor by explaining…
TL;DR: even if you’re not being pragmatic, you probably don’t need to. One of the things I have been thinking about while starting to work on moss again is whether I should implement one of the many RISC-V flavors, or whether I should design an entirely new instruction set architecture (ISA). Designing a new one might seem like the ultimate bike-shedding effort, and if my immediate…
I turn 27 years old today, which feels both very old and very young. 30 is often seen as a milestone, perhaps because you have spent nearly a decade operating as an “adult”, but likely are still considered in the earlier part of your career. I am a firm believer that doing most things of significance takes at least 3 years, which makes 27 a good time to decide to commit to “doing something before…
Note: all analysis and code samples used in this post correspond to the v3.3.0 release of Zephyr. Having a good debugging workflow is critical to developing software quickly with high confidence. Fortunately, writing software for computers is often done, well, on a computer, meaning that while writing programs we can run other programs that help us understand the behavior of what we are writing.…