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Chips and Cheese

The Devil is in the Details! Deep dives into computer hardware and software and the wider industry...

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Hot Chips 2026: Samsung’s Processing-in-Memory (PIM)

In-memory compute with LPDDR5X

Hot Chips 2026: Intel’s Crescent Island

Hello you fine Internet folks,

Hot Chips 2026: Fujitsu’s Monaka CPU

Building on a long history of HPC-focused cores, and looking beyond HPC

Hot Chips 2026: Intel’s Diamond Rapids

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SiFive’s First Server Platform

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Hot Chips 2026: Intel’s Wildcat Lake

All about making things affordable

Hot Chips 2026: CUDA Targets RISC-V

CUDA is the most important software framework in the GPU compute world, and Nvidia is looking at supporting CUDA on RISC-V. Terms and conditions may apply.

Hot Chips 2026: Applying High Bandwidth Flash (HBF)

Machine learning workloads have an insatiable appetite for DRAM capacity. Flash memory is cheaper per gigabyte of capacity than DRAM. Could it offer a way out?

Hot Chips 2026: Samsung and HBM Base Die Opportunities

Machine learning applications demand ever more memory capacity and bandwidth. Samsung responded by fabricating their HBM base dies on a logic node, which opens up more opportunities

Talking with Synopsys about the Physics of Chip Design at DAC 2026

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NVIDIA’s Vera Whitepaper Has a Thread Loose

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Arm’s Cortex A55

Arm’s 5-series cores are meant for tasks where performance barely matters, but power and area efficiency are top priorities.

RosaicLabs, Atom RTL, and 32-Tile AMX: Trying to Piece Together a x86 Puzzle

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AMD Advancing AI 2026: Talking CDNA5 with AMD’s Alan Smith

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AMD’s Instinct MI455X: Aiming for the Sun

Editor’s Note (7/25/2026): The article has been edited with more information about the L2 behavior along with the bandwidth of the die to die interface.

LLVM Divination of GFX1251’s Differences

Hello you fine Internet folks, this article is a sequel to the Scrying the AMD GFX1250 LLVM Tea Leaves article where we are going to look at the differences between GFX1250 and GFX1251.

Scrying the AMD GFX1250 LLVM Tea Leaves

In just a few short days, AMD will be showing off their brand new MI400 series of Datacenter Accelerators at their Advancing AI event but before that event comes, we thought it would be fun to attempt to scry the tea leaves that are LLVM commits to see what we can ascertain about this next generation of AMD accelerator.

Is x86 ready to ACE it?

CPU designs must evolve to keep up with changing workloads.

TOP500 at ISC’26: We have a New Number 1

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