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High Speed Networking: The View from the Machine

This series of articles explores how I/O devices communicate with the CPU and the hardware mechanisms that enable high-speed Networking Interface Cards (NICs) to operate at 10GbE , 100GbE , or higher. In this article, we’re going to trace the physical and micro-architectural paths a packet takes from the wire to an application. We’ll look at how NICs actually talk to the CPU, how data physically…

Optimizing a Lock-Free SPSC Queue

Yet another SPSC blog! The goal isn’t just to explain a final solution, such as the lock-free, index-cached implementation some of you might already know. Instead, I want to walk through the iterative process: testing different approaches, analyzing the results, and determining how to squeeze out performance. By walking through the analysis, I hope this process provides a template for…