Antmicro is a software-driven tech company providing development services, platforms, know-how and guidance to customers looking to innovate by applying new technological developments in hardware, software, FPGA, ASIC and edge-to-cloud AI systems. Antmicro offers applied R&D services, prototyping, new product development and assistance in adoption of modern, open source and software-centric technologies and workflows, including Antmicro’s own open source technologies such as Renode. Antmicro is a Strategic Founding Member of RISC-V International, as well as a Platinum Member of Zephyr Project and CHIPS Alliance. We believe in the power of open source to transform entire industries and provide unique business value to our customers.

Industry

Software Development

Company size

51-200 employees

Headquarters

Gothenburg, Västra Götaland County

Type

Privately Held

Founded

2009

Specialties

Embedded systems, Open Source, Linux, FPGA, RISC-V, Open Hardware, ASIC prototyping, Edge AI, Edge-to-Cloud, and RTOS

• Primary

  Fabrikstorget

  1

  Gothenburg, Västra Götaland County, SE

  Get directions

• Zwierzyniecka 3

  Poznan, Wielkopolskie 60-813, PL

  Get directions

• Roosevelta 22

  Poznań, Weilkopolskie 60-829, PL

  Get directions

• Nowomiejska 3

  Gdańsk, Pomorskie 80-864, PL

  Get directions

• Powstańców Śląskich 15

  Wrocław, Dolnośląskie 53-332, PL

  Get directions

• 9,218 followers

  12h

  The new NVIDIA Jetson Orin Nano 2 SoM offers enhanced entry-level edge AI performance & power efficiency. See how our designs, tools & services can help you take full advantage of the new module, from prototype to final product: https://lnkd.in/daW3BVjP NVIDIA AI NVIDIA Robotics

• Antmicro reposted this

  5,380 followers

  6d

  CHIPS Alliance’s open source I3C Core now includes Host Controller support, expanding the Core beyond the Target Device capabilities it included upon release. The MIPI I3C specification was developed as a successor to I2C. The I3C protocol is the backwards-compatible successor to I2C and maintains a two-wire interface while providing capabilities including Dynamic Addressing and In-Band-Interrupts. CHIPS Alliance member Antmicro has now implemented a set of features for Host Controller support. The Controller can start communication with Targets, assign Dynamic Addresses, send commands, read and write data, and manage bus ownership. The I3C Controller is designed for compliance with I3C HCI v1.2 and I3C Basic v1.1.1 and is backwards compatible with I2C. Antmicro also implemented a verification methodology spanning virtual simulation and physical hardware. A full FPGA implementation on the AMD ZynqMP ZCU106 evaluation board demonstrated full 12.5 MHz communication speeds against off-the-shelf third-party silicon. Read the blog (Antmicro): https://lnkd.in/gMiqbwrC

• Antmicro reposted this

  5,380 followers

  2w Edited

  At DAC 2026, the seventh annual Open Source EDA Birds-of-a-Feather session brought together over 120 attendees, with a CHIPS Alliance update highlighting ongoing collaboration across open source hardware and EDA projects. CHIPS Alliance speakers included Michael Gielda (Antmicro), Chair of the CHIPS Alliance Outreach Committee, and Krzysztof Biegański (Antmicro). Michael shared updates on new members and projects across CHIPS Alliance, while Krzysztof discussed four-state logic in Verilator, UVM compatibility improvements, and other developments in the CHIPS Alliance SV Tools Project. In our latest blog, Dr. Yiting Liu (UC San Diego) recaps the evening and recognizes co-organizer Oleg Levitsky (Precision Innovations Inc.) for his work behind the scenes and Andrew Kahng (UC San Diego) for welcoming remarks and ongoing leadership in the space. CHIPS Alliance, Precision Innovations, Inc., and UC San Diego provided financial and logistical support for the session. Read Dr. Liu’s full recap: https://lnkd.in/gus2VPPm

• Antmicro reposted this

  5,380 followers

  2w

  At Latch-Up 2026 (FOSSi Foundation), Krzysztof Biegański (Antmicro) presented progress toward four-state logic and UVM compatibility in Verilator, alongside developments in scheduling, concurrent assertions, and force/release support. That four-state work has since reached an important initial milestone. Our recent CHIPS Alliance blog explains why four-state simulation becomes necessary when dealing with initialization bugs or high-impedance states, how the proposed implementation works, and what comes next on the way toward full four-state logic support. In the session, Krzysztof walks through the initial four-state implementation and follow-up work for case statements, multidimensional arrays, unpacked types, and dynamic arrays, while also covering progress on UVM and other Verilator features. ▶️ Watch the session: https://lnkd.in/gvGrG7MF 🔗 Read the blog: https://lnkd.in/ec2mfXZx

• 9,218 followers

  2w

  Our open hardware #Thunderbolt to #10GbE Adapter, developed by combining two of our previous designs, can help you bring high-speed network connectivity to Thunderbolt-enabled devices. Read more about the adapter and customization options: https://lnkd.in/dmYNBrDZ