NEW RISC-V AUTOMOTIVE HUB

Take the Open Road.

The automotive industry is embracing RISC-V as the open standard for AI-native, workload-specific silicon.

Learn how one extensible ISA gives OEMs and Tier 1s precise economic control over decade-plus vehicle programs.

EVENTS

RISC-V Summit Europe 2026 Session Videos Are Now Available

EVENTS

RISC-V Summit China 2026 Announced

From October 18-20, join the global RISC-V community in Shenzhen for one of the largest RISC-V ecosystem events of the year, featuring technical sessions, networking, and the latest innovations in open computing.

SPECIFICATION

The Technical Backbone of RISC-V

The RISC-V instruction set architecture (ISA) and related specifications are developed, ratified and maintained by contributing members within the Technical Working Groups. Download the latest releases, and get involved.