lstopo is a tool provided by the Portable
Hardware Locality (HWLOC) project. It is a great tool to
get a graphical view of the architecture topology of a
computer. Primarily it shows the CPUs, the cores and caches of the CPUs,
NUMA nodes, PCIe buses and how devices like GPUs are connected to the
buses.
Commands
Installing this is easy:
$ sudo apt install hwloc
To view the topology of your system’s architecture in the tool’s
default format:
$ lstopo
The default format might be a GUI window or a text output or ASCII
graphics or something else dependent on your system.
To view topology details in console format:
$ lstopo --of console
This displays the topology in indented text format.
To view it as colorful ASCII art at the shell:
$ lstopo --of txt
On my system, this showed a colorful and pretty block diagram of the
CPU, NUMA nodes and the dies inside it. It is ironic that the
txt format actually shows the topology graphically!
Other formats that can be used include svg and
pdf:
By default, some of the I/O components might not be displayed. To
get the whole topology:
$ lstopo --whole-io
Topology
A brief introduction to the various components that are drawn by the
tool:
Machine: This is the outermost or top-most component. It also lists
the total amount of RAM. Example: Machine (31GB)
Package: The chip package that goes into a socket. On a multi-socket
system, there will be multiple packages. Example:
Package L#1
Group / NUMANode: This appears only if you have enabled NUMA and
represents a NUMA node. On a multi-NUMA-node system, there will be
multiple of these groups or NUMA nodes. Example:
NUMANode L#0 P#0 (32GB)
Caches: Depending on what caches the CPU has the components might be
L3, L2, L1d and L1i, each with corresponding cache size listed. In the
graphical output, note the span of the cache rectangle - it spans over
the CPU cores that it belongs to. Example: L1i (32KB)
Core and PU: Physical CPU cores are shown as Core and
if they have multiple hyper-threaded cores inside them they are shown as
PU. If hyper-threading has been disabled on a system, then
a single PU is shown inside each core. Example:
Core P#4, PU P#4, PU P#10
PCIe trees: There will be one or more PCIe trees associated with a
CPU or a NUMA node is displayed inside the box of that particular CPU or
NUMA node. Each tree shows the PCIe device IDs or PCI bus IDs. If there
is a number on the PCIe bus, that is its bandwidth. The PCIe generation
can be guessed from the bandwidth - 32 means 32 GB/s which
is only possible with PCIe Gen 4.
GPUs and devices: Hanging off a PCIe bus tree are the GPUs and other
I/O devices. The CPU affinity for a GPU or device can be seen by noting
the CPU cores or NUMA node inside which the GPU or device is listed. If
two device are hanging off the same PCIe tree then they are sharing the
same PCIe root - this can degrade their bandwidth. This can be fixed by
physically moving the devices to a different PCIe slot so that it is
associated with its own PCIe tree or root.