Partner Highlight
New Products
HBM3 IP
LTE Cat 1bis RF, Modem and Protocol Stack IP
UALink PHY + Controller
MIPI PAL Verification IP
Zigbee Transceiver PHY IP Core
Blogs
Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects
Arteris
AI is changing security testing, but not all vulnerabilities are created equal
Axel York Poschmann
PQShield
Hardware security verification must go beyond functional testing
John Elliott
Arteris
Stop Treating Fanout RDL Like Substrate Routing
Soheil Modirzadeh
Synopsys, Inc.
Why Does Every Chiplet Supply Chain Need a Chain of Custody?
Reela Samuel
Cadence Design Systems, Inc.
Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
Ian Lankshear
EnSilica
Powering the next architecture shift: Inside GF’s approach to 48V
Ambreesh Tripathi
GlobalFoundries
Steve Roddy
Quadric
[AI Ecosystem] The paradigm shift in AI computing
Professor Jinwoo Shin, KAIST
See AuraStack AI Super Agent in Action!
Reela Samuel
Cadence Design Systems, Inc.
Matter Certification Checklist for OEMs
Rohan Nathi
MosChip Technologies, USA
Stop Finding HBM Signal Integrity Problems After Routing
Soheil Modirzadeh
Synopsys, Inc.
Articles
Harnessing the power of AMBA CHI: The Protocol Powering Modern CPU Clusters
Signature IP Corporation
Why Open-Source Software Is Essential in the Software-Defined Vehicle Era
Hisao Munakata
Renesas
Detect, Diagnose, and Debug using Sensors and Functional Monitoring
Siemens EDA and Movellus
Siemens EDA
Practical AI Silicon on Mainstream Node using LPDDR
OPENEDGES Technology, Inc.
From Specification to Silicon: Using PUFrt to Address Caliptra Root of Trust Integration Challenges
eMemory Technology Inc.
Cache Coherency 101: Why It Matters in Multi-Core SoCs
Signature IP Corporation
Why SoC Interconnects Have Outgrown the Bus
SignatureIP Engineering Team
Signature IP Corporation
High-Speed SerDes Design: Architecture, Equalization, and CDR Circuits
Vivek Babu Avuri
MosChip Technologies, USA
Architecting the Future: Building Smarter SoCs with RISC-V
Paul Martin
Aion Silicon
AI-Accelerated Software Security Vulnerability Discovery: Is Hardware Next?
Andreas Kuehlmann, General Manager – Security Solutions
Arteris
7 Ways to Efficiently Scale IP Lifecycle Management
IC Manage
Real Intent
Today on Design And Reuse
A scalable, shader-programmable vector graphics GPU core for low-power MCUs - August 27, 2026D&R Events
Audio / Video
|
Business
|
Networking
|
Artificial Intelligence
|
RISC-V
|
Foundry
|
Design IP
Automotive
|
Chiplet / Multi-Die
|
Design Platform and Service
|
Security
|
Internet of Things
|
D&R Events
Partner Highlight
Latest News Alerts