Where did we leave off? Background: KTRR IORVBAR Coprocessors Always-On Processor Investigation AXI? What’s that?! Mapping DRAM Code execution Improving the strategy What about A7 and A8(X)? Conclusion
Introduction The superblob The structure of the superblob The code directory The structure of the code directory Special slots Code slots Bonus: trustcache The entitlements blobs The requirements blob CodeResources Conclusion
Analysis Introduction Resources Disclaimer USB initialisation Handling of USB transfers Initial request handling Data phase Use-after-free Lifecycle of image transfer USB stack shutdown Memory leak Why is a leak needed? USB request structure The bug Exploitation Heap feng shui Triggering the use-after-free The payload The overwrite Executing the payload Explaining the payload Conclusion